298 	switch (qp->s_state) {  in qib_make_rc_req()
346 				qp->s_state = OP(SEND_FIRST);  in qib_make_rc_req()
351 				qp->s_state = OP(SEND_ONLY);  in qib_make_rc_req()
353 				qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);  in qib_make_rc_req()
386 				qp->s_state = OP(RDMA_WRITE_FIRST);  in qib_make_rc_req()
391 				qp->s_state = OP(RDMA_WRITE_ONLY);  in qib_make_rc_req()
393 				qp->s_state = OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);  in qib_make_rc_req()
434 			qp->s_state = OP(RDMA_READ_REQUEST);  in qib_make_rc_req()
461 				qp->s_state = OP(COMPARE_SWAP);  in qib_make_rc_req()
467 				qp->s_state = OP(FETCH_ADD);  in qib_make_rc_req()
521 		qp->s_state = OP(SEND_MIDDLE);  in qib_make_rc_req()
534 			qp->s_state = OP(SEND_LAST);  in qib_make_rc_req()
536 			qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);  in qib_make_rc_req()
562 		qp->s_state = OP(RDMA_WRITE_MIDDLE);  in qib_make_rc_req()
575 			qp->s_state = OP(RDMA_WRITE_LAST);  in qib_make_rc_req()
577 			qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);  in qib_make_rc_req()
606 		qp->s_state = OP(RDMA_READ_REQUEST);  in qib_make_rc_req()
630 	qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);  in qib_make_rc_req()
798 		qp->s_state = OP(SEND_LAST);  in reset_psn()
821 			qp->s_state = OP(SEND_LAST);  in reset_psn()
835 		qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);  in reset_psn()
840 		qp->s_state = OP(RDMA_READ_RESPONSE_LAST);  in reset_psn()
844 		qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);  in reset_psn()
852 		qp->s_state = OP(SEND_LAST);  in reset_psn()
1105 			qp->s_state = OP(SEND_LAST);  in do_rc_completion()
1248 			qp->s_state = OP(SEND_LAST);  in do_rc_ack()