36 	s1val = bytein(cs->hw.njet.base + NETJET_IRQSTAT1);  in netjet_s_interrupt()
55 	s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0);  in netjet_s_interrupt()
61 		byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);  in netjet_s_interrupt()
64 	if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <  in netjet_s_interrupt()
65 	    inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))  in netjet_s_interrupt()
70 	if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <  in netjet_s_interrupt()
71 	    inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))  in netjet_s_interrupt()
76 	if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */  in netjet_s_interrupt()
80 			       cs->hw.njet.last_is0, s0val);  in netjet_s_interrupt()
84 		cs->hw.njet.irqstat0 = s0val;  in netjet_s_interrupt()
85 		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=  in netjet_s_interrupt()
86 		    (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))  in netjet_s_interrupt()
89 		if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=  in netjet_s_interrupt()
90 		    (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))  in netjet_s_interrupt()
103 	cs->hw.njet.ctrl_reg = 0xff;  /* Reset On */  in reset_netjet_s()
104 	byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);  in reset_netjet_s()
109 		cs->hw.njet.ctrl_reg = 0x40;  /* Reset Off and status read clear */  in reset_netjet_s()
111 		cs->hw.njet.ctrl_reg = 0x00;  /* Reset Off and status read clear */  in reset_netjet_s()
112 	byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);  in reset_netjet_s()
114 	cs->hw.njet.auxd = 0;  in reset_netjet_s()
115 	cs->hw.njet.dmactrl = 0;  in reset_netjet_s()
116 	byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);  in reset_netjet_s()
117 	byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);  in reset_netjet_s()
118 	byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);  in reset_netjet_s()
163 	cs->hw.njet.base = pci_resource_start(dev_netjet, 0);  in njs_pci_probe()
164 	if (!cs->hw.njet.base) {  in njs_pci_probe()
192 	cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;  in njs_cs_init()
193 	cs->hw.njet.isac = cs->hw.njet.base | NETJET_ISAC_OFF;  in njs_cs_init()
195 	cs->hw.njet.ctrl_reg = 0xff;  /* Reset On */  in njs_cs_init()
196 	byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);  in njs_cs_init()
199 	cs->hw.njet.ctrl_reg = 0x00;  /* Reset Off and status read clear */  in njs_cs_init()
200 	byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);  in njs_cs_init()
203 	cs->hw.njet.auxd = 0xC0;  in njs_cs_init()
204 	cs->hw.njet.dmactrl = 0;  in njs_cs_init()
206 	byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);  in njs_cs_init()
207 	byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);  in njs_cs_init()
208 	byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);  in njs_cs_init()
232 	       cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);  in njs_cs_init_rest()
233 	if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) {  in njs_cs_init_rest()
236 		       cs->hw.njet.base,  in njs_cs_init_rest()
237 		       cs->hw.njet.base + bytecnt);  in njs_cs_init_rest()