Lines Matching refs:ctlreg
326 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | in r852_cmdctl()
330 dev->ctlreg |= R852_CTL_DATA; in r852_cmdctl()
333 dev->ctlreg |= R852_CTL_COMMAND; in r852_cmdctl()
336 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); in r852_cmdctl()
338 dev->ctlreg &= ~R852_CTL_WRITE; in r852_cmdctl()
342 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
344 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
349 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { in r852_cmdctl()
350 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
351 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
413 dev->ctlreg |= R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
417 dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_hwctl()
420 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
425 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
426 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_calculate()
445 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_calculate()
458 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_calculate()
483 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_correct()
485 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_correct()
1015 if (dev->ctlreg & R852_CTL_CARDENABLE) in r852_suspend()