279 			enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_refill_rx()
281 			enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);  in bcm_enet_refill_rx()
420 					 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enet_receive_queue()
496 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enet_poll()
518 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_poll()
563 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_isr_dma()
779 		val |= ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
781 		val &= ~ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
923 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_open()
999 				ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_open()
1002 				ENETDMAC_BUFALLOC, priv->rx_chan);  in bcm_enet_open()
1013 				 ENETDMAS_RSTART_REG, priv->rx_chan);  in bcm_enet_open()
1018 				ENETDMAC_RSTART, priv->rx_chan);  in bcm_enet_open()
1025 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);  in bcm_enet_open()
1027 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);  in bcm_enet_open()
1029 		enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);  in bcm_enet_open()
1032 		enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->rx_chan);  in bcm_enet_open()
1042 			 ENETDMAC_MAXBURST, priv->rx_chan);  in bcm_enet_open()
1052 		enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));  in bcm_enet_open()
1054 		enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));  in bcm_enet_open()
1056 		enet_dmac_writel(priv, 5, ENETDMAC_FC, priv->rx_chan);  in bcm_enet_open()
1057 		enet_dmac_writel(priv, priv->rx_ring_size, ENETDMAC_LEN, priv->rx_chan);  in bcm_enet_open()
1070 			 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enet_open()
1078 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enet_open()
1086 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_open()
1201 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enet_stop()
1209 	bcm_enet_disable_dma(priv, priv->rx_chan);  in bcm_enet_stop()
1778 		priv->rx_chan = 0;  in bcm_enet_probe()
1782 		priv->rx_chan = 2;  in bcm_enet_probe()
2164 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_open()
2267 			ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enetsw_open()
2277 			 ENETDMAS_RSTART_REG, priv->rx_chan);  in bcm_enetsw_open()
2282 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);  in bcm_enetsw_open()
2284 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);  in bcm_enetsw_open()
2286 	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);  in bcm_enetsw_open()
2291 			 ENETDMAC_MAXBURST, priv->rx_chan);  in bcm_enetsw_open()
2297 	enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));  in bcm_enetsw_open()
2299 	enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));  in bcm_enetsw_open()
2307 			 ENETDMAC_CHANCFG, priv->rx_chan);  in bcm_enetsw_open()
2311 			 ENETDMAC_IR, priv->rx_chan);  in bcm_enetsw_open()
2319 			 ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_open()
2423 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);  in bcm_enetsw_stop()
2428 	bcm_enet_disable_dma(priv, priv->rx_chan);  in bcm_enetsw_stop()
2788 	priv->rx_chan = 0;  in bcm_enetsw_probe()