48 	s32 ret_val;  in igb_get_bus_info_pcie()  local
54 	ret_val = igb_read_pcie_cap_reg(hw,  in igb_get_bus_info_pcie()
57 	if (ret_val) {  in igb_get_bus_info_pcie()
200 	s32 ret_val = 0;  in igb_vfta_set()  local
206 		ret_val = -E1000_ERR_CONFIG;  in igb_vfta_set()
219 	return ret_val;  in igb_vfta_set()
236 	s32 ret_val = 0;  in igb_check_alt_mac_addr()  local
246 	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,  in igb_check_alt_mac_addr()
248 	if (ret_val) {  in igb_check_alt_mac_addr()
267 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);  in igb_check_alt_mac_addr()
268 		if (ret_val) {  in igb_check_alt_mac_addr()
290 	return ret_val;  in igb_check_alt_mac_addr()
525 	s32 ret_val;  in igb_check_for_copper_link()  local
534 		ret_val = 0;  in igb_check_for_copper_link()
542 	ret_val = igb_phy_has_link(hw, 1, 0, &link);  in igb_check_for_copper_link()
543 	if (ret_val)  in igb_check_for_copper_link()
560 		ret_val = -E1000_ERR_CONFIG;  in igb_check_for_copper_link()
575 	ret_val = igb_config_fc_after_link_up(hw);  in igb_check_for_copper_link()
576 	if (ret_val)  in igb_check_for_copper_link()
580 	return ret_val;  in igb_check_for_copper_link()
595 	s32 ret_val = 0;  in igb_setup_link()  local
607 		ret_val = igb_set_default_fc(hw);  in igb_setup_link()
608 		if (ret_val)  in igb_setup_link()
621 	ret_val = hw->mac.ops.setup_physical_interface(hw);  in igb_setup_link()
622 	if (ret_val)  in igb_setup_link()
637 	ret_val = igb_set_fc_watermarks(hw);  in igb_setup_link()
641 	return ret_val;  in igb_setup_link()
675 	s32 ret_val = 0;  in igb_set_fc_watermarks()  local
698 	return ret_val;  in igb_set_fc_watermarks()
710 	s32 ret_val = 0;  in igb_set_default_fc()  local
724 		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG  in igb_set_default_fc()
727 		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG,  in igb_set_default_fc()
731 	if (ret_val) {  in igb_set_default_fc()
745 	return ret_val;  in igb_set_default_fc()
761 	s32 ret_val = 0;  in igb_force_mac_fc()  local
801 		ret_val = -E1000_ERR_CONFIG;  in igb_force_mac_fc()
808 	return ret_val;  in igb_force_mac_fc()
824 	s32 ret_val = 0;  in igb_config_fc_after_link_up()  local
835 			ret_val = igb_force_mac_fc(hw);  in igb_config_fc_after_link_up()
838 			ret_val = igb_force_mac_fc(hw);  in igb_config_fc_after_link_up()
841 	if (ret_val) {  in igb_config_fc_after_link_up()
856 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,  in igb_config_fc_after_link_up()
858 		if (ret_val)  in igb_config_fc_after_link_up()
860 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS,  in igb_config_fc_after_link_up()
862 		if (ret_val)  in igb_config_fc_after_link_up()
876 		ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,  in igb_config_fc_after_link_up()
878 		if (ret_val)  in igb_config_fc_after_link_up()
880 		ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,  in igb_config_fc_after_link_up()
882 		if (ret_val)  in igb_config_fc_after_link_up()
996 		ret_val = hw->mac.ops.get_speed_and_duplex(hw, &speed, &duplex);  in igb_config_fc_after_link_up()
997 		if (ret_val) {  in igb_config_fc_after_link_up()
1008 		ret_val = igb_force_mac_fc(hw);  in igb_config_fc_after_link_up()
1009 		if (ret_val) {  in igb_config_fc_after_link_up()
1028 			return ret_val;  in igb_config_fc_after_link_up()
1131 		ret_val = igb_force_mac_fc(hw);  in igb_config_fc_after_link_up()
1132 		if (ret_val) {  in igb_config_fc_after_link_up()
1134 			return ret_val;  in igb_config_fc_after_link_up()
1139 	return ret_val;  in igb_config_fc_after_link_up()
1188 	s32 ret_val = 0;  in igb_get_hw_semaphore()  local
1204 		ret_val = -E1000_ERR_NVM;  in igb_get_hw_semaphore()
1224 		ret_val = -E1000_ERR_NVM;  in igb_get_hw_semaphore()
1229 	return ret_val;  in igb_get_hw_semaphore()
1258 	s32 ret_val = 0;  in igb_get_auto_rd_done()  local
1270 		ret_val = -E1000_ERR_RESET;  in igb_get_auto_rd_done()
1275 	return ret_val;  in igb_get_auto_rd_done()
1288 	s32 ret_val;  in igb_valid_led_default()  local
1290 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);  in igb_valid_led_default()
1291 	if (ret_val) {  in igb_valid_led_default()
1308 	return ret_val;  in igb_valid_led_default()
1319 	s32 ret_val;  in igb_id_led_init()  local
1329 		ret_val = igb_valid_led_default_i210(hw, &data);  in igb_id_led_init()
1331 		ret_val = igb_valid_led_default(hw, &data);  in igb_id_led_init()
1333 	if (ret_val)  in igb_id_led_init()
1379 	return ret_val;  in igb_id_led_init()
1474 	s32 ret_val = 0;  in igb_disable_pcie_master()  local
1493 		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;  in igb_disable_pcie_master()
1498 	return ret_val;  in igb_disable_pcie_master()
1510 	s32 ret_val = 0;  in igb_validate_mdi_setting()  local
1519 		ret_val = -E1000_ERR_CONFIG;  in igb_validate_mdi_setting()
1524 	return ret_val;  in igb_validate_mdi_setting()
1542 	s32 ret_val = 0;  in igb_write_8bit_ctrl_reg()  local
1557 		ret_val = -E1000_ERR_PHY;  in igb_write_8bit_ctrl_reg()
1562 	return ret_val;  in igb_write_8bit_ctrl_reg()
1576 	bool ret_val = false;  in igb_enable_mng_pass_thru()  local
1593 			ret_val = true;  in igb_enable_mng_pass_thru()
1599 			ret_val = true;  in igb_enable_mng_pass_thru()
1605 	return ret_val;  in igb_enable_mng_pass_thru()