Lines Matching refs:d2

321 	movel #TX_BUFFERS - 2, %d2	// D2 = TX_BUFFERS - 1 counter
330 	dbfw %d2, open_port_tx_loop
337 	movel #RX_BUFFERS - 2, %d2	// D2 = RX_BUFFERS - 1 counter
342 	dbfw %d2, open_port_rx_loop
454 	movel %d1, %d2			// D1 = D2 = tx_out BD# = desc#
455 	mulul #DESC_LENGTH, %d2		// D2 = TX desc offset
456 	addl ch_status_addr(%d0), %d2
457 	addl #STATUS_TX_DESCS, %d2	// D2 = TX desc address
458 	cmpl #PACKET_FULL, (%d2)	// desc status
462 	movel 4(%d2), %a0		// PCI address
467 	movel 8(%d2), %d2		// D2 = length
468 	movew %d2, 2(%d1)		// length into BD
469 	memcpy_from_pci %a0, %a1, %d2
492 	movew (%d1), %d2		// D2 = RX BD flags
493 	btstl #15, %d2
496 	btstl #1, %d2
501 	bclrl #2, %d2			// do not test for CRC errors
503 	andw #0x0CBC, %d2		// mask status bits
504 	cmpw #0x0C00, %d2		// correct frame
513 	movel rx_out, %d2
514 	mulul #DESC_LENGTH, %d2
515 	addl rx_descs_addr, %d2		// D2 = RX desc address
516 	cmpl #PACKET_EMPTY, (%d2)	// desc stat
519 	movel %d3, 8(%d2)
521 	movel 4(%d2), %a1
526 	movel packet_full(%d0), (%d2)	// update desc stat
530 	movel rx_out, %d2
531 	addl #1, %d2
532 	cmpl #RX_QUEUE_LENGTH, %d2
534 	clrl %d2
535 rx_1:	movel %d2, rx_out
550 	movel ch_status_addr(%d0), %d2
551 	addl #1, STATUS_RX_OVERRUNS(%d2)
555 	movel ch_status_addr(%d0), %d2
556 	addl #1, STATUS_RX_FRAME_ERRORS(%d2)
569 	movel %d1, %d2			// D1 = D2 = tx_in BD# = desc#
588 	mulul #DESC_LENGTH, %d2		// D2 = TX desc offset
589 	addl ch_status_addr(%d0), %d2
590 	addl #STATUS_TX_DESCS, %d2	// D2 = TX desc address
593 	movel #PACKET_SENT, (%d2)
597 	movel #PACKET_UNDERRUN, (%d2)
689 	movel %d2, -(%sp)
724 	movew #0x80E7, %d2		// D2 = input mask: ignore DSR
728 	movew csr_output(%d0), %d2
729 	andw #0x3000, %d2		// D2 = requested LL and DTR bits
730 	orw %d2, %d1			// D1 = all requested output bits
731 	movew #0x80FF, %d2		// D2 = input mask: include DSR
751 	andw %d2, %d1			// input mask
766 	movel (%sp)+, %d2