Lines Matching refs:AR5K_PHY_AGCCTL
1606 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) { in ath5k_hw_update_noise_floor()
1638 AR5K_REG_MASKED_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF, in ath5k_hw_update_noise_floor()
1641 ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF, in ath5k_hw_update_noise_floor()
1652 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_update_noise_floor()
1745 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_CAL); in ath5k_hw_rf5110_calibrate()
1747 ret = ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, in ath5k_hw_rf5110_calibrate()
2224 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
2227 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
2231 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
3844 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()
3939 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()
3955 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()