Lines Matching refs:pModal
338 struct modal_eep_header *pModal = in ath9k_hw_def_check_eeprom() local
340 integer = swab32(pModal->antCtrlCommon); in ath9k_hw_def_check_eeprom()
341 pModal->antCtrlCommon = integer; in ath9k_hw_def_check_eeprom()
344 integer = swab32(pModal->antCtrlChain[i]); in ath9k_hw_def_check_eeprom()
345 pModal->antCtrlChain[i] = integer; in ath9k_hw_def_check_eeprom()
348 word = swab16(pModal->xpaBiasLvlFreq[i]); in ath9k_hw_def_check_eeprom()
349 pModal->xpaBiasLvlFreq[i] = word; in ath9k_hw_def_check_eeprom()
353 word = swab16(pModal->spurChans[i].spurChan); in ath9k_hw_def_check_eeprom()
354 pModal->spurChans[i].spurChan = word; in ath9k_hw_def_check_eeprom()
383 struct modal_eep_header *pModal = eep->modalHeader; in ath9k_hw_def_get_eeprom() local
389 return pModal[0].noiseFloorThreshCh[0]; in ath9k_hw_def_get_eeprom()
391 return pModal[1].noiseFloorThreshCh[0]; in ath9k_hw_def_get_eeprom()
407 return pModal[0].ob; in ath9k_hw_def_get_eeprom()
409 return pModal[0].db; in ath9k_hw_def_get_eeprom()
411 return pModal[1].ob; in ath9k_hw_def_get_eeprom()
413 return pModal[1].db; in ath9k_hw_def_get_eeprom()
456 pModal[band].antennaGainCh[0], in ath9k_hw_def_get_eeprom()
457 pModal[band].antennaGainCh[1]), in ath9k_hw_def_get_eeprom()
458 pModal[band].antennaGainCh[2]); in ath9k_hw_def_get_eeprom()
465 struct modal_eep_header *pModal, in ath9k_hw_def_set_gain() argument
471 txRxAttenLocal = pModal->txRxAttenCh[i]; in ath9k_hw_def_set_gain()
476 pModal->bswMargin[i]); in ath9k_hw_def_set_gain()
479 pModal->bswAtten[i]); in ath9k_hw_def_set_gain()
482 pModal->xatten2Margin[i]); in ath9k_hw_def_set_gain()
485 pModal->xatten2Db[i]); in ath9k_hw_def_set_gain()
488 SM(pModal-> bswMargin[i], AR_PHY_GAIN_2GHZ_BSW_MARGIN), in ath9k_hw_def_set_gain()
491 SM(pModal->bswAtten[i], AR_PHY_GAIN_2GHZ_BSW_ATTEN), in ath9k_hw_def_set_gain()
502 AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]); in ath9k_hw_def_set_gain()
508 SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN), in ath9k_hw_def_set_gain()
517 struct modal_eep_header *pModal; in ath9k_hw_def_set_board_values() local
522 pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); in ath9k_hw_def_set_board_values()
525 REG_WRITE(ah, AR_PHY_SWITCH_COM, pModal->antCtrlCommon & 0xffff); in ath9k_hw_def_set_board_values()
539 pModal->antCtrlChain[i]); in ath9k_hw_def_set_board_values()
545 SM(pModal->iqCalICh[i], in ath9k_hw_def_set_board_values()
547 SM(pModal->iqCalQCh[i], in ath9k_hw_def_set_board_values()
550 ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal, in ath9k_hw_def_set_board_values()
559 pModal->ob); in ath9k_hw_def_set_board_values()
563 pModal->db); in ath9k_hw_def_set_board_values()
567 pModal->ob_ch1); in ath9k_hw_def_set_board_values()
571 pModal->db_ch1); in ath9k_hw_def_set_board_values()
576 pModal->ob); in ath9k_hw_def_set_board_values()
580 pModal->db); in ath9k_hw_def_set_board_values()
584 pModal->ob_ch1); in ath9k_hw_def_set_board_values()
588 pModal->db_ch1); in ath9k_hw_def_set_board_values()
593 pModal->xpaBiasLvl); in ath9k_hw_def_set_board_values()
597 !!(pModal->lna_ctl & in ath9k_hw_def_set_board_values()
600 !!(pModal->lna_ctl & LNA_CTL_FORCE_XPA)); in ath9k_hw_def_set_board_values()
604 pModal->switchSettling); in ath9k_hw_def_set_board_values()
606 pModal->adcDesiredSize); in ath9k_hw_def_set_board_values()
611 pModal->pgaDesiredSize); in ath9k_hw_def_set_board_values()
614 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) in ath9k_hw_def_set_board_values()
615 | SM(pModal->txEndToXpaOff, in ath9k_hw_def_set_board_values()
617 | SM(pModal->txFrameToXpaOn, in ath9k_hw_def_set_board_values()
619 | SM(pModal->txFrameToXpaOn, in ath9k_hw_def_set_board_values()
623 pModal->txEndToRxOn); in ath9k_hw_def_set_board_values()
627 pModal->thresh62); in ath9k_hw_def_set_board_values()
630 pModal->thresh62); in ath9k_hw_def_set_board_values()
633 pModal->thresh62); in ath9k_hw_def_set_board_values()
636 pModal->thresh62); in ath9k_hw_def_set_board_values()
642 pModal->txFrameToDataStart); in ath9k_hw_def_set_board_values()
644 pModal->txFrameToPaOn); in ath9k_hw_def_set_board_values()
651 pModal->swSettleHt40); in ath9k_hw_def_set_board_values()
658 pModal->miscBits); in ath9k_hw_def_set_board_values()
674 pModal->miscBits >> 2); in ath9k_hw_def_set_board_values()
685 #define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt]) in ath9k_hw_def_set_addac()
686 struct modal_eep_header *pModal; in ath9k_hw_def_set_addac() local
696 pModal = &(eep->modalHeader[IS_CHAN_2GHZ(chan)]); in ath9k_hw_def_set_addac()
698 if (pModal->xpaBiasLvl != 0xff) { in ath9k_hw_def_set_addac()
699 biaslevel = pModal->xpaBiasLvl; in ath9k_hw_def_set_addac()
1197 struct modal_eep_header *pModal = in ath9k_hw_def_set_txpower() local
1207 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; in ath9k_hw_def_set_txpower()
1326 ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6) in ath9k_hw_def_set_txpower()
1327 | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)); in ath9k_hw_def_set_txpower()