23 #define REG_READ			(common->ops->read)
24 #define REG_WRITE(_ah, _reg, _val)	(common->ops->write)(_ah, _val, _reg)
118 void ath_hw_setbssidmask(struct ath_common *common)  in ath_hw_setbssidmask()  argument
120 	void *ah = common->ah;  in ath_hw_setbssidmask()
123 	REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));  in ath_hw_setbssidmask()
125 	id1 |= get_unaligned_le16(common->macaddr + 4);  in ath_hw_setbssidmask()
128 	REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));  in ath_hw_setbssidmask()
129 	REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));  in ath_hw_setbssidmask()
142 void ath_hw_cycle_counters_update(struct ath_common *common)  in ath_hw_cycle_counters_update()  argument
145 	void *ah = common->ah;  in ath_hw_cycle_counters_update()
166 	common->cc_ani.cycles += cycles;  in ath_hw_cycle_counters_update()
167 	common->cc_ani.rx_busy += busy;  in ath_hw_cycle_counters_update()
168 	common->cc_ani.rx_frame += rx;  in ath_hw_cycle_counters_update()
169 	common->cc_ani.tx_frame += tx;  in ath_hw_cycle_counters_update()
171 	common->cc_survey.cycles += cycles;  in ath_hw_cycle_counters_update()
172 	common->cc_survey.rx_busy += busy;  in ath_hw_cycle_counters_update()
173 	common->cc_survey.rx_frame += rx;  in ath_hw_cycle_counters_update()
174 	common->cc_survey.tx_frame += tx;  in ath_hw_cycle_counters_update()
178 int32_t ath_hw_get_listen_time(struct ath_common *common)  in ath_hw_get_listen_time()  argument
180 	struct ath_cycle_counters *cc = &common->cc_ani;  in ath_hw_get_listen_time()
184 		      (common->clockrate * 1000);  in ath_hw_get_listen_time()