90 #define wlc_lcnphy_enable_tx_gain_override(pi) \  argument
91 	wlc_lcnphy_set_tx_gain_override(pi, true)
92 #define wlc_lcnphy_disable_tx_gain_override(pi)	\  argument
93 	wlc_lcnphy_set_tx_gain_override(pi, false)
95 #define wlc_lcnphy_iqcal_active(pi)	\  argument
96 	(read_phy_reg((pi), 0x451) & \
99 #define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13))  argument
100 #define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)	\  argument
101 	(pi->temppwrctrl_capable)
102 #define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \  argument
103 	(pi->hwpwrctrl_capable)
145 #define wlc_lcnphy_tx_gain_override_enabled(pi)	\  argument
146 	(0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6)))
148 #define wlc_lcnphy_total_tx_frames(pi) \  argument
149 	wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + \
930 #define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \  argument
931 	mod_phy_reg(pi, 0x4a4, \
935 #define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \  argument
936 	mod_phy_reg(pi, 0x4a5, \
940 #define wlc_lcnphy_get_tx_pwr_ctrl(pi) \  argument
941 	(read_phy_reg((pi), 0x4a4) & \
946 #define wlc_lcnphy_get_tx_pwr_npt(pi) \  argument
947 	((read_phy_reg(pi, 0x4a5) & \
951 #define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \  argument
952 	(read_phy_reg(pi, 0x473) & 0x1ff)
954 #define wlc_lcnphy_get_target_tx_pwr(pi) \  argument
955 	((read_phy_reg(pi, 0x4a7) & \
959 #define wlc_lcnphy_set_target_tx_pwr(pi, target) \  argument
960 	mod_phy_reg(pi, 0x4a7, \
964 #define wlc_radio_2064_rcal_done(pi) \  argument
965 	(0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
967 #define tempsense_done(pi) \  argument
968 	(0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
976 void wlc_lcnphy_write_table(struct brcms_phy *pi, const struct phytbl_info *pti)  in wlc_lcnphy_write_table()  argument
978 	wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456);  in wlc_lcnphy_write_table()
981 void wlc_lcnphy_read_table(struct brcms_phy *pi, struct phytbl_info *pti)  in wlc_lcnphy_read_table()  argument
983 	wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456);  in wlc_lcnphy_read_table()
987 wlc_lcnphy_common_read_table(struct brcms_phy *pi, u32 tbl_id,  in wlc_lcnphy_common_read_table()  argument
997 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_common_read_table()
1001 wlc_lcnphy_common_write_table(struct brcms_phy *pi, u32 tbl_id,  in wlc_lcnphy_common_write_table()  argument
1012 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_common_write_table()
1062 wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, struct lcnphy_txgains *gains)  in wlc_lcnphy_get_tx_gain()  argument
1066 	dac_gain = read_phy_reg(pi, 0x439) >> 0;  in wlc_lcnphy_get_tx_gain()
1069 	rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0;  in wlc_lcnphy_get_tx_gain()
1070 	rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0;  in wlc_lcnphy_get_tx_gain()
1078 static void wlc_lcnphy_set_dac_gain(struct brcms_phy *pi, u16 dac_gain)  in wlc_lcnphy_set_dac_gain()  argument
1082 	dac_ctrl = (read_phy_reg(pi, 0x439) >> 0);  in wlc_lcnphy_set_dac_gain()
1085 	mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0);  in wlc_lcnphy_set_dac_gain()
1089 static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable)  in wlc_lcnphy_set_tx_gain_override()  argument
1093 	mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7);  in wlc_lcnphy_set_tx_gain_override()
1095 	mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14);  in wlc_lcnphy_set_tx_gain_override()
1097 	mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6);  in wlc_lcnphy_set_tx_gain_override()
1101 wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, bool enable)  in wlc_lcnphy_rx_gain_override_enable()  argument
1105 	mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8);  in wlc_lcnphy_rx_gain_override_enable()
1107 	mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0);  in wlc_lcnphy_rx_gain_override_enable()
1109 	if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_rx_gain_override_enable()
1110 		mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4);  in wlc_lcnphy_rx_gain_override_enable()
1111 		mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6);  in wlc_lcnphy_rx_gain_override_enable()
1112 		mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);  in wlc_lcnphy_rx_gain_override_enable()
1113 		mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6);  in wlc_lcnphy_rx_gain_override_enable()
1115 		mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12);  in wlc_lcnphy_rx_gain_override_enable()
1116 		mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13);  in wlc_lcnphy_rx_gain_override_enable()
1117 		mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);  in wlc_lcnphy_rx_gain_override_enable()
1120 	if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_rx_gain_override_enable()
1121 		mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10);  in wlc_lcnphy_rx_gain_override_enable()
1122 		mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3);  in wlc_lcnphy_rx_gain_override_enable()
1127 wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,  in wlc_lcnphy_set_rx_gain_by_distribution()  argument
1144 	mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);  in wlc_lcnphy_set_rx_gain_by_distribution()
1145 	mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);  in wlc_lcnphy_set_rx_gain_by_distribution()
1146 	mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);  in wlc_lcnphy_set_rx_gain_by_distribution()
1148 	if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_set_rx_gain_by_distribution()
1149 		mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);  in wlc_lcnphy_set_rx_gain_by_distribution()
1150 		mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);  in wlc_lcnphy_set_rx_gain_by_distribution()
1152 		mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10);  in wlc_lcnphy_set_rx_gain_by_distribution()
1154 		mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15);  in wlc_lcnphy_set_rx_gain_by_distribution()
1156 		mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);  in wlc_lcnphy_set_rx_gain_by_distribution()
1159 	mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0);  in wlc_lcnphy_set_rx_gain_by_distribution()
1163 static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, bool rx)  in wlc_lcnphy_set_trsw_override()  argument
1166 	mod_phy_reg(pi, 0x44d,  in wlc_lcnphy_set_trsw_override()
1170 	or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0));  in wlc_lcnphy_set_trsw_override()
1173 static void wlc_lcnphy_clear_trsw_override(struct brcms_phy *pi)  in wlc_lcnphy_clear_trsw_override()  argument
1176 	and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0)));  in wlc_lcnphy_clear_trsw_override()
1179 static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b)  in wlc_lcnphy_set_rx_iq_comp()  argument
1181 	mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1183 	mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1185 	mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1187 	mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1189 	mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1191 	mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0);  in wlc_lcnphy_set_rx_iq_comp()
1196 wlc_lcnphy_rx_iq_est(struct brcms_phy *pi,  in wlc_lcnphy_rx_iq_est()  argument
1203 	phybw40 = CHSPEC_IS40(pi->radio_chanspec);  in wlc_lcnphy_rx_iq_est()
1205 	mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5);  in wlc_lcnphy_rx_iq_est()
1207 	mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3);  in wlc_lcnphy_rx_iq_est()
1209 	mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0);  in wlc_lcnphy_rx_iq_est()
1211 	mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0);  in wlc_lcnphy_rx_iq_est()
1213 	mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8);  in wlc_lcnphy_rx_iq_est()
1215 	mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9);  in wlc_lcnphy_rx_iq_est()
1217 	while (read_phy_reg(pi, 0x481) & (0x1 << 9)) {  in wlc_lcnphy_rx_iq_est()
1227 	iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |  in wlc_lcnphy_rx_iq_est()
1228 			  (u32) read_phy_reg(pi, 0x484);  in wlc_lcnphy_rx_iq_est()
1229 	iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |  in wlc_lcnphy_rx_iq_est()
1230 			(u32) read_phy_reg(pi, 0x486);  in wlc_lcnphy_rx_iq_est()
1231 	iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |  in wlc_lcnphy_rx_iq_est()
1232 			(u32) read_phy_reg(pi, 0x488);  in wlc_lcnphy_rx_iq_est()
1235 	mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);  in wlc_lcnphy_rx_iq_est()
1237 	mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);  in wlc_lcnphy_rx_iq_est()
1242 static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps)  in wlc_lcnphy_calc_rx_iq_comp()  argument
1252 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_calc_rx_iq_comp()
1254 	a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0);  in wlc_lcnphy_calc_rx_iq_comp()
1255 	b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0);  in wlc_lcnphy_calc_rx_iq_comp()
1256 	mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2);  in wlc_lcnphy_calc_rx_iq_comp()
1258 	mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6);  in wlc_lcnphy_calc_rx_iq_comp()
1260 	wlc_lcnphy_set_rx_iq_comp(pi, 0, 0);  in wlc_lcnphy_calc_rx_iq_comp()
1262 	result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est);  in wlc_lcnphy_calc_rx_iq_comp()
1311 	wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);  in wlc_lcnphy_calc_rx_iq_comp()
1313 	mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0);  in wlc_lcnphy_calc_rx_iq_comp()
1315 	mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3);  in wlc_lcnphy_calc_rx_iq_comp()
1323 static u32 wlc_lcnphy_measure_digital_power(struct brcms_phy *pi, u16 nsamples)  in wlc_lcnphy_measure_digital_power()  argument
1327 	if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est))  in wlc_lcnphy_measure_digital_power()
1332 static bool wlc_lcnphy_rx_iq_cal_gain(struct brcms_phy *pi, u16 biq1_gain,  in wlc_lcnphy_rx_iq_cal_gain()  argument
1339 	wlc_lcnphy_set_rx_gain_by_distribution(pi, 0, 0, 0, biq1_gain, tia_gain,  in wlc_lcnphy_rx_iq_cal_gain()
1342 	wlc_lcnphy_rx_gain_override_enable(pi, true);  in wlc_lcnphy_rx_iq_cal_gain()
1343 	wlc_lcnphy_start_tx_tone(pi, 2000, (40 >> 1), 0);  in wlc_lcnphy_rx_iq_cal_gain()
1345 	write_radio_reg(pi, RADIO_2064_REG112, 0);  in wlc_lcnphy_rx_iq_cal_gain()
1346 	if (!wlc_lcnphy_rx_iq_est(pi, 1024, 32, &iq_est_l))  in wlc_lcnphy_rx_iq_cal_gain()
1349 	wlc_lcnphy_start_tx_tone(pi, 2000, 40, 0);  in wlc_lcnphy_rx_iq_cal_gain()
1351 	write_radio_reg(pi, RADIO_2064_REG112, 0);  in wlc_lcnphy_rx_iq_cal_gain()
1352 	if (!wlc_lcnphy_rx_iq_est(pi, 1024, 32, &iq_est_h))  in wlc_lcnphy_rx_iq_cal_gain()
1370 wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,  in wlc_lcnphy_rx_iq_cal()  argument
1388 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_rx_iq_cal()
1396 			    CHSPEC_CHANNEL(pi->radio_chanspec)) {  in wlc_lcnphy_rx_iq_cal()
1397 				wlc_lcnphy_set_rx_iq_comp(pi,  in wlc_lcnphy_rx_iq_cal()
1410 	tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_rx_iq_cal()
1411 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_rx_iq_cal()
1415 			read_radio_reg(pi, rxiq_cal_rf_reg[i]);  in wlc_lcnphy_rx_iq_cal()
1416 	Core1TxControl_old = read_phy_reg(pi, 0x631);  in wlc_lcnphy_rx_iq_cal()
1418 	or_phy_reg(pi, 0x631, 0x0015);  in wlc_lcnphy_rx_iq_cal()
1420 	RFOverride0_old = read_phy_reg(pi, 0x44c);  in wlc_lcnphy_rx_iq_cal()
1421 	RFOverrideVal0_old = read_phy_reg(pi, 0x44d);  in wlc_lcnphy_rx_iq_cal()
1422 	rfoverride2_old = read_phy_reg(pi, 0x4b0);  in wlc_lcnphy_rx_iq_cal()
1423 	rfoverride2val_old = read_phy_reg(pi, 0x4b1);  in wlc_lcnphy_rx_iq_cal()
1424 	rfoverride3_old = read_phy_reg(pi, 0x4f9);  in wlc_lcnphy_rx_iq_cal()
1425 	rfoverride3val_old = read_phy_reg(pi, 0x4fa);  in wlc_lcnphy_rx_iq_cal()
1426 	rfoverride4_old = read_phy_reg(pi, 0x938);  in wlc_lcnphy_rx_iq_cal()
1427 	rfoverride4val_old = read_phy_reg(pi, 0x939);  in wlc_lcnphy_rx_iq_cal()
1428 	afectrlovr_old = read_phy_reg(pi, 0x43b);  in wlc_lcnphy_rx_iq_cal()
1429 	afectrlovrval_old = read_phy_reg(pi, 0x43c);  in wlc_lcnphy_rx_iq_cal()
1430 	old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);  in wlc_lcnphy_rx_iq_cal()
1431 	old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);  in wlc_lcnphy_rx_iq_cal()
1433 	tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);  in wlc_lcnphy_rx_iq_cal()
1435 		wlc_lcnphy_get_tx_gain(pi, &old_gains);  in wlc_lcnphy_rx_iq_cal()
1439 	wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx);  in wlc_lcnphy_rx_iq_cal()
1441 	mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);  in wlc_lcnphy_rx_iq_cal()
1442 	mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);  in wlc_lcnphy_rx_iq_cal()
1444 	mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);  in wlc_lcnphy_rx_iq_cal()
1445 	mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);  in wlc_lcnphy_rx_iq_cal()
1447 	write_radio_reg(pi, RADIO_2064_REG116, 0x06);  in wlc_lcnphy_rx_iq_cal()
1448 	write_radio_reg(pi, RADIO_2064_REG12C, 0x07);  in wlc_lcnphy_rx_iq_cal()
1449 	write_radio_reg(pi, RADIO_2064_REG06A, 0xd3);  in wlc_lcnphy_rx_iq_cal()
1450 	write_radio_reg(pi, RADIO_2064_REG098, 0x03);  in wlc_lcnphy_rx_iq_cal()
1451 	write_radio_reg(pi, RADIO_2064_REG00B, 0x7);  in wlc_lcnphy_rx_iq_cal()
1452 	mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4);  in wlc_lcnphy_rx_iq_cal()
1453 	write_radio_reg(pi, RADIO_2064_REG01D, 0x01);  in wlc_lcnphy_rx_iq_cal()
1454 	write_radio_reg(pi, RADIO_2064_REG114, 0x01);  in wlc_lcnphy_rx_iq_cal()
1455 	write_radio_reg(pi, RADIO_2064_REG02E, 0x10);  in wlc_lcnphy_rx_iq_cal()
1456 	write_radio_reg(pi, RADIO_2064_REG12A, 0x08);  in wlc_lcnphy_rx_iq_cal()
1458 	mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0);  in wlc_lcnphy_rx_iq_cal()
1459 	mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0);  in wlc_lcnphy_rx_iq_cal()
1460 	mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1);  in wlc_lcnphy_rx_iq_cal()
1461 	mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1);  in wlc_lcnphy_rx_iq_cal()
1462 	mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2);  in wlc_lcnphy_rx_iq_cal()
1463 	mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2);  in wlc_lcnphy_rx_iq_cal()
1464 	mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3);  in wlc_lcnphy_rx_iq_cal()
1465 	mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3);  in wlc_lcnphy_rx_iq_cal()
1466 	mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5);  in wlc_lcnphy_rx_iq_cal()
1467 	mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5);  in wlc_lcnphy_rx_iq_cal()
1469 	mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);  in wlc_lcnphy_rx_iq_cal()
1470 	mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);  in wlc_lcnphy_rx_iq_cal()
1472 	write_phy_reg(pi, 0x6da, 0xffff);  in wlc_lcnphy_rx_iq_cal()
1473 	or_phy_reg(pi, 0x6db, 0x3);  in wlc_lcnphy_rx_iq_cal()
1475 	wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);  in wlc_lcnphy_rx_iq_cal()
1479 				set_gain = wlc_lcnphy_rx_iq_cal_gain(pi,  in wlc_lcnphy_rx_iq_cal()
1489 				result = wlc_lcnphy_calc_rx_iq_comp(pi, 1024);  in wlc_lcnphy_rx_iq_cal()
1496 	wlc_lcnphy_stop_tx_tone(pi);  in wlc_lcnphy_rx_iq_cal()
1498 	write_phy_reg(pi, 0x631, Core1TxControl_old);  in wlc_lcnphy_rx_iq_cal()
1500 	write_phy_reg(pi, 0x44c, RFOverrideVal0_old);  in wlc_lcnphy_rx_iq_cal()
1501 	write_phy_reg(pi, 0x44d, RFOverrideVal0_old);  in wlc_lcnphy_rx_iq_cal()
1502 	write_phy_reg(pi, 0x4b0, rfoverride2_old);  in wlc_lcnphy_rx_iq_cal()
1503 	write_phy_reg(pi, 0x4b1, rfoverride2val_old);  in wlc_lcnphy_rx_iq_cal()
1504 	write_phy_reg(pi, 0x4f9, rfoverride3_old);  in wlc_lcnphy_rx_iq_cal()
1505 	write_phy_reg(pi, 0x4fa, rfoverride3val_old);  in wlc_lcnphy_rx_iq_cal()
1506 	write_phy_reg(pi, 0x938, rfoverride4_old);  in wlc_lcnphy_rx_iq_cal()
1507 	write_phy_reg(pi, 0x939, rfoverride4val_old);  in wlc_lcnphy_rx_iq_cal()
1508 	write_phy_reg(pi, 0x43b, afectrlovr_old);  in wlc_lcnphy_rx_iq_cal()
1509 	write_phy_reg(pi, 0x43c, afectrlovrval_old);  in wlc_lcnphy_rx_iq_cal()
1510 	write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);  in wlc_lcnphy_rx_iq_cal()
1511 	write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl);  in wlc_lcnphy_rx_iq_cal()
1513 	wlc_lcnphy_clear_trsw_override(pi);  in wlc_lcnphy_rx_iq_cal()
1515 	mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2);  in wlc_lcnphy_rx_iq_cal()
1518 		write_radio_reg(pi, rxiq_cal_rf_reg[i],  in wlc_lcnphy_rx_iq_cal()
1522 		wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old);  in wlc_lcnphy_rx_iq_cal()
1524 		wlc_lcnphy_disable_tx_gain_override(pi);  in wlc_lcnphy_rx_iq_cal()
1526 	wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl);  in wlc_lcnphy_rx_iq_cal()
1527 	wlc_lcnphy_rx_gain_override_enable(pi, false);  in wlc_lcnphy_rx_iq_cal()
1534 s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi)  in wlc_lcnphy_get_current_tx_pwr_idx()  argument
1537 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_get_current_tx_pwr_idx()
1539 	if (txpwrctrl_off(pi))  in wlc_lcnphy_get_current_tx_pwr_idx()
1541 	else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_get_current_tx_pwr_idx()
1543 			      pi) / 2);  in wlc_lcnphy_get_current_tx_pwr_idx()
1549 void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel)  in wlc_lcnphy_crsuprs()  argument
1552 	afectrlovr = read_phy_reg(pi, 0x43b);  in wlc_lcnphy_crsuprs()
1553 	afectrlovrval = read_phy_reg(pi, 0x43c);  in wlc_lcnphy_crsuprs()
1555 		mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1);  in wlc_lcnphy_crsuprs()
1557 		mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1);  in wlc_lcnphy_crsuprs()
1559 		mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4);  in wlc_lcnphy_crsuprs()
1561 		mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6);  in wlc_lcnphy_crsuprs()
1563 		write_phy_reg(pi, 0x44b, 0xffff);  in wlc_lcnphy_crsuprs()
1564 		wlc_lcnphy_tx_pu(pi, 1);  in wlc_lcnphy_crsuprs()
1566 		mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8);  in wlc_lcnphy_crsuprs()
1568 		or_phy_reg(pi, 0x6da, 0x0080);  in wlc_lcnphy_crsuprs()
1570 		or_phy_reg(pi, 0x00a, 0x228);  in wlc_lcnphy_crsuprs()
1572 		and_phy_reg(pi, 0x00a, ~(0x228));  in wlc_lcnphy_crsuprs()
1574 		and_phy_reg(pi, 0x6da, 0xFF7F);  in wlc_lcnphy_crsuprs()
1575 		write_phy_reg(pi, 0x43b, afectrlovr);  in wlc_lcnphy_crsuprs()
1576 		write_phy_reg(pi, 0x43c, afectrlovrval);  in wlc_lcnphy_crsuprs()
1580 static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi)  in wlc_lcnphy_toggle_afe_pwdn()  argument
1584 	save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c);  in wlc_lcnphy_toggle_afe_pwdn()
1585 	save_AfeCtrlOvr = read_phy_reg(pi, 0x43b);  in wlc_lcnphy_toggle_afe_pwdn()
1587 	write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1);  in wlc_lcnphy_toggle_afe_pwdn()
1588 	write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1);  in wlc_lcnphy_toggle_afe_pwdn()
1590 	write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe);  in wlc_lcnphy_toggle_afe_pwdn()
1591 	write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe);  in wlc_lcnphy_toggle_afe_pwdn()
1593 	write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal);  in wlc_lcnphy_toggle_afe_pwdn()
1594 	write_phy_reg(pi, 0x43b, save_AfeCtrlOvr);  in wlc_lcnphy_toggle_afe_pwdn()
1598 wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, bool enable)  in wlc_lcnphy_txrx_spur_avoidance_mode()  argument
1601 		write_phy_reg(pi, 0x942, 0x7);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1602 		write_phy_reg(pi, 0x93b, ((1 << 13) + 23));  in wlc_lcnphy_txrx_spur_avoidance_mode()
1603 		write_phy_reg(pi, 0x93c, ((1 << 13) + 1989));  in wlc_lcnphy_txrx_spur_avoidance_mode()
1605 		write_phy_reg(pi, 0x44a, 0x084);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1606 		write_phy_reg(pi, 0x44a, 0x080);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1607 		write_phy_reg(pi, 0x6d3, 0x2222);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1608 		write_phy_reg(pi, 0x6d3, 0x2220);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1610 		write_phy_reg(pi, 0x942, 0x0);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1611 		write_phy_reg(pi, 0x93b, ((0 << 13) + 23));  in wlc_lcnphy_txrx_spur_avoidance_mode()
1612 		write_phy_reg(pi, 0x93c, ((0 << 13) + 1989));  in wlc_lcnphy_txrx_spur_avoidance_mode()
1614 	wlapi_switch_macfreq(pi->sh->physhim, enable);  in wlc_lcnphy_txrx_spur_avoidance_mode()
1618 wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, u16 chanspec)  in wlc_lcnphy_set_chanspec_tweaks()  argument
1621 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_set_chanspec_tweaks()
1624 		mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);  in wlc_lcnphy_set_chanspec_tweaks()
1626 		mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);  in wlc_lcnphy_set_chanspec_tweaks()
1635 		bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x2,  in wlc_lcnphy_set_chanspec_tweaks()
1637 		bcma_chipco_pll_maskset(&pi->d11core->bus->drv_cc, 0x3,  in wlc_lcnphy_set_chanspec_tweaks()
1639 		bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x4,  in wlc_lcnphy_set_chanspec_tweaks()
1642 		bcma_cc_set32(&pi->d11core->bus->drv_cc, BCMA_CC_PMU_CTL,  in wlc_lcnphy_set_chanspec_tweaks()
1644 		write_phy_reg(pi, 0x942, 0);  in wlc_lcnphy_set_chanspec_tweaks()
1645 		wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);  in wlc_lcnphy_set_chanspec_tweaks()
1647 		mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8);  in wlc_lcnphy_set_chanspec_tweaks()
1649 		write_phy_reg(pi, 0x425, 0x5907);  in wlc_lcnphy_set_chanspec_tweaks()
1651 		bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x2,  in wlc_lcnphy_set_chanspec_tweaks()
1653 		bcma_chipco_pll_maskset(&pi->d11core->bus->drv_cc, 0x3,  in wlc_lcnphy_set_chanspec_tweaks()
1655 		bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x4,  in wlc_lcnphy_set_chanspec_tweaks()
1658 		bcma_cc_set32(&pi->d11core->bus->drv_cc, BCMA_CC_PMU_CTL,  in wlc_lcnphy_set_chanspec_tweaks()
1660 		write_phy_reg(pi, 0x942, 0);  in wlc_lcnphy_set_chanspec_tweaks()
1661 		wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);  in wlc_lcnphy_set_chanspec_tweaks()
1664 		mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);  in wlc_lcnphy_set_chanspec_tweaks()
1666 		write_phy_reg(pi, 0x425, 0x590a);  in wlc_lcnphy_set_chanspec_tweaks()
1669 	or_phy_reg(pi, 0x44a, 0x44);  in wlc_lcnphy_set_chanspec_tweaks()
1670 	write_phy_reg(pi, 0x44a, 0x80);  in wlc_lcnphy_set_chanspec_tweaks()
1674 wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel)  in wlc_lcnphy_radio_2064_channel_tune_4313()  argument
1691 	mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1693 	write_radio_reg(pi, RADIO_2064_REG09E, 0xf);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1702 	if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_radio_2064_channel_tune_4313()
1713 	write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1715 	mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1717 	mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1719 	mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1721 	mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2,  in wlc_lcnphy_radio_2064_channel_tune_4313()
1724 	mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1726 	mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4,  in wlc_lcnphy_radio_2064_channel_tune_4313()
1729 	write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1731 	pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1732 	pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1734 	or_radio_reg(pi, RADIO_2064_REG044, 0x07);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1736 	or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1740 	fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1741 	if (pi->xtalfreq > 26000000)  in wlc_lcnphy_radio_2064_channel_tune_4313()
1743 	if (pi->xtalfreq > 52000000)  in wlc_lcnphy_radio_2064_channel_tune_4313()
1754 	qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1756 	qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ;  in wlc_lcnphy_radio_2064_channel_tune_4313()
1759 	write_radio_reg(pi, RADIO_2064_REG04F, 0x02);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1761 	d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1;  in wlc_lcnphy_radio_2064_channel_tune_4313()
1762 	write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2)));  in wlc_lcnphy_radio_2064_channel_tune_4313()
1763 	write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1766 	write_radio_reg(pi, RADIO_2064_REG051, d16);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1770 	mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0),  in wlc_lcnphy_radio_2064_channel_tune_4313()
1773 	or_radio_reg(pi, RADIO_2064_REG053, 0x10);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1774 	write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff));  in wlc_lcnphy_radio_2064_channel_tune_4313()
1785 	mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0),  in wlc_lcnphy_radio_2064_channel_tune_4313()
1787 	mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4),  in wlc_lcnphy_radio_2064_channel_tune_4313()
1789 	mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0),  in wlc_lcnphy_radio_2064_channel_tune_4313()
1791 	write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1792 	write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1794 	write_radio_reg(pi, RADIO_2064_REG040, 0xfb);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1796 	write_radio_reg(pi, RADIO_2064_REG041, 0x9A);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1797 	write_radio_reg(pi, RADIO_2064_REG042, 0xA3);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1798 	write_radio_reg(pi, RADIO_2064_REG043, 0x0C);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1810 	mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1813 		write_radio_reg(pi, RADIO_2064_REG03C, 0x8);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1815 		write_radio_reg(pi, RADIO_2064_REG03C, 0x7);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1816 	write_radio_reg(pi, RADIO_2064_REG03D, 0x3);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1818 	mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1821 	wlc_2064_vco_cal(pi);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1823 	write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1824 	write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1825 	if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {  in wlc_lcnphy_radio_2064_channel_tune_4313()
1826 		write_radio_reg(pi, RADIO_2064_REG038, 3);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1827 		write_radio_reg(pi, RADIO_2064_REG091, 7);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1830 	if (!(pi->sh->boardflags & BFL_FEM)) {  in wlc_lcnphy_radio_2064_channel_tune_4313()
1836 		write_radio_reg(pi, RADIO_2064_REG02A, 0xf);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1837 		write_radio_reg(pi, RADIO_2064_REG091, 0x3);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1838 		write_radio_reg(pi, RADIO_2064_REG038, 0x3);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1840 		write_radio_reg(pi, RADIO_2064_REG038, reg038[channel - 1]);  in wlc_lcnphy_radio_2064_channel_tune_4313()
1845 wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type)  in wlc_lcnphy_load_tx_iir_filter()  argument
1898 				write_phy_reg(pi, addr[j],  in wlc_lcnphy_load_tx_iir_filter()
1912 				write_phy_reg(pi, addr_ofdm[j],  in wlc_lcnphy_load_tx_iir_filter()
1921 static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi)  in wlc_lcnphy_get_pa_gain()  argument
1925 	pa_gain = (read_phy_reg(pi, 0x4fb) &  in wlc_lcnphy_get_pa_gain()
1932 static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi,  in wlc_lcnphy_set_tx_gain()  argument
1935 	u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);  in wlc_lcnphy_set_tx_gain()
1938 		pi, 0x4b5,  in wlc_lcnphy_set_tx_gain()
1943 	mod_phy_reg(pi, 0x4fb,  in wlc_lcnphy_set_tx_gain()
1948 		pi, 0x4fc,  in wlc_lcnphy_set_tx_gain()
1953 	mod_phy_reg(pi, 0x4fd,  in wlc_lcnphy_set_tx_gain()
1957 	wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain);  in wlc_lcnphy_set_tx_gain()
1959 	wlc_lcnphy_enable_tx_gain_override(pi);  in wlc_lcnphy_set_tx_gain()
1962 static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi)  in wlc_lcnphy_get_bbmult()  argument
1972 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_get_bbmult()
1977 static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0)  in wlc_lcnphy_set_bbmult()  argument
1987 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_set_bbmult()
1990 static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi)  in wlc_lcnphy_clear_tx_power_offsets()  argument
2001 	if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {  in wlc_lcnphy_clear_tx_power_offsets()
2005 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_clear_tx_power_offsets()
2010 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_clear_tx_power_offsets()
2020 wlc_lcnphy_set_tssi_mux(struct brcms_phy *pi, enum lcnphy_tssi_mode pos)  in wlc_lcnphy_set_tssi_mux()  argument
2022 	mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0);  in wlc_lcnphy_set_tssi_mux()
2024 	mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6);  in wlc_lcnphy_set_tssi_mux()
2027 		mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2);  in wlc_lcnphy_set_tssi_mux()
2029 		mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3);  in wlc_lcnphy_set_tssi_mux()
2031 		if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_set_tssi_mux()
2032 			mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);  in wlc_lcnphy_set_tssi_mux()
2034 			mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1);  in wlc_lcnphy_set_tssi_mux()
2035 			mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);  in wlc_lcnphy_set_tssi_mux()
2036 			mod_radio_reg(pi, RADIO_2064_REG028, 0x1, 0x0);  in wlc_lcnphy_set_tssi_mux()
2037 			mod_radio_reg(pi, RADIO_2064_REG11A, 0x4, 1<<2);  in wlc_lcnphy_set_tssi_mux()
2038 			mod_radio_reg(pi, RADIO_2064_REG036, 0x10, 0x0);  in wlc_lcnphy_set_tssi_mux()
2039 			mod_radio_reg(pi, RADIO_2064_REG11A, 0x10, 1<<4);  in wlc_lcnphy_set_tssi_mux()
2040 			mod_radio_reg(pi, RADIO_2064_REG036, 0x3, 0x0);  in wlc_lcnphy_set_tssi_mux()
2041 			mod_radio_reg(pi, RADIO_2064_REG035, 0xff, 0x77);  in wlc_lcnphy_set_tssi_mux()
2042 			mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0xe<<1);  in wlc_lcnphy_set_tssi_mux()
2043 			mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1<<7);  in wlc_lcnphy_set_tssi_mux()
2044 			mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 1<<1);  in wlc_lcnphy_set_tssi_mux()
2045 			mod_radio_reg(pi, RADIO_2064_REG029, 0xf0, 0<<4);  in wlc_lcnphy_set_tssi_mux()
2048 		mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2);  in wlc_lcnphy_set_tssi_mux()
2050 		mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3);  in wlc_lcnphy_set_tssi_mux()
2052 		if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_set_tssi_mux()
2053 			mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);  in wlc_lcnphy_set_tssi_mux()
2055 			mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);  in wlc_lcnphy_set_tssi_mux()
2056 			mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);  in wlc_lcnphy_set_tssi_mux()
2059 	mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14);  in wlc_lcnphy_set_tssi_mux()
2062 		write_radio_reg(pi, RADIO_2064_REG07F, 1);  in wlc_lcnphy_set_tssi_mux()
2063 		mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2);  in wlc_lcnphy_set_tssi_mux()
2064 		mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7);  in wlc_lcnphy_set_tssi_mux()
2065 		mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3);  in wlc_lcnphy_set_tssi_mux()
2069 static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(struct brcms_phy *pi)  in wlc_lcnphy_rfseq_tbl_adc_pwrup()  argument
2072 	N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2074 	N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2076 	N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2078 	N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2080 	N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2082 	N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8))  in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2090 static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi)  in wlc_lcnphy_pwrctrl_rssiparams()  argument
2093 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_pwrctrl_rssiparams()
2100 	mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0);  in wlc_lcnphy_pwrctrl_rssiparams()
2102 	mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1);  in wlc_lcnphy_pwrctrl_rssiparams()
2104 	mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3);  in wlc_lcnphy_pwrctrl_rssiparams()
2106 	mod_phy_reg(pi, 0x4db,  in wlc_lcnphy_pwrctrl_rssiparams()
2111 	mod_phy_reg(pi, 0x4dc,  in wlc_lcnphy_pwrctrl_rssiparams()
2116 	mod_phy_reg(pi, 0x40a,  in wlc_lcnphy_pwrctrl_rssiparams()
2121 	mod_phy_reg(pi, 0x40b,  in wlc_lcnphy_pwrctrl_rssiparams()
2126 	mod_phy_reg(pi, 0x40c,  in wlc_lcnphy_pwrctrl_rssiparams()
2131 	mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5));  in wlc_lcnphy_pwrctrl_rssiparams()
2132 	mod_radio_reg(pi, RADIO_2064_REG07C, (1 << 0), (1 << 0));  in wlc_lcnphy_pwrctrl_rssiparams()
2135 static void wlc_lcnphy_tssi_setup(struct brcms_phy *pi)  in wlc_lcnphy_tssi_setup()  argument
2142 	if (pi->sh->boardflags & BFL_FEM) {  in wlc_lcnphy_tssi_setup()
2155 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tssi_setup()
2160 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tssi_setup()
2163 	mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);  in wlc_lcnphy_tssi_setup()
2165 	mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);  in wlc_lcnphy_tssi_setup()
2167 	mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4);  in wlc_lcnphy_tssi_setup()
2169 	wlc_lcnphy_set_tssi_mux(pi, mode);  in wlc_lcnphy_tssi_setup()
2170 	mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);  in wlc_lcnphy_tssi_setup()
2172 	mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15);  in wlc_lcnphy_tssi_setup()
2174 	mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);  in wlc_lcnphy_tssi_setup()
2176 	mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0);  in wlc_lcnphy_tssi_setup()
2178 	mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);  in wlc_lcnphy_tssi_setup()
2180 	mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);  in wlc_lcnphy_tssi_setup()
2182 	mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);  in wlc_lcnphy_tssi_setup()
2184 	mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);  in wlc_lcnphy_tssi_setup()
2186 	mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8);  in wlc_lcnphy_tssi_setup()
2188 	mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);  in wlc_lcnphy_tssi_setup()
2190 	mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8);  in wlc_lcnphy_tssi_setup()
2192 	mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6);  in wlc_lcnphy_tssi_setup()
2194 	mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0);  in wlc_lcnphy_tssi_setup()
2196 	wlc_lcnphy_clear_tx_power_offsets(pi);  in wlc_lcnphy_tssi_setup()
2198 	mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);  in wlc_lcnphy_tssi_setup()
2200 	mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0);  in wlc_lcnphy_tssi_setup()
2202 	mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0);  in wlc_lcnphy_tssi_setup()
2204 	if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_tssi_setup()
2205 		mod_radio_reg(pi, RADIO_2064_REG028, 0xf, tssi_sel);  in wlc_lcnphy_tssi_setup()
2206 		mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);  in wlc_lcnphy_tssi_setup()
2208 		mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, tssi_sel << 1);  in wlc_lcnphy_tssi_setup()
2209 		mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);  in wlc_lcnphy_tssi_setup()
2210 		mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3);  in wlc_lcnphy_tssi_setup()
2213 	write_radio_reg(pi, RADIO_2064_REG025, 0xc);  in wlc_lcnphy_tssi_setup()
2215 	if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_tssi_setup()
2216 		mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);  in wlc_lcnphy_tssi_setup()
2218 		if (CHSPEC_IS2G(pi->radio_chanspec))  in wlc_lcnphy_tssi_setup()
2219 			mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);  in wlc_lcnphy_tssi_setup()
2221 			mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1);  in wlc_lcnphy_tssi_setup()
2224 	if (LCNREV_IS(pi->pubpi.phy_rev, 2))  in wlc_lcnphy_tssi_setup()
2225 		mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);  in wlc_lcnphy_tssi_setup()
2227 		mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2);  in wlc_lcnphy_tssi_setup()
2229 	mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0);  in wlc_lcnphy_tssi_setup()
2231 	mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3);  in wlc_lcnphy_tssi_setup()
2233 	if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_tssi_setup()
2234 		mod_phy_reg(pi, 0x4d7,  in wlc_lcnphy_tssi_setup()
2237 	rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);  in wlc_lcnphy_tssi_setup()
2243 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tssi_setup()
2245 	mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);  in wlc_lcnphy_tssi_setup()
2247 	mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);  in wlc_lcnphy_tssi_setup()
2249 	mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);  in wlc_lcnphy_tssi_setup()
2251 	mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2);  in wlc_lcnphy_tssi_setup()
2253 	mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8);  in wlc_lcnphy_tssi_setup()
2255 	mod_radio_reg(pi, RADIO_2064_REG035, 0xff, 0x0);  in wlc_lcnphy_tssi_setup()
2256 	mod_radio_reg(pi, RADIO_2064_REG036, 0x3, 0x0);  in wlc_lcnphy_tssi_setup()
2257 	mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);  in wlc_lcnphy_tssi_setup()
2259 	wlc_lcnphy_pwrctrl_rssiparams(pi);  in wlc_lcnphy_tssi_setup()
2262 void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi)  in wlc_lcnphy_tx_pwr_update_npt()  argument
2265 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_tx_pwr_update_npt()
2267 	tx_total = wlc_lcnphy_total_tx_frames(pi);  in wlc_lcnphy_tx_pwr_update_npt()
2269 	npt = wlc_lcnphy_get_tx_pwr_npt(pi);  in wlc_lcnphy_tx_pwr_update_npt()
2275 		pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi);  in wlc_lcnphy_tx_pwr_update_npt()
2292 static void wlc_lcnphy_txpower_reset_npt(struct brcms_phy *pi)  in wlc_lcnphy_txpower_reset_npt()  argument
2294 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_txpower_reset_npt()
2295 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_txpower_reset_npt()
2302 void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi)  in wlc_lcnphy_txpower_recalc_target()  argument
2308 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_txpower_recalc_target()
2316 		rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j]));  in wlc_lcnphy_txpower_recalc_target()
2324 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_txpower_recalc_target()
2326 	if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) {  in wlc_lcnphy_txpower_recalc_target()
2327 		wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min);  in wlc_lcnphy_txpower_recalc_target()
2329 		wlc_lcnphy_txpower_reset_npt(pi);  in wlc_lcnphy_txpower_recalc_target()
2333 static void wlc_lcnphy_set_tx_pwr_soft_ctrl(struct brcms_phy *pi, s8 index)  in wlc_lcnphy_set_tx_pwr_soft_ctrl()  argument
2341 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2344 	mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2346 	mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2348 	or_phy_reg(pi, 0x6da, 0x0040);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2358 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2364 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2367 	mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2369 	mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2371 	mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2373 	mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2375 	mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2377 	mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2380 	mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2382 	mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4);  in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2386 static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi)  in wlc_lcnphy_tempcompensated_txpwrctrl()  argument
2392 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_tempcompensated_txpwrctrl()
2394 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_tempcompensated_txpwrctrl()
2402 	temp = (u16) wlc_lcnphy_tempsense(pi, 0);  in wlc_lcnphy_tempcompensated_txpwrctrl()
2405 	if (pi->tx_power_min != 0)  in wlc_lcnphy_tempcompensated_txpwrctrl()
2406 		delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min);  in wlc_lcnphy_tempcompensated_txpwrctrl()
2425 	    && LCNREV_IS(pi->pubpi.phy_rev, 0))  in wlc_lcnphy_tempcompensated_txpwrctrl()
2431 	if (LCNREV_IS(pi->pubpi.phy_rev, 1))  in wlc_lcnphy_tempcompensated_txpwrctrl()
2437 	if (LCNREV_IS(pi->pubpi.phy_rev, 1))  in wlc_lcnphy_tempcompensated_txpwrctrl()
2446 static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(struct brcms_phy *pi, u16 mode)  in wlc_lcnphy_set_tx_pwr_ctrl_mode()  argument
2450 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&  in wlc_lcnphy_set_tx_pwr_ctrl_mode()
2453 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&  in wlc_lcnphy_set_tx_pwr_ctrl_mode()
2459 void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode)  in wlc_lcnphy_set_tx_pwr_ctrl()  argument
2461 	u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2463 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_set_tx_pwr_ctrl()
2465 	mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode);  in wlc_lcnphy_set_tx_pwr_ctrl()
2466 	old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode);  in wlc_lcnphy_set_tx_pwr_ctrl()
2468 	mod_phy_reg(pi, 0x6da, (0x1 << 6),  in wlc_lcnphy_set_tx_pwr_ctrl()
2471 	mod_phy_reg(pi, 0x6a3, (0x1 << 4),  in wlc_lcnphy_set_tx_pwr_ctrl()
2477 			wlc_lcnphy_tx_pwr_update_npt(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2479 			wlc_lcnphy_clear_tx_power_offsets(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2483 			wlc_lcnphy_txpower_recalc_target(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2485 			wlc_lcnphy_set_start_tx_pwr_idx(pi,  in wlc_lcnphy_set_tx_pwr_ctrl()
2488 			wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt);  in wlc_lcnphy_set_tx_pwr_ctrl()
2489 			mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);  in wlc_lcnphy_set_tx_pwr_ctrl()
2492 				wlc_lcnphy_total_tx_frames(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2494 			wlc_lcnphy_disable_tx_gain_override(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2497 			wlc_lcnphy_enable_tx_gain_override(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2499 		mod_phy_reg(pi, 0x4a4,  in wlc_lcnphy_set_tx_pwr_ctrl()
2502 			index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);  in wlc_lcnphy_set_tx_pwr_ctrl()
2503 			wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);  in wlc_lcnphy_set_tx_pwr_ctrl()
2505 						       ((read_phy_reg(pi,  in wlc_lcnphy_set_tx_pwr_ctrl()
2513 wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save)  in wlc_lcnphy_tx_iqlo_loopback()  argument
2519 			read_radio_reg(pi, iqlo_loopback_rf_regs[i]);  in wlc_lcnphy_tx_iqlo_loopback()
2521 	mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);  in wlc_lcnphy_tx_iqlo_loopback()
2522 	mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);  in wlc_lcnphy_tx_iqlo_loopback()
2524 	mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11);  in wlc_lcnphy_tx_iqlo_loopback()
2525 	mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13);  in wlc_lcnphy_tx_iqlo_loopback()
2527 	mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_iqlo_loopback()
2528 	mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);  in wlc_lcnphy_tx_iqlo_loopback()
2530 	mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);  in wlc_lcnphy_tx_iqlo_loopback()
2531 	mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);  in wlc_lcnphy_tx_iqlo_loopback()
2533 	if (LCNREV_IS(pi->pubpi.phy_rev, 2))  in wlc_lcnphy_tx_iqlo_loopback()
2534 		and_radio_reg(pi, RADIO_2064_REG03A, 0xFD);  in wlc_lcnphy_tx_iqlo_loopback()
2536 		and_radio_reg(pi, RADIO_2064_REG03A, 0xF9);  in wlc_lcnphy_tx_iqlo_loopback()
2537 	or_radio_reg(pi, RADIO_2064_REG11A, 0x1);  in wlc_lcnphy_tx_iqlo_loopback()
2539 	or_radio_reg(pi, RADIO_2064_REG036, 0x01);  in wlc_lcnphy_tx_iqlo_loopback()
2540 	or_radio_reg(pi, RADIO_2064_REG11A, 0x18);  in wlc_lcnphy_tx_iqlo_loopback()
2543 	if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_tx_iqlo_loopback()
2544 		if (CHSPEC_IS5G(pi->radio_chanspec))  in wlc_lcnphy_tx_iqlo_loopback()
2545 			mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);  in wlc_lcnphy_tx_iqlo_loopback()
2547 			or_radio_reg(pi, RADIO_2064_REG03A, 1);  in wlc_lcnphy_tx_iqlo_loopback()
2549 		if (CHSPEC_IS5G(pi->radio_chanspec))  in wlc_lcnphy_tx_iqlo_loopback()
2550 			mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1);  in wlc_lcnphy_tx_iqlo_loopback()
2552 			or_radio_reg(pi, RADIO_2064_REG03A, 0x3);  in wlc_lcnphy_tx_iqlo_loopback()
2557 	write_radio_reg(pi, RADIO_2064_REG025, 0xF);  in wlc_lcnphy_tx_iqlo_loopback()
2558 	if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_tx_iqlo_loopback()
2559 		if (CHSPEC_IS5G(pi->radio_chanspec))  in wlc_lcnphy_tx_iqlo_loopback()
2560 			mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4);  in wlc_lcnphy_tx_iqlo_loopback()
2562 			mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6);  in wlc_lcnphy_tx_iqlo_loopback()
2564 		if (CHSPEC_IS5G(pi->radio_chanspec))  in wlc_lcnphy_tx_iqlo_loopback()
2565 			mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1);  in wlc_lcnphy_tx_iqlo_loopback()
2567 			mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1);  in wlc_lcnphy_tx_iqlo_loopback()
2572 	write_radio_reg(pi, RADIO_2064_REG005, 0x8);  in wlc_lcnphy_tx_iqlo_loopback()
2573 	or_radio_reg(pi, RADIO_2064_REG112, 0x80);  in wlc_lcnphy_tx_iqlo_loopback()
2576 	or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);  in wlc_lcnphy_tx_iqlo_loopback()
2577 	or_radio_reg(pi, RADIO_2064_REG11F, 0x44);  in wlc_lcnphy_tx_iqlo_loopback()
2580 	or_radio_reg(pi, RADIO_2064_REG00B, 0x7);  in wlc_lcnphy_tx_iqlo_loopback()
2581 	or_radio_reg(pi, RADIO_2064_REG113, 0x10);  in wlc_lcnphy_tx_iqlo_loopback()
2584 	write_radio_reg(pi, RADIO_2064_REG007, 0x1);  in wlc_lcnphy_tx_iqlo_loopback()
2588 	mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3);  in wlc_lcnphy_tx_iqlo_loopback()
2589 	write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff));  in wlc_lcnphy_tx_iqlo_loopback()
2590 	or_radio_reg(pi, RADIO_2064_REG11F, 0x44);  in wlc_lcnphy_tx_iqlo_loopback()
2593 	or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);  in wlc_lcnphy_tx_iqlo_loopback()
2595 	write_radio_reg(pi, RADIO_2064_REG012, 0x02);  in wlc_lcnphy_tx_iqlo_loopback()
2596 	or_radio_reg(pi, RADIO_2064_REG112, 0x06);  in wlc_lcnphy_tx_iqlo_loopback()
2597 	write_radio_reg(pi, RADIO_2064_REG036, 0x11);  in wlc_lcnphy_tx_iqlo_loopback()
2598 	write_radio_reg(pi, RADIO_2064_REG059, 0xcc);  in wlc_lcnphy_tx_iqlo_loopback()
2599 	write_radio_reg(pi, RADIO_2064_REG05C, 0x2e);  in wlc_lcnphy_tx_iqlo_loopback()
2600 	write_radio_reg(pi, RADIO_2064_REG078, 0xd7);  in wlc_lcnphy_tx_iqlo_loopback()
2601 	write_radio_reg(pi, RADIO_2064_REG092, 0x15);  in wlc_lcnphy_tx_iqlo_loopback()
2604 static bool wlc_lcnphy_iqcal_wait(struct brcms_phy *pi)  in wlc_lcnphy_iqcal_wait()  argument
2608 	while (wlc_lcnphy_iqcal_active(pi)) {  in wlc_lcnphy_iqcal_wait()
2616 	return (0 == wlc_lcnphy_iqcal_active(pi));  in wlc_lcnphy_iqcal_wait()
2620 wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save)  in wlc_lcnphy_tx_iqlo_loopback_cleanup()  argument
2624 	and_phy_reg(pi, 0x44c, 0x0 >> 11);  in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2626 	and_phy_reg(pi, 0x43b, 0xC);  in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2629 		write_radio_reg(pi, iqlo_loopback_rf_regs[i],  in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2634 wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,  in wlc_lcnphy_tx_iqlo_cal()  argument
2671 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_tx_iqlo_cal()
2677 	save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);  in wlc_lcnphy_tx_iqlo_cal()
2678 	save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);  in wlc_lcnphy_tx_iqlo_cal()
2680 	or_phy_reg(pi, 0x6da, 0x40);  in wlc_lcnphy_tx_iqlo_cal()
2681 	or_phy_reg(pi, 0x6db, 0x3);  in wlc_lcnphy_tx_iqlo_cal()
2701 	wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2704 	write_phy_reg(pi, 0x6da, 0xffff);  in wlc_lcnphy_tx_iqlo_cal()
2705 	mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3);  in wlc_lcnphy_tx_iqlo_cal()
2707 	tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_tx_iqlo_cal()
2709 	mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);  in wlc_lcnphy_tx_iqlo_cal()
2711 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_tx_iqlo_cal()
2713 	save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db);  in wlc_lcnphy_tx_iqlo_cal()
2715 	mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0);  in wlc_lcnphy_tx_iqlo_cal()
2717 	mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12);  in wlc_lcnphy_tx_iqlo_cal()
2719 	wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save);  in wlc_lcnphy_tx_iqlo_cal()
2721 	tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);  in wlc_lcnphy_tx_iqlo_cal()
2723 		wlc_lcnphy_get_tx_gain(pi, &old_gains);  in wlc_lcnphy_tx_iqlo_cal()
2727 			wlc_lcnphy_set_tx_pwr_by_index(pi,  in wlc_lcnphy_tx_iqlo_cal()
2729 		wlc_lcnphy_get_tx_gain(pi, &temp_gains);  in wlc_lcnphy_tx_iqlo_cal()
2736 	band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);  in wlc_lcnphy_tx_iqlo_cal()
2755 	wlc_lcnphy_set_tx_gain(pi, &cal_gains);  in wlc_lcnphy_tx_iqlo_cal()
2757 	write_phy_reg(pi, 0x453, 0xaa9);  in wlc_lcnphy_tx_iqlo_cal()
2758 	write_phy_reg(pi, 0x93d, 0xc0);  in wlc_lcnphy_tx_iqlo_cal()
2760 	wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2765 	wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2771 	if (pi->phy_tx_tone_freq) {  in wlc_lcnphy_tx_iqlo_cal()
2773 		wlc_lcnphy_stop_tx_tone(pi);  in wlc_lcnphy_tx_iqlo_cal()
2775 		wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);  in wlc_lcnphy_tx_iqlo_cal()
2777 		wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);  in wlc_lcnphy_tx_iqlo_cal()
2780 	write_phy_reg(pi, 0x6da, 0xffff);  in wlc_lcnphy_tx_iqlo_cal()
2795 		write_phy_reg(pi, 0x452, command_num);  in wlc_lcnphy_tx_iqlo_cal()
2798 			wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2801 			wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2805 		write_phy_reg(pi, 0x451, cal_cmds[i]);  in wlc_lcnphy_tx_iqlo_cal()
2807 		if (!wlc_lcnphy_iqcal_wait(pi))  in wlc_lcnphy_tx_iqlo_cal()
2810 		wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2813 		wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2818 			wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2820 		wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2829 	wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2836 	wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2840 	wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,  in wlc_lcnphy_tx_iqlo_cal()
2845 	wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);  in wlc_lcnphy_tx_iqlo_cal()
2849 		wlc_lcnphy_stop_tx_tone(pi);  in wlc_lcnphy_tx_iqlo_cal()
2851 	write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2);  in wlc_lcnphy_tx_iqlo_cal()
2853 	write_phy_reg(pi, 0x453, 0);  in wlc_lcnphy_tx_iqlo_cal()
2856 		wlc_lcnphy_set_tx_gain(pi, &old_gains);  in wlc_lcnphy_tx_iqlo_cal()
2857 	wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old);  in wlc_lcnphy_tx_iqlo_cal()
2859 	write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl);  in wlc_lcnphy_tx_iqlo_cal()
2860 	write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl);  in wlc_lcnphy_tx_iqlo_cal()
2868 	struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro);  in wlc_lcnphy_idle_tssi_est()  local
2871 	u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_idle_tssi_est()
2872 	u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);  in wlc_lcnphy_idle_tssi_est()
2874 		read_radio_reg(pi, RADIO_2064_REG007) & 1;  in wlc_lcnphy_idle_tssi_est()
2875 	u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;  in wlc_lcnphy_idle_tssi_est()
2876 	u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;  in wlc_lcnphy_idle_tssi_est()
2877 	u8 SAVE_bbmult = wlc_lcnphy_get_bbmult(pi);  in wlc_lcnphy_idle_tssi_est()
2879 	idleTssi = read_phy_reg(pi, 0x4ab);  in wlc_lcnphy_idle_tssi_est()
2880 	suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) &  in wlc_lcnphy_idle_tssi_est()
2883 		wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_idle_tssi_est()
2884 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_idle_tssi_est()
2886 	tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);  in wlc_lcnphy_idle_tssi_est()
2887 	wlc_lcnphy_get_tx_gain(pi, &old_gains);  in wlc_lcnphy_idle_tssi_est()
2889 	wlc_lcnphy_enable_tx_gain_override(pi);  in wlc_lcnphy_idle_tssi_est()
2890 	wlc_lcnphy_set_tx_pwr_by_index(pi, 127);  in wlc_lcnphy_idle_tssi_est()
2891 	write_radio_reg(pi, RADIO_2064_REG112, 0x6);  in wlc_lcnphy_idle_tssi_est()
2892 	mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1);  in wlc_lcnphy_idle_tssi_est()
2893 	mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);  in wlc_lcnphy_idle_tssi_est()
2894 	mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);  in wlc_lcnphy_idle_tssi_est()
2895 	wlc_lcnphy_tssi_setup(pi);  in wlc_lcnphy_idle_tssi_est()
2897 	mod_phy_reg(pi, 0x4d7, (0x1 << 0), (1 << 0));  in wlc_lcnphy_idle_tssi_est()
2898 	mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1 << 6));  in wlc_lcnphy_idle_tssi_est()
2900 	wlc_lcnphy_set_bbmult(pi, 0x0);  in wlc_lcnphy_idle_tssi_est()
2902 	wlc_phy_do_dummy_tx(pi, true, OFF);  in wlc_lcnphy_idle_tssi_est()
2903 	idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))  in wlc_lcnphy_idle_tssi_est()
2906 	idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0))  in wlc_lcnphy_idle_tssi_est()
2919 	mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0);  in wlc_lcnphy_idle_tssi_est()
2921 	mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12);  in wlc_lcnphy_idle_tssi_est()
2923 	wlc_lcnphy_set_bbmult(pi, SAVE_bbmult);  in wlc_lcnphy_idle_tssi_est()
2924 	wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old);  in wlc_lcnphy_idle_tssi_est()
2925 	wlc_lcnphy_set_tx_gain(pi, &old_gains);  in wlc_lcnphy_idle_tssi_est()
2926 	wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);  in wlc_lcnphy_idle_tssi_est()
2928 	write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain);  in wlc_lcnphy_idle_tssi_est()
2929 	mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch);  in wlc_lcnphy_idle_tssi_est()
2930 	mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga);  in wlc_lcnphy_idle_tssi_est()
2931 	mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en);  in wlc_lcnphy_idle_tssi_est()
2932 	mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7);  in wlc_lcnphy_idle_tssi_est()
2934 		wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_idle_tssi_est()
2937 static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)  in wlc_lcnphy_vbat_temp_sense_setup()  argument
2950 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_vbat_temp_sense_setup()
2953 	save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007);  in wlc_lcnphy_vbat_temp_sense_setup()
2954 	save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF);  in wlc_lcnphy_vbat_temp_sense_setup()
2955 	save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F);  in wlc_lcnphy_vbat_temp_sense_setup()
2956 	save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005);  in wlc_lcnphy_vbat_temp_sense_setup()
2957 	save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025);  in wlc_lcnphy_vbat_temp_sense_setup()
2958 	save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112);  in wlc_lcnphy_vbat_temp_sense_setup()
2961 		values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);  in wlc_lcnphy_vbat_temp_sense_setup()
2962 	suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) &  in wlc_lcnphy_vbat_temp_sense_setup()
2965 		wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_vbat_temp_sense_setup()
2966 	save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);  in wlc_lcnphy_vbat_temp_sense_setup()
2968 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_vbat_temp_sense_setup()
2970 	wlc_lcnphy_set_tx_pwr_by_index(pi, 127);  in wlc_lcnphy_vbat_temp_sense_setup()
2971 	mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1);  in wlc_lcnphy_vbat_temp_sense_setup()
2972 	mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4);  in wlc_lcnphy_vbat_temp_sense_setup()
2973 	mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2);  in wlc_lcnphy_vbat_temp_sense_setup()
2974 	mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);  in wlc_lcnphy_vbat_temp_sense_setup()
2976 	mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);  in wlc_lcnphy_vbat_temp_sense_setup()
2978 	mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);  in wlc_lcnphy_vbat_temp_sense_setup()
2980 	mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15);  in wlc_lcnphy_vbat_temp_sense_setup()
2982 	mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);  in wlc_lcnphy_vbat_temp_sense_setup()
2984 	mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);  in wlc_lcnphy_vbat_temp_sense_setup()
2986 	mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
2988 	mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);  in wlc_lcnphy_vbat_temp_sense_setup()
2990 	mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);  in wlc_lcnphy_vbat_temp_sense_setup()
2992 	mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8);  in wlc_lcnphy_vbat_temp_sense_setup()
2994 	mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);  in wlc_lcnphy_vbat_temp_sense_setup()
2996 	mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8);  in wlc_lcnphy_vbat_temp_sense_setup()
2998 	mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4);  in wlc_lcnphy_vbat_temp_sense_setup()
3000 	mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8);  in wlc_lcnphy_vbat_temp_sense_setup()
3002 	mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3004 	mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3006 	mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13);  in wlc_lcnphy_vbat_temp_sense_setup()
3008 	mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);  in wlc_lcnphy_vbat_temp_sense_setup()
3010 	write_radio_reg(pi, RADIO_2064_REG025, 0xC);  in wlc_lcnphy_vbat_temp_sense_setup()
3012 	mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3);  in wlc_lcnphy_vbat_temp_sense_setup()
3014 	mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);  in wlc_lcnphy_vbat_temp_sense_setup()
3016 	mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);  in wlc_lcnphy_vbat_temp_sense_setup()
3018 	mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3020 	val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);  in wlc_lcnphy_vbat_temp_sense_setup()
3026 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_vbat_temp_sense_setup()
3028 		mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);  in wlc_lcnphy_vbat_temp_sense_setup()
3030 		mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3035 		mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5);  in wlc_lcnphy_vbat_temp_sense_setup()
3037 		mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);  in wlc_lcnphy_vbat_temp_sense_setup()
3039 		mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3047 	mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);  in wlc_lcnphy_vbat_temp_sense_setup()
3049 	mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);  in wlc_lcnphy_vbat_temp_sense_setup()
3051 	mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1);  in wlc_lcnphy_vbat_temp_sense_setup()
3053 	mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12);  in wlc_lcnphy_vbat_temp_sense_setup()
3055 	mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5);  in wlc_lcnphy_vbat_temp_sense_setup()
3057 	write_radio_reg(pi, RADIO_2064_REG112, 0x6);  in wlc_lcnphy_vbat_temp_sense_setup()
3059 	wlc_phy_do_dummy_tx(pi, true, OFF);  in wlc_lcnphy_vbat_temp_sense_setup()
3060 	if (!tempsense_done(pi))  in wlc_lcnphy_vbat_temp_sense_setup()
3063 	write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007);  in wlc_lcnphy_vbat_temp_sense_setup()
3064 	write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF);  in wlc_lcnphy_vbat_temp_sense_setup()
3065 	write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F);  in wlc_lcnphy_vbat_temp_sense_setup()
3066 	write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005);  in wlc_lcnphy_vbat_temp_sense_setup()
3067 	write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025);  in wlc_lcnphy_vbat_temp_sense_setup()
3068 	write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112);  in wlc_lcnphy_vbat_temp_sense_setup()
3070 		write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]);  in wlc_lcnphy_vbat_temp_sense_setup()
3071 	wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index);  in wlc_lcnphy_vbat_temp_sense_setup()
3073 	write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn);  in wlc_lcnphy_vbat_temp_sense_setup()
3075 		wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_vbat_temp_sense_setup()
3087 	struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro);  in wlc_lcnphy_tx_pwr_ctrl_init()  local
3089 	suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) &  in wlc_lcnphy_tx_pwr_ctrl_init()
3092 		wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_tx_pwr_ctrl_init()
3094 	if (!pi->hwpwrctrl_capable) {  in wlc_lcnphy_tx_pwr_ctrl_init()
3095 		if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_tx_pwr_ctrl_init()
3110 		wlc_lcnphy_set_tx_gain(pi, &tx_gains);  in wlc_lcnphy_tx_pwr_ctrl_init()
3111 		wlc_lcnphy_set_bbmult(pi, bbmult);  in wlc_lcnphy_tx_pwr_ctrl_init()
3112 		wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);  in wlc_lcnphy_tx_pwr_ctrl_init()
3117 		wlc_lcnphy_clear_tx_power_offsets(pi);  in wlc_lcnphy_tx_pwr_ctrl_init()
3119 		b0 = pi->txpa_2g[0];  in wlc_lcnphy_tx_pwr_ctrl_init()
3120 		b1 = pi->txpa_2g[1];  in wlc_lcnphy_tx_pwr_ctrl_init()
3121 		a1 = pi->txpa_2g[2];  in wlc_lcnphy_tx_pwr_ctrl_init()
3134 			wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tx_pwr_ctrl_init()
3137 		mod_phy_reg(pi, 0x4d0, (0x1 << 0), (0) << 0);  in wlc_lcnphy_tx_pwr_ctrl_init()
3138 		mod_phy_reg(pi, 0x4d3, (0xff << 0), (0) << 0);  in wlc_lcnphy_tx_pwr_ctrl_init()
3139 		mod_phy_reg(pi, 0x4d3, (0xff << 8), (0) << 8);  in wlc_lcnphy_tx_pwr_ctrl_init()
3140 		mod_phy_reg(pi, 0x4d0, (0x1 << 4), (0) << 4);  in wlc_lcnphy_tx_pwr_ctrl_init()
3141 		mod_phy_reg(pi, 0x4d0, (0x1 << 2), (0) << 2);  in wlc_lcnphy_tx_pwr_ctrl_init()
3143 		mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7);  in wlc_lcnphy_tx_pwr_ctrl_init()
3145 		write_phy_reg(pi, 0x4a8, 10);  in wlc_lcnphy_tx_pwr_ctrl_init()
3147 		wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR);  in wlc_lcnphy_tx_pwr_ctrl_init()
3149 		wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);  in wlc_lcnphy_tx_pwr_ctrl_init()
3152 		wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_tx_pwr_ctrl_init()
3155 static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain)  in wlc_lcnphy_set_pa_gain()  argument
3157 	mod_phy_reg(pi, 0x4fb,  in wlc_lcnphy_set_pa_gain()
3160 	mod_phy_reg(pi, 0x4fd,  in wlc_lcnphy_set_pa_gain()
3166 wlc_lcnphy_get_radio_loft(struct brcms_phy *pi,  in wlc_lcnphy_get_radio_loft()  argument
3169 	*ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089));  in wlc_lcnphy_get_radio_loft()
3170 	*eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A));  in wlc_lcnphy_get_radio_loft()
3171 	*fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B));  in wlc_lcnphy_get_radio_loft()
3172 	*fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C));  in wlc_lcnphy_get_radio_loft()
3175 void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b)  in wlc_lcnphy_set_tx_iqcc()  argument
3188 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_set_tx_iqcc()
3191 void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq)  in wlc_lcnphy_set_tx_locc()  argument
3200 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_set_tx_locc()
3203 void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index)  in wlc_lcnphy_set_tx_pwr_by_index()  argument
3210 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_set_tx_pwr_by_index()
3219 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_set_tx_pwr_by_index()
3223 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_by_index()
3228 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_by_index()
3234 	wlc_lcnphy_set_tx_gain(pi, &gains);  in wlc_lcnphy_set_tx_pwr_by_index()
3235 	wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f);  in wlc_lcnphy_set_tx_pwr_by_index()
3238 	wlc_lcnphy_set_bbmult(pi, bb_mult);  in wlc_lcnphy_set_tx_pwr_by_index()
3240 	wlc_lcnphy_enable_tx_gain_override(pi);  in wlc_lcnphy_set_tx_pwr_by_index()
3242 	if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {  in wlc_lcnphy_set_tx_pwr_by_index()
3246 		wlc_lcnphy_set_tx_iqcc(pi, a, b);  in wlc_lcnphy_set_tx_pwr_by_index()
3250 		wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_by_index()
3252 		wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs);  in wlc_lcnphy_set_tx_pwr_by_index()
3256 		wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_set_tx_pwr_by_index()
3257 		mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0);  in wlc_lcnphy_set_tx_pwr_by_index()
3262 static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi)  in wlc_lcnphy_clear_papd_comptable()  argument
3277 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_clear_papd_comptable()
3281 void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable)  in wlc_lcnphy_tx_pu()  argument
3285 		and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4)));  in wlc_lcnphy_tx_pu()
3287 		mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_pu()
3289 		and_phy_reg(pi, 0x44c,  in wlc_lcnphy_tx_pu()
3295 		and_phy_reg(pi, 0x44d,  in wlc_lcnphy_tx_pu()
3297 		mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2);  in wlc_lcnphy_tx_pu()
3299 		mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0));  in wlc_lcnphy_tx_pu()
3301 		and_phy_reg(pi, 0x4f9,  in wlc_lcnphy_tx_pu()
3304 		and_phy_reg(pi, 0x4fa,  in wlc_lcnphy_tx_pu()
3308 		mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_pu()
3309 		mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);  in wlc_lcnphy_tx_pu()
3311 		mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4);  in wlc_lcnphy_tx_pu()
3312 		mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6);  in wlc_lcnphy_tx_pu()
3314 		mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);  in wlc_lcnphy_tx_pu()
3315 		mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);  in wlc_lcnphy_tx_pu()
3317 		wlc_lcnphy_set_trsw_override(pi, true, false);  in wlc_lcnphy_tx_pu()
3319 		mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);  in wlc_lcnphy_tx_pu()
3320 		mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);  in wlc_lcnphy_tx_pu()
3322 		if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_tx_pu()
3324 			mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);  in wlc_lcnphy_tx_pu()
3325 			mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3);  in wlc_lcnphy_tx_pu()
3327 			mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);  in wlc_lcnphy_tx_pu()
3328 			mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5);  in wlc_lcnphy_tx_pu()
3330 			mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_pu()
3331 			mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_pu()
3333 			mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);  in wlc_lcnphy_tx_pu()
3334 			mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2);  in wlc_lcnphy_tx_pu()
3336 			mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);  in wlc_lcnphy_tx_pu()
3337 			mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0);  in wlc_lcnphy_tx_pu()
3340 			mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);  in wlc_lcnphy_tx_pu()
3341 			mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3);  in wlc_lcnphy_tx_pu()
3343 			mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);  in wlc_lcnphy_tx_pu()
3344 			mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5);  in wlc_lcnphy_tx_pu()
3346 			mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);  in wlc_lcnphy_tx_pu()
3347 			mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1);  in wlc_lcnphy_tx_pu()
3349 			mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);  in wlc_lcnphy_tx_pu()
3350 			mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2);  in wlc_lcnphy_tx_pu()
3352 			mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);  in wlc_lcnphy_tx_pu()
3353 			mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);  in wlc_lcnphy_tx_pu()
3359 wlc_lcnphy_run_samples(struct brcms_phy *pi,  in wlc_lcnphy_run_samples()  argument
3364 	or_phy_reg(pi, 0x6da, 0x8080);  in wlc_lcnphy_run_samples()
3366 	mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0);  in wlc_lcnphy_run_samples()
3369 	mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0);  in wlc_lcnphy_run_samples()
3371 	mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0);  in wlc_lcnphy_run_samples()
3375 		and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15));  in wlc_lcnphy_run_samples()
3376 		or_phy_reg(pi, 0x453, (0x1 << 15));  in wlc_lcnphy_run_samples()
3378 		write_phy_reg(pi, 0x63f, 1);  in wlc_lcnphy_run_samples()
3379 		wlc_lcnphy_tx_pu(pi, 1);  in wlc_lcnphy_run_samples()
3382 	or_radio_reg(pi, RADIO_2064_REG112, 0x6);  in wlc_lcnphy_run_samples()
3385 void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode)  in wlc_lcnphy_deaf_mode()  argument
3389 	phybw40 = CHSPEC_IS40(pi->radio_chanspec);  in wlc_lcnphy_deaf_mode()
3391 	if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_deaf_mode()
3392 		mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);  in wlc_lcnphy_deaf_mode()
3393 		mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);  in wlc_lcnphy_deaf_mode()
3395 		mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);  in wlc_lcnphy_deaf_mode()
3396 		mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);  in wlc_lcnphy_deaf_mode()
3400 		mod_phy_reg((pi), 0x410,  in wlc_lcnphy_deaf_mode()
3404 				      pi->radio_chanspec)) ? (!mode) : 0) <<  in wlc_lcnphy_deaf_mode()
3406 		mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);  in wlc_lcnphy_deaf_mode()
3411 wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val,  in wlc_lcnphy_start_tx_tone()  argument
3422 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_start_tx_tone()
3424 	pi->phy_tx_tone_freq = f_kHz;  in wlc_lcnphy_start_tx_tone()
3426 	wlc_lcnphy_deaf_mode(pi, true);  in wlc_lcnphy_start_tx_tone()
3430 		write_phy_reg(pi, 0x942, 0x2);  in wlc_lcnphy_start_tx_tone()
3431 		write_phy_reg(pi, 0x93b, 0x0);  in wlc_lcnphy_start_tx_tone()
3432 		write_phy_reg(pi, 0x93c, 0x0);  in wlc_lcnphy_start_tx_tone()
3433 		wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);  in wlc_lcnphy_start_tx_tone()
3460 	mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0);  in wlc_lcnphy_start_tx_tone()
3462 	mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3);  in wlc_lcnphy_start_tx_tone()
3469 	wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_start_tx_tone()
3471 	wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode);  in wlc_lcnphy_start_tx_tone()
3474 void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi)  in wlc_lcnphy_stop_tx_tone()  argument
3477 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_stop_tx_tone()
3479 	pi->phy_tx_tone_freq = 0;  in wlc_lcnphy_stop_tx_tone()
3481 		write_phy_reg(pi, 0x942, 0x7);  in wlc_lcnphy_stop_tx_tone()
3482 		write_phy_reg(pi, 0x93b, 0x2017);  in wlc_lcnphy_stop_tx_tone()
3483 		write_phy_reg(pi, 0x93c, 0x27c5);  in wlc_lcnphy_stop_tx_tone()
3484 		wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);  in wlc_lcnphy_stop_tx_tone()
3487 	playback_status = read_phy_reg(pi, 0x644);  in wlc_lcnphy_stop_tx_tone()
3489 		wlc_lcnphy_tx_pu(pi, 0);  in wlc_lcnphy_stop_tx_tone()
3490 		mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1);  in wlc_lcnphy_stop_tx_tone()
3492 		mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15);  in wlc_lcnphy_stop_tx_tone()
3494 	mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0);  in wlc_lcnphy_stop_tx_tone()
3496 	mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3);  in wlc_lcnphy_stop_tx_tone()
3498 	mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7);  in wlc_lcnphy_stop_tx_tone()
3500 	and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9);  in wlc_lcnphy_stop_tx_tone()
3502 	wlc_lcnphy_deaf_mode(pi, false);  in wlc_lcnphy_stop_tx_tone()
3506 wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y)  in wlc_lcnphy_set_cc()  argument
3513 		wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y);  in wlc_lcnphy_set_cc()
3517 		wlc_lcnphy_set_tx_locc(pi, di0dq0);  in wlc_lcnphy_set_cc()
3525 		write_radio_reg(pi, RADIO_2064_REG089, data_rf);  in wlc_lcnphy_set_cc()
3531 		write_radio_reg(pi, RADIO_2064_REG08A, data_rf);  in wlc_lcnphy_set_cc()
3539 		write_radio_reg(pi, RADIO_2064_REG08B, data_rf);  in wlc_lcnphy_set_cc()
3545 		write_radio_reg(pi, RADIO_2064_REG08C, data_rf);  in wlc_lcnphy_set_cc()
3551 wlc_lcnphy_get_cc(struct brcms_phy *pi, int cal_type)  in wlc_lcnphy_get_cc()  argument
3560 		wlc_lcnphy_get_tx_iqcc(pi, &a, &b);  in wlc_lcnphy_get_cc()
3565 		didq = wlc_lcnphy_get_tx_locc(pi);  in wlc_lcnphy_get_cc()
3572 		wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);  in wlc_lcnphy_get_cc()
3577 		wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);  in wlc_lcnphy_get_cc()
3586 wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh,  in wlc_lcnphy_samp_cap()  argument
3593 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_samp_cap()
3596 	old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);  in wlc_lcnphy_samp_cap()
3598 	curval1 = bcma_read16(pi->d11core, D11REGOFFS(psm_corectlsts));  in wlc_lcnphy_samp_cap()
3600 	bcma_write16(pi->d11core, D11REGOFFS(psm_corectlsts),  in wlc_lcnphy_samp_cap()
3603 	bcma_write16(pi->d11core, D11REGOFFS(smpl_clct_strptr), 0x7E00);  in wlc_lcnphy_samp_cap()
3604 	bcma_write16(pi->d11core, D11REGOFFS(smpl_clct_stpptr), 0x8000);  in wlc_lcnphy_samp_cap()
3606 	curval2 = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param));  in wlc_lcnphy_samp_cap()
3607 	bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param),  in wlc_lcnphy_samp_cap()
3610 	write_phy_reg(pi, 0x555, 0x0);  in wlc_lcnphy_samp_cap()
3611 	write_phy_reg(pi, 0x5a6, 0x5);  in wlc_lcnphy_samp_cap()
3613 	write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6));  in wlc_lcnphy_samp_cap()
3614 	write_phy_reg(pi, 0x5cf, 3);  in wlc_lcnphy_samp_cap()
3615 	write_phy_reg(pi, 0x5a5, 0x3);  in wlc_lcnphy_samp_cap()
3616 	write_phy_reg(pi, 0x583, 0x0);  in wlc_lcnphy_samp_cap()
3617 	write_phy_reg(pi, 0x584, 0x0);  in wlc_lcnphy_samp_cap()
3618 	write_phy_reg(pi, 0x585, 0x0fff);  in wlc_lcnphy_samp_cap()
3619 	write_phy_reg(pi, 0x586, 0x0000);  in wlc_lcnphy_samp_cap()
3621 	write_phy_reg(pi, 0x580, 0x4501);  in wlc_lcnphy_samp_cap()
3623 	sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);  in wlc_lcnphy_samp_cap()
3624 	write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008));  in wlc_lcnphy_samp_cap()
3625 	stpptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_stpptr));  in wlc_lcnphy_samp_cap()
3626 	curptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_curptr));  in wlc_lcnphy_samp_cap()
3629 		curptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_curptr));  in wlc_lcnphy_samp_cap()
3633 	bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 0x2);  in wlc_lcnphy_samp_cap()
3635 	bcma_write32(pi->d11core, D11REGOFFS(tplatewrptr), strptr);  in wlc_lcnphy_samp_cap()
3637 		val = bcma_read32(pi->d11core, D11REGOFFS(tplatewrdata));  in wlc_lcnphy_samp_cap()
3661 	write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);  in wlc_lcnphy_samp_cap()
3662 	bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), curval2);  in wlc_lcnphy_samp_cap()
3663 	bcma_write16(pi->d11core, D11REGOFFS(psm_corectlsts), curval1);  in wlc_lcnphy_samp_cap()
3667 wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,  in wlc_lcnphy_a1()  argument
3695 	phy_c26 = read_phy_reg(pi, 0x6da);  in wlc_lcnphy_a1()
3696 	phy_c27 = read_phy_reg(pi, 0x6db);  in wlc_lcnphy_a1()
3697 	phy_c31 = read_radio_reg(pi, RADIO_2064_REG026);  in wlc_lcnphy_a1()
3698 	write_phy_reg(pi, 0x93d, 0xC0);  in wlc_lcnphy_a1()
3700 	wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0);  in wlc_lcnphy_a1()
3701 	write_phy_reg(pi, 0x6da, 0xffff);  in wlc_lcnphy_a1()
3702 	or_phy_reg(pi, 0x6db, 0x3);  in wlc_lcnphy_a1()
3704 	wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32);  in wlc_lcnphy_a1()
3706 	phy_c28 = read_phy_reg(pi, 0x938);  in wlc_lcnphy_a1()
3707 	phy_c29 = read_phy_reg(pi, 0x4d7);  in wlc_lcnphy_a1()
3708 	phy_c30 = read_phy_reg(pi, 0x4d8);  in wlc_lcnphy_a1()
3709 	or_phy_reg(pi, 0x938, 0x1 << 2);  in wlc_lcnphy_a1()
3710 	or_phy_reg(pi, 0x4d7, 0x1 << 2);  in wlc_lcnphy_a1()
3711 	or_phy_reg(pi, 0x4d7, 0x1 << 3);  in wlc_lcnphy_a1()
3712 	mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12);  in wlc_lcnphy_a1()
3713 	or_phy_reg(pi, 0x4d8, 1 << 0);  in wlc_lcnphy_a1()
3714 	or_phy_reg(pi, 0x4d8, 1 << 1);  in wlc_lcnphy_a1()
3715 	mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2);  in wlc_lcnphy_a1()
3716 	mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12);  in wlc_lcnphy_a1()
3734 	phy_c3 = wlc_lcnphy_get_cc(pi, cal_type);  in wlc_lcnphy_a1()
3743 	wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);  in wlc_lcnphy_a1()
3763 		phy_c9 = read_phy_reg(pi, 0x93d);  in wlc_lcnphy_a1()
3769 			write_radio_reg(pi, RADIO_2064_REG026,  in wlc_lcnphy_a1()
3774 			wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2);  in wlc_lcnphy_a1()
3807 				wlc_lcnphy_set_cc(pi, cal_type, phy_c11,  in wlc_lcnphy_a1()
3810 				wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2);  in wlc_lcnphy_a1()
3844 		wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);  in wlc_lcnphy_a1()
3849 	wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);  in wlc_lcnphy_a1()
3850 	wlc_lcnphy_stop_tx_tone(pi);  in wlc_lcnphy_a1()
3851 	write_phy_reg(pi, 0x6da, phy_c26);  in wlc_lcnphy_a1()
3852 	write_phy_reg(pi, 0x6db, phy_c27);  in wlc_lcnphy_a1()
3853 	write_phy_reg(pi, 0x938, phy_c28);  in wlc_lcnphy_a1()
3854 	write_phy_reg(pi, 0x4d7, phy_c29);  in wlc_lcnphy_a1()
3855 	write_phy_reg(pi, 0x4d8, phy_c30);  in wlc_lcnphy_a1()
3856 	write_radio_reg(pi, RADIO_2064_REG026, phy_c31);  in wlc_lcnphy_a1()
3862 void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b)  in wlc_lcnphy_get_tx_iqcc()  argument
3872 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_get_tx_iqcc()
3878 static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi)  in wlc_lcnphy_tx_iqlo_soft_cal_full()  argument
3882 	wlc_lcnphy_set_cc(pi, 0, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3883 	wlc_lcnphy_set_cc(pi, 2, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3884 	wlc_lcnphy_set_cc(pi, 3, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3885 	wlc_lcnphy_set_cc(pi, 4, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3887 	wlc_lcnphy_a1(pi, 4, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3888 	wlc_lcnphy_a1(pi, 3, 0, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3889 	wlc_lcnphy_a1(pi, 2, 3, 2);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3890 	wlc_lcnphy_a1(pi, 0, 5, 8);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3891 	wlc_lcnphy_a1(pi, 2, 2, 1);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3892 	wlc_lcnphy_a1(pi, 0, 4, 3);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3894 	iqcc0 = wlc_lcnphy_get_cc(pi, 0);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3895 	locc2 = wlc_lcnphy_get_cc(pi, 2);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3896 	locc3 = wlc_lcnphy_get_cc(pi, 3);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3897 	locc4 = wlc_lcnphy_get_cc(pi, 4);  in wlc_lcnphy_tx_iqlo_soft_cal_full()
3900 u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi)  in wlc_lcnphy_get_tx_locc()  argument
3910 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_get_tx_locc()
3915 static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi)  in wlc_lcnphy_txpwrtbl_iqlo_cal()  argument
3923 	u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3926 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3928 	wlc_lcnphy_get_tx_gain(pi, &old_gains);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3929 	save_pa_gain = wlc_lcnphy_get_pa_gain(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3931 	save_bb_mult = wlc_lcnphy_get_bbmult(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3934 		SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3936 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3942 	wlc_lcnphy_set_tx_gain(pi, &target_gains);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3944 	if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) {  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3946 		wlc_lcnphy_set_tx_pwr_by_index(pi, 30);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3948 		wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3953 		wlc_lcnphy_set_tx_pwr_by_index(pi, 16);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3954 		wlc_lcnphy_tx_iqlo_soft_cal_full(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3957 	wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3959 		if (CHSPEC_IS5G(pi->radio_chanspec)) {  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3971 		if (LCNREV_IS(pi->pubpi.phy_rev, 1)  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3976 			wlc_lcnphy_set_tx_pwr_by_index(pi, 16);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3977 			wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3980 			wlc_lcnphy_tx_iqlo_soft_cal_full(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3984 	wlc_lcnphy_get_tx_iqcc(pi, &a, &b);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3986 	didq = wlc_lcnphy_get_tx_locc(pi);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
3998 		wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4001 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4005 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4016 	wlc_lcnphy_set_bbmult(pi, save_bb_mult);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4017 	wlc_lcnphy_set_pa_gain(pi, save_pa_gain);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4018 	wlc_lcnphy_set_tx_gain(pi, &old_gains);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4021 		wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4023 		wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex);  in wlc_lcnphy_txpwrtbl_iqlo_cal()
4026 s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode)  in wlc_lcnphy_tempsense_new()  argument
4033 		suspend = (0 == (bcma_read32(pi->d11core,  in wlc_lcnphy_tempsense_new()
4037 			wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_tempsense_new()
4038 		wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);  in wlc_lcnphy_tempsense_new()
4040 	tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;  in wlc_lcnphy_tempsense_new()
4041 	tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;  in wlc_lcnphy_tempsense_new()
4057 		mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);  in wlc_lcnphy_tempsense_new()
4060 		mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);  in wlc_lcnphy_tempsense_new()
4063 			wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_tempsense_new()
4068 u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode)  in wlc_lcnphy_tempsense()  argument
4073 	u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_tempsense()
4074 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_tempsense()
4077 		suspend = (0 == (bcma_read32(pi->d11core,  in wlc_lcnphy_tempsense()
4081 			wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_tempsense()
4082 		wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);  in wlc_lcnphy_tempsense()
4084 	tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;  in wlc_lcnphy_tempsense()
4085 	tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;  in wlc_lcnphy_tempsense()
4092 	if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) {  in wlc_lcnphy_tempsense()
4111 		wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);  in wlc_lcnphy_tempsense()
4115 		mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);  in wlc_lcnphy_tempsense()
4118 		mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);  in wlc_lcnphy_tempsense()
4121 			wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_tempsense()
4126 s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode)  in wlc_lcnphy_tempsense_degree()  argument
4128 	s32 degree = wlc_lcnphy_tempsense_new(pi, mode);  in wlc_lcnphy_tempsense_degree()
4136 s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode)  in wlc_lcnphy_vbatsense()  argument
4143 		suspend = (0 == (bcma_read32(pi->d11core,  in wlc_lcnphy_vbatsense()
4147 			wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_vbatsense()
4148 		wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);  in wlc_lcnphy_vbatsense()
4151 	vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF;  in wlc_lcnphy_vbatsense()
4163 			wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_vbatsense()
4168 static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode)  in wlc_lcnphy_afe_clk_init()  argument
4171 	phybw40 = CHSPEC_IS40(pi->radio_chanspec);  in wlc_lcnphy_afe_clk_init()
4173 	mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7);  in wlc_lcnphy_afe_clk_init()
4177 		write_phy_reg(pi, 0x6d0, 0x7);  in wlc_lcnphy_afe_clk_init()
4179 	wlc_lcnphy_toggle_afe_pwdn(pi);  in wlc_lcnphy_afe_clk_init()
4182 static void wlc_lcnphy_temp_adj(struct brcms_phy *pi)  in wlc_lcnphy_temp_adj()  argument
4186 static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi)  in wlc_lcnphy_glacial_timer_based_cal()  argument
4190 	u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_glacial_timer_based_cal()
4191 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_glacial_timer_based_cal()
4192 	suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) &  in wlc_lcnphy_glacial_timer_based_cal()
4195 		wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_glacial_timer_based_cal()
4196 	wlc_lcnphy_deaf_mode(pi, true);  in wlc_lcnphy_glacial_timer_based_cal()
4197 	pi->phy_lastcal = pi->sh->now;  in wlc_lcnphy_glacial_timer_based_cal()
4198 	pi->phy_forcecal = false;  in wlc_lcnphy_glacial_timer_based_cal()
4201 	wlc_lcnphy_txpwrtbl_iqlo_cal(pi);  in wlc_lcnphy_glacial_timer_based_cal()
4203 	wlc_lcnphy_set_tx_pwr_by_index(pi, index);  in wlc_lcnphy_glacial_timer_based_cal()
4204 	wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);  in wlc_lcnphy_glacial_timer_based_cal()
4205 	wlc_lcnphy_deaf_mode(pi, false);  in wlc_lcnphy_glacial_timer_based_cal()
4207 		wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_glacial_timer_based_cal()
4211 static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi)  in wlc_lcnphy_periodic_cal()  argument
4216 	u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_periodic_cal()
4221 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_periodic_cal()
4223 	pi->phy_lastcal = pi->sh->now;  in wlc_lcnphy_periodic_cal()
4224 	pi->phy_forcecal = false;  in wlc_lcnphy_periodic_cal()
4227 		 CHSPEC_CHANNEL(pi->radio_chanspec));  in wlc_lcnphy_periodic_cal()
4228 	pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);  in wlc_lcnphy_periodic_cal()
4231 	suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) &  in wlc_lcnphy_periodic_cal()
4234 		wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);  in wlc_lcnphy_periodic_cal()
4235 		wlapi_suspend_mac_and_wait(pi->sh->physhim);  in wlc_lcnphy_periodic_cal()
4238 	wlc_lcnphy_deaf_mode(pi, true);  in wlc_lcnphy_periodic_cal()
4240 	wlc_lcnphy_txpwrtbl_iqlo_cal(pi);  in wlc_lcnphy_periodic_cal()
4245 	if (LCNREV_IS(pi->pubpi.phy_rev, 1))  in wlc_lcnphy_periodic_cal()
4246 		wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40);  in wlc_lcnphy_periodic_cal()
4248 		wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127);  in wlc_lcnphy_periodic_cal()
4250 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {  in wlc_lcnphy_periodic_cal()
4252 		wlc_lcnphy_idle_tssi_est((struct brcms_phy_pub *) pi);  in wlc_lcnphy_periodic_cal()
4254 		b0 = pi->txpa_2g[0];  in wlc_lcnphy_periodic_cal()
4255 		b1 = pi->txpa_2g[1];  in wlc_lcnphy_periodic_cal()
4256 		a1 = pi->txpa_2g[2];  in wlc_lcnphy_periodic_cal()
4268 			wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_periodic_cal()
4273 	wlc_lcnphy_set_tx_pwr_by_index(pi, index);  in wlc_lcnphy_periodic_cal()
4274 	wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);  in wlc_lcnphy_periodic_cal()
4275 	wlc_lcnphy_deaf_mode(pi, false);  in wlc_lcnphy_periodic_cal()
4277 		wlapi_enable_mac(pi->sh->physhim);  in wlc_lcnphy_periodic_cal()
4280 void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode)  in wlc_lcnphy_calib_modes()  argument
4284 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_calib_modes()
4290 		wlc_lcnphy_periodic_cal(pi);  in wlc_lcnphy_calib_modes()
4293 		wlc_lcnphy_periodic_cal(pi);  in wlc_lcnphy_calib_modes()
4296 		if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {  in wlc_lcnphy_calib_modes()
4297 			temp_new = wlc_lcnphy_tempsense(pi, 0);  in wlc_lcnphy_calib_modes()
4303 				wlc_lcnphy_glacial_timer_based_cal(pi);  in wlc_lcnphy_calib_modes()
4304 				wlc_2064_vco_cal(pi);  in wlc_lcnphy_calib_modes()
4312 		if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_lcnphy_calib_modes()
4314 				(struct brcms_phy_pub *) pi);  in wlc_lcnphy_calib_modes()
4319 void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr)  in wlc_lcnphy_get_tssi()  argument
4323 	status = (read_phy_reg(pi, 0x4ab));  in wlc_lcnphy_get_tssi()
4324 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&  in wlc_lcnphy_get_tssi()
4326 		*ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))  in wlc_lcnphy_get_tssi()
4329 		if (wlc_phy_tpc_isenabled_lcnphy(pi))  in wlc_lcnphy_get_tssi()
4330 			cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];  in wlc_lcnphy_get_tssi()
4341 void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi)  in wlc_phy_cal_init_lcnphy()  argument
4351 	struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro);  in wlc_lcnphy_tx_power_adjustment()  local
4352 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_tx_power_adjustment()
4353 	u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_lcnphy_tx_power_adjustment()
4354 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&  in wlc_lcnphy_tx_power_adjustment()
4356 		index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);  in wlc_lcnphy_tx_power_adjustment()
4358 		mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);  in wlc_lcnphy_tx_power_adjustment()
4361 			(s8)((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);  in wlc_lcnphy_tx_power_adjustment()
4366 wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi,  in wlc_lcnphy_load_tx_gain_table()  argument
4375 	if (pi->sh->boardflags & BFL_FEM)  in wlc_lcnphy_load_tx_gain_table()
4387 		if (pi->sh->boardflags & BFL_FEM)  in wlc_lcnphy_load_tx_gain_table()
4394 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_load_tx_gain_table()
4398 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_load_tx_gain_table()
4402 static void wlc_lcnphy_load_rfpower(struct brcms_phy *pi)  in wlc_lcnphy_load_rfpower()  argument
4417 		wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_load_rfpower()
4422 		wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_load_rfpower()
4447 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_load_rfpower()
4451 static void wlc_lcnphy_bu_tweaks(struct brcms_phy *pi)  in wlc_lcnphy_bu_tweaks()  argument
4453 	or_phy_reg(pi, 0x805, 0x1);  in wlc_lcnphy_bu_tweaks()
4455 	mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0);  in wlc_lcnphy_bu_tweaks()
4457 	mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0);  in wlc_lcnphy_bu_tweaks()
4459 	write_phy_reg(pi, 0x414, 0x1e10);  in wlc_lcnphy_bu_tweaks()
4460 	write_phy_reg(pi, 0x415, 0x0640);  in wlc_lcnphy_bu_tweaks()
4462 	mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8);  in wlc_lcnphy_bu_tweaks()
4464 	or_phy_reg(pi, 0x44a, 0x44);  in wlc_lcnphy_bu_tweaks()
4465 	write_phy_reg(pi, 0x44a, 0x80);  in wlc_lcnphy_bu_tweaks()
4466 	mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0);  in wlc_lcnphy_bu_tweaks()
4468 	mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0);  in wlc_lcnphy_bu_tweaks()
4470 	if (!(pi->sh->boardrev < 0x1204))  in wlc_lcnphy_bu_tweaks()
4471 		mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0);  in wlc_lcnphy_bu_tweaks()
4473 	write_phy_reg(pi, 0x7d6, 0x0902);  in wlc_lcnphy_bu_tweaks()
4474 	mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0);  in wlc_lcnphy_bu_tweaks()
4476 	mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4);  in wlc_lcnphy_bu_tweaks()
4478 	if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {  in wlc_lcnphy_bu_tweaks()
4479 		mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0);  in wlc_lcnphy_bu_tweaks()
4481 		mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0);  in wlc_lcnphy_bu_tweaks()
4483 		mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0);  in wlc_lcnphy_bu_tweaks()
4485 		mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0);  in wlc_lcnphy_bu_tweaks()
4487 		mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2);  in wlc_lcnphy_bu_tweaks()
4489 		mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4);  in wlc_lcnphy_bu_tweaks()
4490 		mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0);  in wlc_lcnphy_bu_tweaks()
4491 		mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90);  in wlc_lcnphy_bu_tweaks()
4492 		mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2);  in wlc_lcnphy_bu_tweaks()
4493 		mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0);  in wlc_lcnphy_bu_tweaks()
4495 		mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2);  in wlc_lcnphy_bu_tweaks()
4497 		wlc_lcnphy_clear_tx_power_offsets(pi);  in wlc_lcnphy_bu_tweaks()
4498 		mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6);  in wlc_lcnphy_bu_tweaks()
4503 static void wlc_lcnphy_rcal(struct brcms_phy *pi)  in wlc_lcnphy_rcal()  argument
4507 	and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);  in wlc_lcnphy_rcal()
4509 	or_radio_reg(pi, RADIO_2064_REG004, 0x40);  in wlc_lcnphy_rcal()
4510 	or_radio_reg(pi, RADIO_2064_REG120, 0x10);  in wlc_lcnphy_rcal()
4512 	or_radio_reg(pi, RADIO_2064_REG078, 0x80);  in wlc_lcnphy_rcal()
4513 	or_radio_reg(pi, RADIO_2064_REG129, 0x02);  in wlc_lcnphy_rcal()
4515 	or_radio_reg(pi, RADIO_2064_REG057, 0x01);  in wlc_lcnphy_rcal()
4517 	or_radio_reg(pi, RADIO_2064_REG05B, 0x02);  in wlc_lcnphy_rcal()
4519 	SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000);  in wlc_lcnphy_rcal()
4521 	if (wlc_radio_2064_rcal_done(pi)) {  in wlc_lcnphy_rcal()
4522 		rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C);  in wlc_lcnphy_rcal()
4526 	and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);  in wlc_lcnphy_rcal()
4528 	and_radio_reg(pi, RADIO_2064_REG057, 0xFE);  in wlc_lcnphy_rcal()
4531 static void wlc_lcnphy_rc_cal(struct brcms_phy *pi)  in wlc_lcnphy_rc_cal()  argument
4537 	if (LCNREV_IS(pi->pubpi.phy_rev, 1))  in wlc_lcnphy_rc_cal()
4542 	write_phy_reg(pi, 0x933, flt_val);  in wlc_lcnphy_rc_cal()
4543 	write_phy_reg(pi, 0x934, flt_val);  in wlc_lcnphy_rc_cal()
4544 	write_phy_reg(pi, 0x935, flt_val);  in wlc_lcnphy_rc_cal()
4545 	write_phy_reg(pi, 0x936, flt_val);  in wlc_lcnphy_rc_cal()
4546 	write_phy_reg(pi, 0x937, (flt_val & 0x1FF));  in wlc_lcnphy_rc_cal()
4551 static void wlc_radio_2064_init(struct brcms_phy *pi)  in wlc_radio_2064_init()  argument
4559 		if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a)  in wlc_radio_2064_init()
4560 			write_radio_reg(pi,  in wlc_radio_2064_init()
4565 			write_radio_reg(pi,  in wlc_radio_2064_init()
4570 	write_radio_reg(pi, RADIO_2064_REG032, 0x62);  in wlc_radio_2064_init()
4571 	write_radio_reg(pi, RADIO_2064_REG033, 0x19);  in wlc_radio_2064_init()
4573 	write_radio_reg(pi, RADIO_2064_REG090, 0x10);  in wlc_radio_2064_init()
4575 	write_radio_reg(pi, RADIO_2064_REG010, 0x00);  in wlc_radio_2064_init()
4577 	if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {  in wlc_radio_2064_init()
4579 		write_radio_reg(pi, RADIO_2064_REG060, 0x7f);  in wlc_radio_2064_init()
4580 		write_radio_reg(pi, RADIO_2064_REG061, 0x72);  in wlc_radio_2064_init()
4581 		write_radio_reg(pi, RADIO_2064_REG062, 0x7f);  in wlc_radio_2064_init()
4584 	write_radio_reg(pi, RADIO_2064_REG01D, 0x02);  in wlc_radio_2064_init()
4585 	write_radio_reg(pi, RADIO_2064_REG01E, 0x06);  in wlc_radio_2064_init()
4587 	mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0);  in wlc_radio_2064_init()
4589 	mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3);  in wlc_radio_2064_init()
4591 	mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6);  in wlc_radio_2064_init()
4593 	mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9);  in wlc_radio_2064_init()
4595 	mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12);  in wlc_radio_2064_init()
4597 	write_phy_reg(pi, 0x4ea, 0x4688);  in wlc_radio_2064_init()
4599 	if (pi->sh->boardflags & BFL_FEM)  in wlc_radio_2064_init()
4600 		mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0);  in wlc_radio_2064_init()
4602 		mod_phy_reg(pi, 0x4eb, (0x7 << 0), 3 << 0);  in wlc_radio_2064_init()
4604 	mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6);  in wlc_radio_2064_init()
4606 	mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0);  in wlc_radio_2064_init()
4608 	wlc_lcnphy_set_tx_locc(pi, 0);  in wlc_radio_2064_init()
4610 	wlc_lcnphy_rcal(pi);  in wlc_radio_2064_init()
4612 	wlc_lcnphy_rc_cal(pi);  in wlc_radio_2064_init()
4614 	if (!(pi->sh->boardflags & BFL_FEM)) {  in wlc_radio_2064_init()
4615 		write_radio_reg(pi, RADIO_2064_REG032, 0x6f);  in wlc_radio_2064_init()
4616 		write_radio_reg(pi, RADIO_2064_REG033, 0x19);  in wlc_radio_2064_init()
4617 		write_radio_reg(pi, RADIO_2064_REG039, 0xe);  in wlc_radio_2064_init()
4622 static void wlc_lcnphy_radio_init(struct brcms_phy *pi)  in wlc_lcnphy_radio_init()  argument
4624 	wlc_radio_2064_init(pi);  in wlc_lcnphy_radio_init()
4627 static void wlc_lcnphy_tbl_init(struct brcms_phy *pi)  in wlc_lcnphy_tbl_init()  argument
4635 	phybw40 = CHSPEC_IS40(pi->radio_chanspec);  in wlc_lcnphy_tbl_init()
4638 		wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]);  in wlc_lcnphy_tbl_init()
4640 	if (pi->sh->boardflags & BFL_FEM_BT) {  in wlc_lcnphy_tbl_init()
4647 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tbl_init()
4650 	if (!(pi->sh->boardflags & BFL_FEM)) {  in wlc_lcnphy_tbl_init()
4658 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tbl_init()
4662 		wlc_lcnphy_write_table(pi, &tab);  in wlc_lcnphy_tbl_init()
4665 	if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_tbl_init()
4666 		if (pi->sh->boardflags & BFL_FEM)  in wlc_lcnphy_tbl_init()
4668 				pi,  in wlc_lcnphy_tbl_init()
4672 				pi,  in wlc_lcnphy_tbl_init()
4676 	if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {  in wlc_lcnphy_tbl_init()
4679 		if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_tbl_init()
4681 			if (pi->sh->boardflags & BFL_EXTLNA)  in wlc_lcnphy_tbl_init()
4687 			if (pi->sh->boardflags & BFL_EXTLNA_5GHz)  in wlc_lcnphy_tbl_init()
4694 			wlc_lcnphy_write_table(pi, &tb[idx]);  in wlc_lcnphy_tbl_init()
4697 	if (pi->sh->boardflags & BFL_FEM) {  in wlc_lcnphy_tbl_init()
4698 		if (pi->sh->boardflags & BFL_FEM_BT) {  in wlc_lcnphy_tbl_init()
4699 			if (pi->sh->boardrev < 0x1250)  in wlc_lcnphy_tbl_init()
4707 		if (pi->sh->boardflags & BFL_FEM_BT)  in wlc_lcnphy_tbl_init()
4712 	wlc_lcnphy_write_table(pi, tb);  in wlc_lcnphy_tbl_init()
4713 	wlc_lcnphy_load_rfpower(pi);  in wlc_lcnphy_tbl_init()
4715 	wlc_lcnphy_clear_papd_comptable(pi);  in wlc_lcnphy_tbl_init()
4718 static void wlc_lcnphy_rev0_baseband_init(struct brcms_phy *pi)  in wlc_lcnphy_rev0_baseband_init()  argument
4721 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_rev0_baseband_init()
4723 	write_radio_reg(pi, RADIO_2064_REG11C, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4725 	write_phy_reg(pi, 0x43b, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4726 	write_phy_reg(pi, 0x43c, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4727 	write_phy_reg(pi, 0x44c, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4728 	write_phy_reg(pi, 0x4e6, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4729 	write_phy_reg(pi, 0x4f9, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4730 	write_phy_reg(pi, 0x4b0, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4731 	write_phy_reg(pi, 0x938, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4732 	write_phy_reg(pi, 0x4b0, 0x0);  in wlc_lcnphy_rev0_baseband_init()
4733 	write_phy_reg(pi, 0x44e, 0);  in wlc_lcnphy_rev0_baseband_init()
4735 	or_phy_reg(pi, 0x567, 0x03);  in wlc_lcnphy_rev0_baseband_init()
4737 	or_phy_reg(pi, 0x44a, 0x44);  in wlc_lcnphy_rev0_baseband_init()
4738 	write_phy_reg(pi, 0x44a, 0x80);  in wlc_lcnphy_rev0_baseband_init()
4740 	if (!(pi->sh->boardflags & BFL_FEM))  in wlc_lcnphy_rev0_baseband_init()
4741 		wlc_lcnphy_set_tx_pwr_by_index(pi, 52);  in wlc_lcnphy_rev0_baseband_init()
4748 		write_phy_reg(pi, 0x43e, afectrl1);  in wlc_lcnphy_rev0_baseband_init()
4751 	mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0);  in wlc_lcnphy_rev0_baseband_init()
4752 	if (pi->sh->boardflags & BFL_FEM) {  in wlc_lcnphy_rev0_baseband_init()
4753 		mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0);  in wlc_lcnphy_rev0_baseband_init()
4755 		write_phy_reg(pi, 0x910, 0x1);  in wlc_lcnphy_rev0_baseband_init()
4758 	mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8);  in wlc_lcnphy_rev0_baseband_init()
4759 	mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0);  in wlc_lcnphy_rev0_baseband_init()
4760 	mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0);  in wlc_lcnphy_rev0_baseband_init()
4764 static void wlc_lcnphy_rev2_baseband_init(struct brcms_phy *pi)  in wlc_lcnphy_rev2_baseband_init()  argument
4766 	if (CHSPEC_IS5G(pi->radio_chanspec)) {  in wlc_lcnphy_rev2_baseband_init()
4767 		mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0);  in wlc_lcnphy_rev2_baseband_init()
4768 		mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8);  in wlc_lcnphy_rev2_baseband_init()
4772 static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi)  in wlc_lcnphy_agc_temp_init()  argument
4777 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_agc_temp_init()
4779 	temp = (s16) read_phy_reg(pi, 0x4df);  in wlc_lcnphy_agc_temp_init()
4795 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_agc_temp_init()
4805 	temp = (s16) (read_phy_reg(pi, 0x434) & (0xff << 0));  in wlc_lcnphy_agc_temp_init()
4811 		(read_phy_reg(pi, 0x424) & (0xff << 8)) >> 8;  in wlc_lcnphy_agc_temp_init()
4813 		(read_phy_reg(pi, 0x425) & (0xff << 0)) >> 0;  in wlc_lcnphy_agc_temp_init()
4820 	wlc_lcnphy_read_table(pi, &tab);  in wlc_lcnphy_agc_temp_init()
4827 static void wlc_lcnphy_baseband_init(struct brcms_phy *pi)  in wlc_lcnphy_baseband_init()  argument
4830 	wlc_lcnphy_tbl_init(pi);  in wlc_lcnphy_baseband_init()
4831 	wlc_lcnphy_rev0_baseband_init(pi);  in wlc_lcnphy_baseband_init()
4832 	if (LCNREV_IS(pi->pubpi.phy_rev, 2))  in wlc_lcnphy_baseband_init()
4833 		wlc_lcnphy_rev2_baseband_init(pi);  in wlc_lcnphy_baseband_init()
4834 	wlc_lcnphy_bu_tweaks(pi);  in wlc_lcnphy_baseband_init()
4837 void wlc_phy_init_lcnphy(struct brcms_phy *pi)  in wlc_phy_init_lcnphy()  argument
4840 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_phy_init_lcnphy()
4841 	phybw40 = CHSPEC_IS40(pi->radio_chanspec);  in wlc_phy_init_lcnphy()
4846 	or_phy_reg(pi, 0x44a, 0x80);  in wlc_phy_init_lcnphy()
4847 	and_phy_reg(pi, 0x44a, 0x7f);  in wlc_phy_init_lcnphy()
4849 	wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X);  in wlc_phy_init_lcnphy()
4851 	write_phy_reg(pi, 0x60a, 160);  in wlc_phy_init_lcnphy()
4853 	write_phy_reg(pi, 0x46a, 25);  in wlc_phy_init_lcnphy()
4855 	wlc_lcnphy_baseband_init(pi);  in wlc_phy_init_lcnphy()
4857 	wlc_lcnphy_radio_init(pi);  in wlc_phy_init_lcnphy()
4859 	if (CHSPEC_IS2G(pi->radio_chanspec))  in wlc_phy_init_lcnphy()
4860 		wlc_lcnphy_tx_pwr_ctrl_init((struct brcms_phy_pub *) pi);  in wlc_phy_init_lcnphy()
4862 	wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec);  in wlc_phy_init_lcnphy()
4864 	bcma_chipco_regctl_maskset(&pi->d11core->bus->drv_cc, 0, ~0xf, 0x9);  in wlc_phy_init_lcnphy()
4866 	bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 0, 0x0,  in wlc_phy_init_lcnphy()
4869 	if ((pi->sh->boardflags & BFL_FEM)  in wlc_phy_init_lcnphy()
4870 	    && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_phy_init_lcnphy()
4871 		wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR);  in wlc_phy_init_lcnphy()
4873 	wlc_lcnphy_agc_temp_init(pi);  in wlc_phy_init_lcnphy()
4875 	wlc_lcnphy_temp_adj(pi);  in wlc_phy_init_lcnphy()
4877 	mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);  in wlc_phy_init_lcnphy()
4880 	mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);  in wlc_phy_init_lcnphy()
4882 	wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);  in wlc_phy_init_lcnphy()
4884 	wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);  in wlc_phy_init_lcnphy()
4887 static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)  in wlc_phy_txpwr_srom_read_lcnphy()  argument
4891 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_phy_txpwr_srom_read_lcnphy()
4892 	struct ssb_sprom *sprom = &pi->d11core->bus->sprom;  in wlc_phy_txpwr_srom_read_lcnphy()
4894 	if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_phy_txpwr_srom_read_lcnphy()
4902 		pi->txpa_2g[0] = sprom->pa0b0;  in wlc_phy_txpwr_srom_read_lcnphy()
4903 		pi->txpa_2g[1] = sprom->pa0b1;  in wlc_phy_txpwr_srom_read_lcnphy()
4904 		pi->txpa_2g[2] = sprom->pa0b2;  in wlc_phy_txpwr_srom_read_lcnphy()
4919 		pi->tx_srom_max_2g = txpwr;  in wlc_phy_txpwr_srom_read_lcnphy()
4922 			pi->txpa_2g_low_temp[i] = pi->txpa_2g[i];  in wlc_phy_txpwr_srom_read_lcnphy()
4923 			pi->txpa_2g_high_temp[i] = pi->txpa_2g[i];  in wlc_phy_txpwr_srom_read_lcnphy()
4932 				pi->tx_srom_max_rate_2g[i] =  in wlc_phy_txpwr_srom_read_lcnphy()
4938 				pi->tx_srom_max_rate_2g[i] =  in wlc_phy_txpwr_srom_read_lcnphy()
4949 				pi->tx_srom_max_rate_2g[i] = txpwr;  in wlc_phy_txpwr_srom_read_lcnphy()
4952 				pi->tx_srom_max_rate_2g[i] = txpwr -  in wlc_phy_txpwr_srom_read_lcnphy()
4961 				pi->tx_srom_max_rate_2g[i] =  in wlc_phy_txpwr_srom_read_lcnphy()
4976 			wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi,  in wlc_phy_txpwr_srom_read_lcnphy()
4984 void wlc_2064_vco_cal(struct brcms_phy *pi)  in wlc_2064_vco_cal()  argument
4988 	mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3);  in wlc_2064_vco_cal()
4989 	calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8;  in wlc_2064_vco_cal()
4990 	write_radio_reg(pi, RADIO_2064_REG056, calnrst);  in wlc_2064_vco_cal()
4992 	write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03);  in wlc_2064_vco_cal()
4994 	write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07);  in wlc_2064_vco_cal()
4996 	mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0);  in wlc_2064_vco_cal()
4999 bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi)  in wlc_phy_tpc_isenabled_lcnphy()  argument
5001 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))  in wlc_phy_tpc_isenabled_lcnphy()
5005 			wlc_lcnphy_get_tx_pwr_ctrl((pi)));  in wlc_phy_tpc_isenabled_lcnphy()
5008 void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi)  in wlc_phy_txpower_recalc_target_lcnphy()  argument
5011 	if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {  in wlc_phy_txpower_recalc_target_lcnphy()
5012 		wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL);  in wlc_phy_txpower_recalc_target_lcnphy()
5013 	} else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {  in wlc_phy_txpower_recalc_target_lcnphy()
5014 		pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);  in wlc_phy_txpower_recalc_target_lcnphy()
5015 		wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);  in wlc_phy_txpower_recalc_target_lcnphy()
5016 		wlc_lcnphy_txpower_recalc_target(pi);  in wlc_phy_txpower_recalc_target_lcnphy()
5017 		wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl);  in wlc_phy_txpower_recalc_target_lcnphy()
5021 void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec)  in wlc_phy_chanspec_set_lcnphy()  argument
5025 	wlc_phy_chanspec_radio_set((struct brcms_phy_pub *)pi, chanspec);  in wlc_phy_chanspec_set_lcnphy()
5027 	wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec);  in wlc_phy_chanspec_set_lcnphy()
5029 	or_phy_reg(pi, 0x44a, 0x44);  in wlc_phy_chanspec_set_lcnphy()
5030 	write_phy_reg(pi, 0x44a, 0x80);  in wlc_phy_chanspec_set_lcnphy()
5032 	wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel);  in wlc_phy_chanspec_set_lcnphy()
5035 	wlc_lcnphy_toggle_afe_pwdn(pi);  in wlc_phy_chanspec_set_lcnphy()
5037 	write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20);  in wlc_phy_chanspec_set_lcnphy()
5038 	write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor);  in wlc_phy_chanspec_set_lcnphy()
5040 	if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) {  in wlc_phy_chanspec_set_lcnphy()
5041 		mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);  in wlc_phy_chanspec_set_lcnphy()
5043 		wlc_lcnphy_load_tx_iir_filter(pi, false, 3);  in wlc_phy_chanspec_set_lcnphy()
5045 		mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);  in wlc_phy_chanspec_set_lcnphy()
5047 		wlc_lcnphy_load_tx_iir_filter(pi, false, 2);  in wlc_phy_chanspec_set_lcnphy()
5050 	if (pi->sh->boardflags & BFL_FEM)  in wlc_phy_chanspec_set_lcnphy()
5051 		wlc_lcnphy_load_tx_iir_filter(pi, true, 0);  in wlc_phy_chanspec_set_lcnphy()
5053 		wlc_lcnphy_load_tx_iir_filter(pi, true, 3);  in wlc_phy_chanspec_set_lcnphy()
5055 	mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);  in wlc_phy_chanspec_set_lcnphy()
5056 	if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))  in wlc_phy_chanspec_set_lcnphy()
5057 		wlc_lcnphy_tssi_setup(pi);  in wlc_phy_chanspec_set_lcnphy()
5060 void wlc_phy_detach_lcnphy(struct brcms_phy *pi)  in wlc_phy_detach_lcnphy()  argument
5062 	kfree(pi->u.pi_lcnphy);  in wlc_phy_detach_lcnphy()
5065 bool wlc_phy_attach_lcnphy(struct brcms_phy *pi)  in wlc_phy_attach_lcnphy()  argument
5069 	pi->u.pi_lcnphy = kzalloc(sizeof(struct brcms_phy_lcnphy), GFP_ATOMIC);  in wlc_phy_attach_lcnphy()
5070 	if (pi->u.pi_lcnphy == NULL)  in wlc_phy_attach_lcnphy()
5073 	pi_lcn = pi->u.pi_lcnphy;  in wlc_phy_attach_lcnphy()
5075 	if (0 == (pi->sh->boardflags & BFL_NOPA)) {  in wlc_phy_attach_lcnphy()
5076 		pi->hwpwrctrl = true;  in wlc_phy_attach_lcnphy()
5077 		pi->hwpwrctrl_capable = true;  in wlc_phy_attach_lcnphy()
5080 	pi->xtalfreq = bcma_chipco_get_alp_clock(&pi->d11core->bus->drv_cc);  in wlc_phy_attach_lcnphy()
5083 	pi->pi_fptr.init = wlc_phy_init_lcnphy;  in wlc_phy_attach_lcnphy()
5084 	pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy;  in wlc_phy_attach_lcnphy()
5085 	pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy;  in wlc_phy_attach_lcnphy()
5086 	pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy;  in wlc_phy_attach_lcnphy()
5087 	pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc;  in wlc_phy_attach_lcnphy()
5088 	pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc;  in wlc_phy_attach_lcnphy()
5089 	pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc;  in wlc_phy_attach_lcnphy()
5090 	pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft;  in wlc_phy_attach_lcnphy()
5091 	pi->pi_fptr.detach = wlc_phy_detach_lcnphy;  in wlc_phy_attach_lcnphy()
5093 	if (!wlc_phy_txpwr_srom_read_lcnphy(pi)) {  in wlc_phy_attach_lcnphy()
5094 		kfree(pi->u.pi_lcnphy);  in wlc_phy_attach_lcnphy()
5098 	if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {  in wlc_phy_attach_lcnphy()
5100 			pi->hwpwrctrl = true;  in wlc_phy_attach_lcnphy()
5101 			pi->hwpwrctrl_capable = true;  in wlc_phy_attach_lcnphy()
5102 			pi->temppwrctrl_capable = false;  in wlc_phy_attach_lcnphy()
5104 			pi->hwpwrctrl = false;  in wlc_phy_attach_lcnphy()
5105 			pi->hwpwrctrl_capable = false;  in wlc_phy_attach_lcnphy()
5106 			pi->temppwrctrl_capable = true;  in wlc_phy_attach_lcnphy()
5113 static void wlc_lcnphy_set_rx_gain(struct brcms_phy *pi, u32 gain)  in wlc_lcnphy_set_rx_gain()  argument
5130 	mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0);  in wlc_lcnphy_set_rx_gain()
5131 	mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);  in wlc_lcnphy_set_rx_gain()
5132 	mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);  in wlc_lcnphy_set_rx_gain()
5133 	mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);  in wlc_lcnphy_set_rx_gain()
5134 	mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);  in wlc_lcnphy_set_rx_gain()
5136 	if (CHSPEC_IS2G(pi->radio_chanspec)) {  in wlc_lcnphy_set_rx_gain()
5137 		mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);  in wlc_lcnphy_set_rx_gain()
5138 		mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3);  in wlc_lcnphy_set_rx_gain()
5140 	wlc_lcnphy_rx_gain_override_enable(pi, true);  in wlc_lcnphy_set_rx_gain()
5143 static u32 wlc_lcnphy_get_receive_power(struct brcms_phy *pi, s32 *gain_index)  in wlc_lcnphy_get_receive_power()  argument
5148 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_get_receive_power()
5158 			wlc_lcnphy_set_rx_gain(pi,  in wlc_lcnphy_get_receive_power()
5163 					pi,  in wlc_lcnphy_get_receive_power()
5170 		wlc_lcnphy_set_rx_gain(pi, gain_code);  in wlc_lcnphy_get_receive_power()
5172 			wlc_lcnphy_measure_digital_power(pi,  in wlc_lcnphy_get_receive_power()
5180 s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index)  in wlc_lcnphy_rx_signal_power()  argument
5190 	struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;  in wlc_lcnphy_rx_signal_power()
5192 	received_power = wlc_lcnphy_get_receive_power(pi, &gain_index);  in wlc_lcnphy_rx_signal_power()
5196 	nominal_power_db = read_phy_reg(pi, 0x425) >> 8;  in wlc_lcnphy_rx_signal_power()
5216 	input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF;  in wlc_lcnphy_rx_signal_power()
5226 	freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec));  in wlc_lcnphy_rx_signal_power()
5246 	wlc_lcnphy_rx_gain_override_enable(pi, 0);  in wlc_lcnphy_rx_signal_power()