Lines Matching refs:rtlpriv
53 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_set_bcn_ctrl_reg() local
58 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in _rtl92ce_set_bcn_ctrl_reg()
63 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_stop_tx_beacon() local
66 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_stop_tx_beacon()
67 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); in _rtl92ce_stop_tx_beacon()
68 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ce_stop_tx_beacon()
69 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_stop_tx_beacon()
71 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_stop_tx_beacon()
76 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_resume_tx_beacon() local
79 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_resume_tx_beacon()
80 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); in _rtl92ce_resume_tx_beacon()
81 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_resume_tx_beacon()
82 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_resume_tx_beacon()
84 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_resume_tx_beacon()
99 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_get_hw_reg() local
114 rtlpriv->cfg->ops->get_hw_reg(hw, in rtl92ce_get_hw_reg()
120 val_rcr = rtl_read_dword(rtlpriv, REG_RCR); in rtl92ce_get_hw_reg()
137 *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4)); in rtl92ce_get_hw_reg()
138 *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR); in rtl92ce_get_hw_reg()
145 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92ce_get_hw_reg()
153 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_hw_reg() local
165 rtl_write_byte(rtlpriv, (REG_MACID + idx), in rtl92ce_set_hw_reg()
175 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92ce_set_hw_reg()
176 rtl_write_byte(rtlpriv, REG_RRSR + 1, in rtl92ce_set_hw_reg()
182 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, in rtl92ce_set_hw_reg()
188 rtl_write_byte(rtlpriv, (REG_BSSID + idx), in rtl92ce_set_hw_reg()
194 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92ce_set_hw_reg()
195 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92ce_set_hw_reg()
197 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
198 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
201 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92ce_set_hw_reg()
204 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92ce_set_hw_reg()
211 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
214 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92ce_set_hw_reg()
217 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
230 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92ce_set_hw_reg()
250 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
254 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
265 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
269 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
308 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
314 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
325 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
335 u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); in rtl92ce_set_hw_reg()
352 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ce_set_hw_reg()
369 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92ce_set_hw_reg()
375 RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, in rtl92ce_set_hw_reg()
378 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92ce_set_hw_reg()
382 rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); in rtl92ce_set_hw_reg()
389 rtl_write_word(rtlpriv, REG_RL, in rtl92ce_set_hw_reg()
395 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92ce_set_hw_reg()
407 rtl_write_byte(rtlpriv, REG_SECCFG, *val); in rtl92ce_set_hw_reg()
412 rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM); in rtl92ce_set_hw_reg()
416 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val); in rtl92ce_set_hw_reg()
418 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, in rtl92ce_set_hw_reg()
444 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, in rtl92ce_set_hw_reg()
447 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in rtl92ce_set_hw_reg()
448 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
455 rtl_read_byte(rtlpriv, in rtl92ce_set_hw_reg()
459 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, in rtl92ce_set_hw_reg()
468 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
473 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
485 u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT); in rtl92ce_set_hw_reg()
487 rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp | in rtl92ce_set_hw_reg()
500 rtl_write_dword(rtlpriv, REG_TSFTR, in rtl92ce_set_hw_reg()
502 rtl_write_dword(rtlpriv, REG_TSFTR + 4, in rtl92ce_set_hw_reg()
521 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
524 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
528 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
535 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
538 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
542 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
555 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92ce_set_hw_reg()
563 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_llt_write() local
569 rtl_write_dword(rtlpriv, REG_LLT_INIT, value); in _rtl92ce_llt_write()
572 value = rtl_read_dword(rtlpriv, REG_LLT_INIT); in _rtl92ce_llt_write()
577 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ce_llt_write()
590 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_llt_table_init() local
614 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c); in _rtl92ce_llt_table_init()
615 rtl_write_dword(rtlpriv, REG_RQPN, 0x80a71c1c); in _rtl92ce_llt_table_init()
617 rtl_write_dword(rtlpriv, REG_RQPN, 0x845B1010); in _rtl92ce_llt_table_init()
619 rtl_write_dword(rtlpriv, REG_RQPN, 0x84838484); in _rtl92ce_llt_table_init()
621 rtl_write_dword(rtlpriv, REG_RQPN, 0x80bd1c1c); in _rtl92ce_llt_table_init()
623 rtl_write_word(rtlpriv, REG_RQPN_NPQ, 0x0000); in _rtl92ce_llt_table_init()
625 rtl_write_dword(rtlpriv, REG_RQPN, 0x80b01c29); in _rtl92ce_llt_table_init()
628 rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, (0x27FF0000 | txpktbuf_bndy)); in _rtl92ce_llt_table_init()
629 rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); in _rtl92ce_llt_table_init()
631 rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
632 rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
634 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92ce_llt_table_init()
635 rtl_write_byte(rtlpriv, REG_PBP, 0x11); in _rtl92ce_llt_table_init()
636 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92ce_llt_table_init()
681 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_init_mac() local
690 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); in _rtl92ce_init_mac()
693 value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO); in _rtl92ce_init_mac()
695 rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32); in _rtl92ce_init_mac()
697 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); in _rtl92ce_init_mac()
698 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); in _rtl92ce_init_mac()
701 u32 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); in _rtl92ce_init_mac()
704 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); in _rtl92ce_init_mac()
707 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); in _rtl92ce_init_mac()
710 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); in _rtl92ce_init_mac()
713 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
717 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", in _rtl92ce_init_mac()
718 rtl_read_dword(rtlpriv, 0xEC), bytetmp); in _rtl92ce_init_mac()
723 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
724 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", in _rtl92ce_init_mac()
725 rtl_read_dword(rtlpriv, 0xEC), bytetmp); in _rtl92ce_init_mac()
729 rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012); in _rtl92ce_init_mac()
731 rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); in _rtl92ce_init_mac()
735 bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd; in _rtl92ce_init_mac()
736 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp); in _rtl92ce_init_mac()
739 rtl_write_word(rtlpriv, REG_CR, 0x2ff); in _rtl92ce_init_mac()
744 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); in _rtl92ce_init_mac()
745 rtl_write_byte(rtlpriv, REG_HISRE, 0xff); in _rtl92ce_init_mac()
747 rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x27ff); in _rtl92ce_init_mac()
749 wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL); in _rtl92ce_init_mac()
752 rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); in _rtl92ce_init_mac()
754 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92ce_init_mac()
755 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in _rtl92ce_init_mac()
756 rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); in _rtl92ce_init_mac()
758 rtl_write_byte(rtlpriv, 0x4d0, 0x0); in _rtl92ce_init_mac()
760 rtl_write_dword(rtlpriv, REG_BCNQ_DESA, in _rtl92ce_init_mac()
763 rtl_write_dword(rtlpriv, REG_MGQ_DESA, in _rtl92ce_init_mac()
766 rtl_write_dword(rtlpriv, REG_VOQ_DESA, in _rtl92ce_init_mac()
768 rtl_write_dword(rtlpriv, REG_VIQ_DESA, in _rtl92ce_init_mac()
770 rtl_write_dword(rtlpriv, REG_BEQ_DESA, in _rtl92ce_init_mac()
772 rtl_write_dword(rtlpriv, REG_BKQ_DESA, in _rtl92ce_init_mac()
774 rtl_write_dword(rtlpriv, REG_HQ_DESA, in _rtl92ce_init_mac()
777 rtl_write_dword(rtlpriv, REG_RX_DESA, in _rtl92ce_init_mac()
782 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77); in _rtl92ce_init_mac()
784 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22); in _rtl92ce_init_mac()
786 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in _rtl92ce_init_mac()
788 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
789 rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); in _rtl92ce_init_mac()
792 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
797 rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); in _rtl92ce_init_mac()
805 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_hw_configure() local
813 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); in _rtl92ce_hw_configure()
815 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); in _rtl92ce_hw_configure()
817 rtl_write_dword(rtlpriv, REG_RRSR, reg_prsr); in _rtl92ce_hw_configure()
819 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92ce_hw_configure()
821 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); in _rtl92ce_hw_configure()
823 rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); in _rtl92ce_hw_configure()
825 rtl_write_word(rtlpriv, REG_RL, 0x0707); in _rtl92ce_hw_configure()
827 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802); in _rtl92ce_hw_configure()
829 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); in _rtl92ce_hw_configure()
831 rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); in _rtl92ce_hw_configure()
832 rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); in _rtl92ce_hw_configure()
833 rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); in _rtl92ce_hw_configure()
834 rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); in _rtl92ce_hw_configure()
838 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x97427431); in _rtl92ce_hw_configure()
840 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); in _rtl92ce_hw_configure()
842 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92ce_hw_configure()
844 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92ce_hw_configure()
847 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92ce_hw_configure()
849 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
851 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
853 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); in _rtl92ce_hw_configure()
854 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92ce_hw_configure()
858 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
859 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0402); in _rtl92ce_hw_configure()
861 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
862 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
867 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); in _rtl92ce_hw_configure()
869 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666); in _rtl92ce_hw_configure()
871 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92ce_hw_configure()
873 rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010); in _rtl92ce_hw_configure()
874 rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010); in _rtl92ce_hw_configure()
876 rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010); in _rtl92ce_hw_configure()
878 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010); in _rtl92ce_hw_configure()
880 rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); in _rtl92ce_hw_configure()
881 rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); in _rtl92ce_hw_configure()
887 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_enable_aspm_back_door() local
890 rtl_write_byte(rtlpriv, 0x34b, 0x93); in _rtl92ce_enable_aspm_back_door()
891 rtl_write_word(rtlpriv, 0x350, 0x870c); in _rtl92ce_enable_aspm_back_door()
892 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
895 rtl_write_byte(rtlpriv, 0x349, 0x1b); in _rtl92ce_enable_aspm_back_door()
897 rtl_write_byte(rtlpriv, 0x349, 0x03); in _rtl92ce_enable_aspm_back_door()
899 rtl_write_word(rtlpriv, 0x350, 0x2718); in _rtl92ce_enable_aspm_back_door()
900 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
905 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_enable_hw_security_config() local
908 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92ce_enable_hw_security_config()
910 rtlpriv->sec.pairwise_enc_algorithm, in rtl92ce_enable_hw_security_config()
911 rtlpriv->sec.group_enc_algorithm); in rtl92ce_enable_hw_security_config()
913 if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { in rtl92ce_enable_hw_security_config()
914 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_enable_hw_security_config()
921 if (rtlpriv->sec.use_defaultkey) { in rtl92ce_enable_hw_security_config()
928 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92ce_enable_hw_security_config()
930 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_enable_hw_security_config()
933 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); in rtl92ce_enable_hw_security_config()
939 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_hw_init() local
942 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_hw_init()
964 rtlpriv->intf_ops->disable_aspm(hw); in rtl92ce_hw_init()
967 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); in rtl92ce_hw_init()
974 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ce_hw_init()
987 rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR); in rtl92ce_hw_init()
989 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in rtl92ce_hw_init()
1018 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); in rtl92ce_hw_init()
1020 rtlpriv->intf_ops->enable_aspm(hw); in rtl92ce_hw_init()
1041 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n"); in rtl92ce_hw_init()
1046 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n"); in rtl92ce_hw_init()
1050 tmp_u1b = rtl_read_byte(rtlpriv, 0x16); in rtl92ce_hw_init()
1052 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80); in rtl92ce_hw_init()
1054 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90); in rtl92ce_hw_init()
1055 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n"); in rtl92ce_hw_init()
1066 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_chip_version() local
1067 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92ce_read_chip_version()
1072 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG); in _rtl92ce_read_chip_version()
1088 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM); in _rtl92ce_read_chip_version()
1132 RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, in _rtl92ce_read_chip_version()
1147 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ce_read_chip_version()
1152 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n", in _rtl92ce_read_chip_version()
1161 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_set_media_status() local
1162 u8 bt_msr = rtl_read_byte(rtlpriv, MSR); in _rtl92ce_set_media_status()
1171 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1176 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1182 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1188 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1193 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1197 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ce_set_media_status()
1210 rtlpriv->mac80211.link_state < MAC80211_LINKED) { in _rtl92ce_set_media_status()
1221 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92ce_set_media_status()
1225 rtl_write_byte(rtlpriv, MSR, bt_msr | mode); in _rtl92ce_set_media_status()
1227 rtlpriv->cfg->ops->led_control(hw, ledaction); in _rtl92ce_set_media_status()
1229 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92ce_set_media_status()
1231 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92ce_set_media_status()
1237 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_check_bssid() local
1240 if (rtlpriv->psc.rfpwr_state != ERFON) in rtl92ce_set_check_bssid()
1243 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); in rtl92ce_set_check_bssid()
1247 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, in rtl92ce_set_check_bssid()
1253 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_check_bssid()
1261 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_network_type() local
1266 if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { in rtl92ce_set_network_type()
1280 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_qos() local
1284 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); in rtl92ce_set_qos()
1290 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); in rtl92ce_set_qos()
1293 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); in rtl92ce_set_qos()
1303 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_enable_interrupt() local
1306 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); in rtl92ce_enable_interrupt()
1307 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); in rtl92ce_enable_interrupt()
1313 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_disable_interrupt() local
1316 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED); in rtl92ce_disable_interrupt()
1317 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED); in rtl92ce_disable_interrupt()
1323 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_poweroff_adapter() local
1325 struct rtl_hal *rtlhal = rtl_hal(rtlpriv); in _rtl92ce_poweroff_adapter()
1329 rtlpriv->intf_ops->enable_aspm(hw); in _rtl92ce_poweroff_adapter()
1330 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ce_poweroff_adapter()
1332 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92ce_poweroff_adapter()
1333 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); in _rtl92ce_poweroff_adapter()
1334 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); in _rtl92ce_poweroff_adapter()
1335 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); in _rtl92ce_poweroff_adapter()
1336 if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) in _rtl92ce_poweroff_adapter()
1338 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); in _rtl92ce_poweroff_adapter()
1339 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92ce_poweroff_adapter()
1340 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); in _rtl92ce_poweroff_adapter()
1341 u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); in _rtl92ce_poweroff_adapter()
1345 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00F30000 | in _rtl92ce_poweroff_adapter()
1348 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 | in _rtl92ce_poweroff_adapter()
1351 rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); in _rtl92ce_poweroff_adapter()
1352 rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); in _rtl92ce_poweroff_adapter()
1353 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); in _rtl92ce_poweroff_adapter()
1355 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); in _rtl92ce_poweroff_adapter()
1357 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); in _rtl92ce_poweroff_adapter()
1359 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); in _rtl92ce_poweroff_adapter()
1361 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); in _rtl92ce_poweroff_adapter()
1364 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); in _rtl92ce_poweroff_adapter()
1365 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); in _rtl92ce_poweroff_adapter()
1370 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_card_disable() local
1381 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); in rtl92ce_card_disable()
1386 rtlpriv->phy.iqk_initialized = false; in rtl92ce_card_disable()
1392 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_interrupt_recognized() local
1395 *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92ce_interrupt_recognized()
1396 rtl_write_dword(rtlpriv, ISR, *p_inta); in rtl92ce_interrupt_recognized()
1407 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_beacon_related_registers() local
1414 rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); in rtl92ce_set_beacon_related_registers()
1415 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ce_set_beacon_related_registers()
1416 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); in rtl92ce_set_beacon_related_registers()
1417 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); in rtl92ce_set_beacon_related_registers()
1418 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); in rtl92ce_set_beacon_related_registers()
1419 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92ce_set_beacon_related_registers()
1425 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_beacon_interval() local
1429 RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, in rtl92ce_set_beacon_interval()
1432 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ce_set_beacon_interval()
1439 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_interrupt_mask() local
1442 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", in rtl92ce_update_interrupt_mask()
1457 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_txpower_info_from_hwpg() local
1496 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1503 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1510 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1544 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1585 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1589 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1630 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1634 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1638 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1642 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1650 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1660 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "TSSI_A = 0x%x, TSSI_B = 0x%x\n", in _rtl92ce_read_txpower_info_from_hwpg()
1674 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1680 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_adapter_info() local
1694 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ce_read_adapter_info()
1698 RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP", in _rtl92ce_read_adapter_info()
1703 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92ce_read_adapter_info()
1707 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in _rtl92ce_read_adapter_info()
1718 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1720 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1722 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1724 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1726 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1734 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr); in _rtl92ce_read_adapter_info()
1749 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ce_read_adapter_info()
1786 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_hal_customized_behavior() local
1803 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, in _rtl92ce_hal_customized_behavior()
1809 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_read_eeprom_info() local
1811 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_read_eeprom_info()
1817 rtlpriv->dm.rfpath_rxenable[0] = true; in rtl92ce_read_eeprom_info()
1819 rtlpriv->dm.rfpath_rxenable[0] = in rtl92ce_read_eeprom_info()
1820 rtlpriv->dm.rfpath_rxenable[1] = true; in rtl92ce_read_eeprom_info()
1821 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n", in rtl92ce_read_eeprom_info()
1823 tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); in rtl92ce_read_eeprom_info()
1825 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); in rtl92ce_read_eeprom_info()
1828 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); in rtl92ce_read_eeprom_info()
1832 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in rtl92ce_read_eeprom_info()
1836 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); in rtl92ce_read_eeprom_info()
1844 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_table() local
1846 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_update_hal_rate_table()
1927 rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); in rtl92ce_update_hal_rate_table()
1929 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", in rtl92ce_update_hal_rate_table()
1930 rtl_read_dword(rtlpriv, REG_ARFR0)); in rtl92ce_update_hal_rate_table()
1936 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_mask() local
1937 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_update_hal_rate_mask()
2052 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ce_update_hal_rate_mask()
2057 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ce_update_hal_rate_mask()
2066 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_tbl() local
2068 if (rtlpriv->dm.useramask) in rtl92ce_update_hal_rate_tbl()
2076 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_channel_access_setting() local
2080 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, in rtl92ce_update_channel_access_setting()
2086 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); in rtl92ce_update_channel_access_setting()
2091 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_gpio_radio_on_off_checking() local
2105 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2107 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2111 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2114 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92ce_gpio_radio_on_off_checking()
2117 u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); in rtl92ce_gpio_radio_on_off_checking()
2121 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92ce_gpio_radio_on_off_checking()
2128 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, in rtl92ce_gpio_radio_on_off_checking()
2137 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2139 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2144 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2146 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2158 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_key() local
2180 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); in rtl92ce_set_key()
2187 memset(rtlpriv->sec.key_buf[idx], 0, in rtl92ce_set_key()
2189 rtlpriv->sec.key_len[idx] = 0; in rtl92ce_set_key()
2208 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in rtl92ce_set_key()
2214 if (is_wepkey || rtlpriv->sec.use_defaultkey) { in rtl92ce_set_key()
2227 RT_TRACE(rtlpriv, COMP_SEC, in rtl92ce_set_key()
2241 if (rtlpriv->sec.key_len[key_index] == 0) { in rtl92ce_set_key()
2242 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2250 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2252 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]); in rtl92ce_set_key()
2253 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2255 rtlpriv->sec.key_buf[0][0], in rtl92ce_set_key()
2256 rtlpriv->sec.key_buf[0][1]); in rtl92ce_set_key()
2258 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2261 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2263 rtlpriv->sec.pairwise_key, in rtl92ce_set_key()
2264 rtlpriv->sec. in rtl92ce_set_key()
2267 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2273 rtlpriv->sec. in rtl92ce_set_key()
2276 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2286 rtlpriv->sec.key_buf in rtl92ce_set_key()
2293 rtlpriv->sec.key_buf[entry_id]); in rtl92ce_set_key()
2381 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl8192ce_bt_hw_init() local
2382 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl8192ce_bt_hw_init()
2392 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); in rtl8192ce_bt_hw_init()
2394 u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & in rtl8192ce_bt_hw_init()
2401 rtl_write_byte(rtlpriv, 0x4fd, u1_tmp); in rtl8192ce_bt_hw_init()
2403 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); in rtl8192ce_bt_hw_init()
2404 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+8, 0xffbd0040); in rtl8192ce_bt_hw_init()
2405 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+0xc, 0x40000010); in rtl8192ce_bt_hw_init()
2409 u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE); in rtl8192ce_bt_hw_init()
2411 rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()
2413 u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE); in rtl8192ce_bt_hw_init()
2415 rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()