52 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_phy_param_tab_init()  local
53 	struct rtl_phy *rtlphy = &(rtlpriv->phy);  in _rtl92cu_phy_param_tab_init()
54 	struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);  in _rtl92cu_phy_param_tab_init()
128 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_read_txpower_info_from_hwpg()  local
165 			RTPRINT(rtlpriv, FINIT, INIT_EEPROM,  in _rtl92cu_read_txpower_info_from_hwpg()
172 			RTPRINT(rtlpriv, FINIT, INIT_EEPROM,  in _rtl92cu_read_txpower_info_from_hwpg()
179 			RTPRINT(rtlpriv, FINIT, INIT_EEPROM,  in _rtl92cu_read_txpower_info_from_hwpg()
208 			RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
244 			RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
248 			RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
279 		RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
283 		RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
287 		RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
291 		RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
298 	RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
307 	RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
322 	RTPRINT(rtlpriv, FINIT, INIT_TXPOWER,  in _rtl92cu_read_txpower_info_from_hwpg()
347 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_read_adapter_info()  local
360 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _rtl92cu_read_adapter_info()
363 	RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, "MAP",  in _rtl92cu_read_adapter_info()
367 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _rtl92cu_read_adapter_info()
371 		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");  in _rtl92cu_read_adapter_info()
385 	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, " VID = 0x%02x PID = 0x%02x\n",  in _rtl92cu_read_adapter_info()
392 	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n",  in _rtl92cu_read_adapter_info()
424 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_hal_customized_behavior()  local
441 	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RT Customized ID: 0x%02X\n",  in _rtl92cu_hal_customized_behavior()
448 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_read_eeprom_info()  local
455 	tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);  in rtl92cu_read_eeprom_info()
458 	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from %s\n",  in rtl92cu_read_eeprom_info()
461 	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload %s\n",  in rtl92cu_read_eeprom_info()
470 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_power_on()  local
478 		if (rtl_read_byte(rtlpriv, REG_APS_FSMCO) & PFM_ALDN) {  in _rtl92cu_init_power_on()
479 			RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,  in _rtl92cu_init_power_on()
484 			RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,  in _rtl92cu_init_power_on()
490 	rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0);  in _rtl92cu_init_power_on()
493 	rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b);  in _rtl92cu_init_power_on()
495 	value8 = rtl_read_byte(rtlpriv, REG_LDOV12D_CTRL);  in _rtl92cu_init_power_on()
498 		rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8);  in _rtl92cu_init_power_on()
499 		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,  in _rtl92cu_init_power_on()
503 		value8 = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL);  in _rtl92cu_init_power_on()
505 		rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, value8);  in _rtl92cu_init_power_on()
509 	value16 = rtl_read_word(rtlpriv, REG_APS_FSMCO);  in _rtl92cu_init_power_on()
511 	rtl_write_word(rtlpriv, REG_APS_FSMCO, value16);  in _rtl92cu_init_power_on()
513 		if (!(rtl_read_word(rtlpriv, REG_APS_FSMCO) & APFM_ONMAC)) {  in _rtl92cu_init_power_on()
518 			RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,  in _rtl92cu_init_power_on()
524 	rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x0812);  in _rtl92cu_init_power_on()
526 	value16 = rtl_read_word(rtlpriv, REG_SYS_ISO_CTRL);  in _rtl92cu_init_power_on()
528 	rtl_write_word(rtlpriv, REG_SYS_ISO_CTRL, value16);  in _rtl92cu_init_power_on()
531 	rtl_write_byte(rtlpriv, REG_APSD_CTRL, (rtl_read_byte(rtlpriv,  in _rtl92cu_init_power_on()
536 		 (rtl_read_byte(rtlpriv, REG_APSD_CTRL) & BIT(7)));  in _rtl92cu_init_power_on()
538 	value16 = rtl_read_word(rtlpriv,  REG_CR);  in _rtl92cu_init_power_on()
541 	rtl_write_word(rtlpriv, REG_CR, value16);  in _rtl92cu_init_power_on()
550 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_queue_reserved_page()  local
582 			rtl_write_byte(rtlpriv,  REG_RQPN_NPQ, value8);  in _rtl92cu_init_queue_reserved_page()
601 			rtl_write_byte(rtlpriv, REG_RQPN_NPQ, value8);  in _rtl92cu_init_queue_reserved_page()
606 	rtl_write_dword(rtlpriv, REG_RQPN, value32);  in _rtl92cu_init_queue_reserved_page()
611 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92c_init_trx_buffer()  local
622 	rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);  in _rtl92c_init_trx_buffer()
623 	rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);  in _rtl92c_init_trx_buffer()
624 	rtl_write_byte(rtlpriv, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);  in _rtl92c_init_trx_buffer()
625 	rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy);  in _rtl92c_init_trx_buffer()
626 	rtl_write_byte(rtlpriv, REG_TDECTRL+1, txpktbuf_bndy);  in _rtl92c_init_trx_buffer()
627 	rtl_write_word(rtlpriv,  (REG_TRXFF_BNDY + 2), 0x27FF);  in _rtl92c_init_trx_buffer()
629 	rtl_write_byte(rtlpriv, REG_PBP, value8);  in _rtl92c_init_trx_buffer()
636 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92c_init_chipN_reg_priority()  local
637 	u16 value16 = (rtl_read_word(rtlpriv, REG_TRXDMA_CTRL) & 0x7);  in _rtl92c_init_chipN_reg_priority()
642 	rtl_write_word(rtlpriv,  REG_TRXDMA_CTRL, value16);  in _rtl92c_init_chipN_reg_priority()
719 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_chipN_three_out_ep_priority()  local
737 	RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n",  in _rtl92cu_init_chipN_three_out_ep_priority()
771 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_chipT_queue_priority()  local
796 	rtl_write_byte(rtlpriv, (REG_TRXDMA_CTRL+1), hq_sele);  in _rtl92cu_init_chipT_queue_priority()
797 	RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Tx queue select :0x%02x..\n",  in _rtl92cu_init_chipT_queue_priority()
823 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_wmac_setting()  local
828 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&value32));  in _rtl92cu_init_wmac_setting()
830 	rtl_write_dword(rtlpriv,  REG_MAR, 0xFFFFFFFF);  in _rtl92cu_init_wmac_setting()
831 	rtl_write_dword(rtlpriv,  REG_MAR + 4, 0xFFFFFFFF);  in _rtl92cu_init_wmac_setting()
834 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_MGT_FILTER,  in _rtl92cu_init_wmac_setting()
838 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_CTRL_FILTER,  in _rtl92cu_init_wmac_setting()
842 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_DATA_FILTER,  in _rtl92cu_init_wmac_setting()
848 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_beacon_parameters()  local
849 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in _rtl92cu_init_beacon_parameters()
851 	rtl_write_word(rtlpriv, REG_BCN_CTRL, 0x1010);  in _rtl92cu_init_beacon_parameters()
854 	rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);  in _rtl92cu_init_beacon_parameters()
855 	rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);  in _rtl92cu_init_beacon_parameters()
856 	rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);  in _rtl92cu_init_beacon_parameters()
861 		rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);  in _rtl92cu_init_beacon_parameters()
863 		rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);  in _rtl92cu_init_beacon_parameters()
868 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_init_mac()  local
880 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _rtl92cu_init_mac()
892 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _rtl92cu_init_mac()
911 	rtlpriv->cfg->ops->set_bw_mode(hw, NL80211_CHAN_HT20);  in _rtl92cu_init_mac()
921 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_enable_hw_security_config()  local
923 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in rtl92cu_enable_hw_security_config()
925 	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,  in rtl92cu_enable_hw_security_config()
927 		 rtlpriv->sec.pairwise_enc_algorithm,  in rtl92cu_enable_hw_security_config()
928 		 rtlpriv->sec.group_enc_algorithm);  in rtl92cu_enable_hw_security_config()
929 	if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {  in rtl92cu_enable_hw_security_config()
930 		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,  in rtl92cu_enable_hw_security_config()
935 	if (rtlpriv->sec.use_defaultkey) {  in rtl92cu_enable_hw_security_config()
941 	rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);  in rtl92cu_enable_hw_security_config()
942 	RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n",  in rtl92cu_enable_hw_security_config()
944 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);  in rtl92cu_enable_hw_security_config()
949 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_hw_configure()  local
953 	rtl_write_byte(rtlpriv, REG_LDOHCI12_CTRL, 0x0f);  in _rtl92cu_hw_configure()
954 	rtl_write_byte(rtlpriv, 0x15, 0xe9);  in _rtl92cu_hw_configure()
957 	rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF);  in _rtl92cu_hw_configure()
959 	rtl_write_byte(rtlpriv, 0xfe40, 0xe0);  in _rtl92cu_hw_configure()
960 	rtl_write_byte(rtlpriv, 0xfe41, 0x8d);  in _rtl92cu_hw_configure()
961 	rtl_write_byte(rtlpriv, 0xfe42, 0x80);  in _rtl92cu_hw_configure()
963 	rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlusb->reg_bcn_ctrl_val);  in _rtl92cu_hw_configure()
968 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _InitPABias()  local
988 		pa_setting = rtl_read_byte(rtlpriv, 0x16);  in _InitPABias()
990 		rtl_write_byte(rtlpriv, 0x16, pa_setting | 0x90);  in _InitPABias()
996 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_hw_init()  local
999 	struct rtl_phy *rtlphy = &(rtlpriv->phy);  in rtl92cu_hw_init()
1018 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "init mac failed!\n");  in rtl92cu_hw_init()
1023 		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,  in rtl92cu_hw_init()
1049 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr);  in rtl92cu_hw_init()
1072 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _DisableRFAFEAndResetBB()  local
1081 	rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);  in _DisableRFAFEAndResetBB()
1085 	rtl_write_byte(rtlpriv, REG_APSD_CTRL, value8); /*0x40*/  in _DisableRFAFEAndResetBB()
1088 	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8);/*0x16*/  in _DisableRFAFEAndResetBB()
1090 	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8); /*0x14*/  in _DisableRFAFEAndResetBB()
1095 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _ResetDigitalProcedure1()  local
1107 		rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);  in _ResetDigitalProcedure1()
1108 		valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);  in _ResetDigitalProcedure1()
1109 		rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 &  in _ResetDigitalProcedure1()
1111 		valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN)&0x0FFF;  in _ResetDigitalProcedure1()
1112 		rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 |  in _ResetDigitalProcedure1()
1114 		valu16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);  in _ResetDigitalProcedure1()
1115 		rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, (valu16 |  in _ResetDigitalProcedure1()
1121 		if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(1)) {  in _ResetDigitalProcedure1()
1123 			rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);  in _ResetDigitalProcedure1()
1125 			rtl_write_byte(rtlpriv, REG_HMETFR+3, 0x20);  in _ResetDigitalProcedure1()
1127 			       (FEN_CPUEN & rtl_read_word(rtlpriv,  in _ResetDigitalProcedure1()
1132 				RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _ResetDigitalProcedure1()
1135 				rtl_write_byte(rtlpriv,  in _ResetDigitalProcedure1()
1142 		rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x54);  in _ResetDigitalProcedure1()
1143 		rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);  in _ResetDigitalProcedure1()
1153 		rtl_write_word(rtlpriv, REG_SYS_CLKR, 0x70A3);  in _ResetDigitalProcedure1()
1154 		rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80);  in _ResetDigitalProcedure1()
1155 		rtl_write_word(rtlpriv, REG_AFE_XTAL_CTRL, 0x880F);  in _ResetDigitalProcedure1()
1156 		rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, 0xF9);  in _ResetDigitalProcedure1()
1162 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _ResetDigitalProcedure2()  local
1168 	rtl_write_word(rtlpriv, REG_SYS_CLKR, 0x70A3);  in _ResetDigitalProcedure2()
1169 	rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL+1, 0x82);  in _ResetDigitalProcedure2()
1174 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _DisableGPIO()  local
1187 	rtl_write_word(rtlpriv, REG_GPIO_PIN_CTRL+2, 0x0000);  in _DisableGPIO()
1188 	value32 = rtl_read_dword(rtlpriv, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;  in _DisableGPIO()
1191 	rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, value32);  in _DisableGPIO()
1193 	rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG+3, 0x00);  in _DisableGPIO()
1194 	value16 = rtl_read_word(rtlpriv, REG_GPIO_MUXCFG+2) & 0xFF0F;  in _DisableGPIO()
1197 	rtl_write_word(rtlpriv, REG_GPIO_PIN_CTRL+2, value16);  in _DisableGPIO()
1199 	rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080);  in _DisableGPIO()
1204 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _DisableAnalog()  local
1215 		rtl_write_byte(rtlpriv, REG_LDOA15_CTRL, 0x04);  in _DisableAnalog()
1216 		value8 = rtl_read_byte(rtlpriv, REG_LDOV12D_CTRL);  in _DisableAnalog()
1218 		rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8);  in _DisableAnalog()
1225 	rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23);  in _DisableAnalog()
1227 	rtl_write_word(rtlpriv, REG_APS_FSMCO, (u16)value16);  in _DisableAnalog()
1228 	rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0E);  in _DisableAnalog()
1260 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_set_bcn_ctrl_reg()  local
1265 	rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlusb->reg_bcn_ctrl_val);  in _rtl92cu_set_bcn_ctrl_reg()
1270 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_stop_tx_beacon()  local
1271 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in _rtl92cu_stop_tx_beacon()
1274 		tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);  in _rtl92cu_stop_tx_beacon()
1275 		rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,  in _rtl92cu_stop_tx_beacon()
1277 		rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64);  in _rtl92cu_stop_tx_beacon()
1278 		tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);  in _rtl92cu_stop_tx_beacon()
1280 		rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);  in _rtl92cu_stop_tx_beacon()
1282 		rtl_write_byte(rtlpriv, REG_TXPAUSE,  in _rtl92cu_stop_tx_beacon()
1283 			       rtl_read_byte(rtlpriv, REG_TXPAUSE) | BIT(6));  in _rtl92cu_stop_tx_beacon()
1289 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_resume_tx_beacon()  local
1290 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in _rtl92cu_resume_tx_beacon()
1294 		tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);  in _rtl92cu_resume_tx_beacon()
1295 		rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,  in _rtl92cu_resume_tx_beacon()
1297 		rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff);  in _rtl92cu_resume_tx_beacon()
1298 		tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2);  in _rtl92cu_resume_tx_beacon()
1300 		rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte);  in _rtl92cu_resume_tx_beacon()
1302 		rtl_write_byte(rtlpriv, REG_TXPAUSE,  in _rtl92cu_resume_tx_beacon()
1303 			       rtl_read_byte(rtlpriv, REG_TXPAUSE) & (~BIT(6)));  in _rtl92cu_resume_tx_beacon()
1309 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_enable_bcn_sub_func()  local
1310 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in _rtl92cu_enable_bcn_sub_func()
1320 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_disable_bcn_sub_func()  local
1321 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in _rtl92cu_disable_bcn_sub_func()
1332 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _rtl92cu_set_media_status()  local
1333 	u8 bt_msr = rtl_read_byte(rtlpriv, MSR);  in _rtl92cu_set_media_status()
1345 		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,  in _rtl92cu_set_media_status()
1353 		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,  in _rtl92cu_set_media_status()
1358 		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,  in _rtl92cu_set_media_status()
1364 		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,  in _rtl92cu_set_media_status()
1369 		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,  in _rtl92cu_set_media_status()
1373 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in _rtl92cu_set_media_status()
1377 	rtl_write_byte(rtlpriv, MSR, bt_msr);  in _rtl92cu_set_media_status()
1378 	rtlpriv->cfg->ops->led_control(hw, ledaction);  in _rtl92cu_set_media_status()
1380 		rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00);  in _rtl92cu_set_media_status()
1382 		rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66);  in _rtl92cu_set_media_status()
1390 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_card_disable()  local
1399 	rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);  in rtl92cu_card_disable()
1407 	rtlpriv->phy.iqk_initialized = false;  in rtl92cu_card_disable()
1412 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_set_check_bssid()  local
1413 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);  in rtl92cu_set_check_bssid()
1416 	if (rtlpriv->psc.rfpwr_state != ERFON)  in rtl92cu_set_check_bssid()
1419 	rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));  in rtl92cu_set_check_bssid()
1430 		rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,  in rtl92cu_set_check_bssid()
1443 		rtlpriv->cfg->ops->set_hw_reg(hw,  in rtl92cu_set_check_bssid()
1453 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_set_network_type()  local
1458 	if (rtlpriv->mac80211.link_state == MAC80211_LINKED) {  in rtl92cu_set_network_type()
1470 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in _beacon_function_enable()  local
1473 	rtl_write_byte(rtlpriv, REG_RD_CTRL+1, 0x6F);  in _beacon_function_enable()
1479 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_set_beacon_related_registers()  local
1486 	rtl_write_word(rtlpriv, REG_ATIMWND, atim_window);  in rtl92cu_set_beacon_related_registers()
1487 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);  in rtl92cu_set_beacon_related_registers()
1489 	rtl_write_byte(rtlpriv, REG_SLOT, 0x09);  in rtl92cu_set_beacon_related_registers()
1497 	value32 = rtl_read_dword(rtlpriv, REG_TCR);  in rtl92cu_set_beacon_related_registers()
1499 	rtl_write_dword(rtlpriv, REG_TCR, value32);  in rtl92cu_set_beacon_related_registers()
1501 	rtl_write_dword(rtlpriv, REG_TCR, value32);  in rtl92cu_set_beacon_related_registers()
1502 	RT_TRACE(rtlpriv, COMP_INIT|COMP_BEACON, DBG_LOUD,  in rtl92cu_set_beacon_related_registers()
1510 		rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x50);  in rtl92cu_set_beacon_related_registers()
1511 		rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x50);  in rtl92cu_set_beacon_related_registers()
1518 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_set_beacon_interval()  local
1522 	RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, "beacon_interval:%d\n",  in rtl92cu_set_beacon_interval()
1524 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);  in rtl92cu_set_beacon_interval()
1534 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_get_hw_reg()  local
1549 			rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,  in rtl92cu_get_hw_reg()
1554 				val_rcr = rtl_read_dword(rtlpriv, REG_RCR);  in rtl92cu_get_hw_reg()
1571 			*ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4));  in rtl92cu_get_hw_reg()
1572 			*ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);  in rtl92cu_get_hw_reg()
1577 		*((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP0);  in rtl92cu_get_hw_reg()
1580 		*((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP1);  in rtl92cu_get_hw_reg()
1583 		*((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP2);  in rtl92cu_get_hw_reg()
1588 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in rtl92cu_get_hw_reg()
1612 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_set_hw_reg()  local
1623 				rtl_write_byte(rtlpriv, (REG_MACID + idx),  in rtl92cu_set_hw_reg()
1639 			rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff);  in rtl92cu_set_hw_reg()
1640 			rtl_write_byte(rtlpriv, REG_RRSR + 1,  in rtl92cu_set_hw_reg()
1646 			rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,  in rtl92cu_set_hw_reg()
1652 				rtl_write_byte(rtlpriv, (REG_BSSID + idx),  in rtl92cu_set_hw_reg()
1658 			rtl_write_byte(rtlpriv, REG_SIFS_CCK + 1, val[0]);  in rtl92cu_set_hw_reg()
1659 			rtl_write_byte(rtlpriv, REG_SIFS_OFDM + 1, val[1]);  in rtl92cu_set_hw_reg()
1660 			rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]);  in rtl92cu_set_hw_reg()
1661 			rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);  in rtl92cu_set_hw_reg()
1662 			rtl_write_byte(rtlpriv, REG_R2T_SIFS+1, val[0]);  in rtl92cu_set_hw_reg()
1663 			rtl_write_byte(rtlpriv, REG_T2T_SIFS+1, val[0]);  in rtl92cu_set_hw_reg()
1664 			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "HW_VAR_SIFS\n");  in rtl92cu_set_hw_reg()
1671 			rtl_write_byte(rtlpriv, REG_SLOT, val[0]);  in rtl92cu_set_hw_reg()
1672 			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,  in rtl92cu_set_hw_reg()
1676 					rtlpriv->cfg->ops->set_hw_reg(hw,  in rtl92cu_set_hw_reg()
1690 				rtl_write_byte(rtlpriv, REG_EDCA_VO_PARAM,  in rtl92cu_set_hw_reg()
1692 				rtl_write_byte(rtlpriv, REG_EDCA_VI_PARAM,  in rtl92cu_set_hw_reg()
1694 				rtl_write_byte(rtlpriv, REG_EDCA_BE_PARAM,  in rtl92cu_set_hw_reg()
1696 				rtl_write_byte(rtlpriv, REG_EDCA_BK_PARAM,  in rtl92cu_set_hw_reg()
1707 			rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp);  in rtl92cu_set_hw_reg()
1716 				switch (rtlpriv->sec.pairwise_enc_algorithm) {  in rtl92cu_set_hw_reg()
1736 				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,  in rtl92cu_set_hw_reg()
1739 				rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,  in rtl92cu_set_hw_reg()
1751 			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,  in rtl92cu_set_hw_reg()
1754 			rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,  in rtl92cu_set_hw_reg()
1781 					rtl_write_byte(rtlpriv,  in rtl92cu_set_hw_reg()
1785 				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,  in rtl92cu_set_hw_reg()
1804 			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,  in rtl92cu_set_hw_reg()
1809 				rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM,  in rtl92cu_set_hw_reg()
1813 				rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,  in rtl92cu_set_hw_reg()
1817 				rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM,  in rtl92cu_set_hw_reg()
1821 				rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM,  in rtl92cu_set_hw_reg()
1832 			rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);  in rtl92cu_set_hw_reg()
1834 			RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG,  in rtl92cu_set_hw_reg()
1841 			rtl_write_word(rtlpriv, REG_RL,  in rtl92cu_set_hw_reg()
1844 			RT_TRACE(rtlpriv, COMP_MLME, DBG_DMESG,  in rtl92cu_set_hw_reg()
1850 		rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));  in rtl92cu_set_hw_reg()
1862 		rtl_write_byte(rtlpriv, REG_SECCFG, *val);  in rtl92cu_set_hw_reg()
1865 			u8 rpwm_val = rtl_read_byte(rtlpriv, REG_USB_HRPWM);  in rtl92cu_set_hw_reg()
1868 				rtl_write_byte(rtlpriv, REG_USB_HRPWM, *val);  in rtl92cu_set_hw_reg()
1870 				rtl_write_byte(rtlpriv, REG_USB_HRPWM,  in rtl92cu_set_hw_reg()
1892 				rtlpriv->cfg->ops->set_hw_reg(hw,  in rtl92cu_set_hw_reg()
1894 				rtl_write_byte(rtlpriv, REG_CR + 1, 0x03);  in rtl92cu_set_hw_reg()
1897 				tmp_reg422 = rtl_read_byte(rtlpriv,  in rtl92cu_set_hw_reg()
1901 				rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,  in rtl92cu_set_hw_reg()
1908 					rtl_write_byte(rtlpriv,  in rtl92cu_set_hw_reg()
1911 				rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);  in rtl92cu_set_hw_reg()
1919 			u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT);  in rtl92cu_set_hw_reg()
1921 			rtl_write_word(rtlpriv, REG_BCN_PSR_RPT,  in rtl92cu_set_hw_reg()
1931 			rtl_write_dword(rtlpriv, REG_TSFTR, (u32)(mac->tsf &  in rtl92cu_set_hw_reg()
1933 			rtl_write_dword(rtlpriv, REG_TSFTR + 4,  in rtl92cu_set_hw_reg()
1941 		rtl_write_word(rtlpriv, REG_RXFLTMAP0, *(u16 *)val);  in rtl92cu_set_hw_reg()
1945 		rtl_write_word(rtlpriv, REG_RXFLTMAP1, *(u16 *)val);  in rtl92cu_set_hw_reg()
1949 		rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *)val);  in rtl92cu_set_hw_reg()
1961 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,  in rtl92cu_set_hw_reg()
1970 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_update_hal_rate_table()  local
1971 	struct rtl_phy *rtlphy = &(rtlpriv->phy);  in rtl92cu_update_hal_rate_table()
2050 	rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);  in rtl92cu_update_hal_rate_table()
2052 	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",  in rtl92cu_update_hal_rate_table()
2053 		 rtl_read_dword(rtlpriv, REG_ARFR0));  in rtl92cu_update_hal_rate_table()
2060 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_update_hal_rate_mask()  local
2061 	struct rtl_phy *rtlphy = &(rtlpriv->phy);  in rtl92cu_update_hal_rate_mask()
2186 	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,  in rtl92cu_update_hal_rate_mask()
2191 	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,  in rtl92cu_update_hal_rate_mask()
2194 	memcpy(rtlpriv->rate_mask, rate_mask, 5);  in rtl92cu_update_hal_rate_mask()
2197 	schedule_work(&rtlpriv->works.fill_h2c_cmd);  in rtl92cu_update_hal_rate_mask()
2207 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_update_hal_rate_tbl()  local
2209 	if (rtlpriv->dm.useramask)  in rtl92cu_update_hal_rate_tbl()
2217 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_update_channel_access_setting()  local
2221 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME,  in rtl92cu_update_channel_access_setting()
2227 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer);  in rtl92cu_update_channel_access_setting()
2232 	struct rtl_priv *rtlpriv = rtl_priv(hw);  in rtl92cu_gpio_radio_on_off_checking()  local
2243 	spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2245 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2249 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2256 			u1tmp = rtl_read_byte(rtlpriv, REG_HSISR);  in rtl92cu_gpio_radio_on_off_checking()
2259 			RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,  in rtl92cu_gpio_radio_on_off_checking()
2262 			rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG,  in rtl92cu_gpio_radio_on_off_checking()
2263 				       rtl_read_byte(rtlpriv,  in rtl92cu_gpio_radio_on_off_checking()
2265 			u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);  in rtl92cu_gpio_radio_on_off_checking()
2268 			RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,  in rtl92cu_gpio_radio_on_off_checking()
2271 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "N-SS RF =%x\n",  in rtl92cu_gpio_radio_on_off_checking()
2275 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,  in rtl92cu_gpio_radio_on_off_checking()
2281 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,  in rtl92cu_gpio_radio_on_off_checking()
2286 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,  in rtl92cu_gpio_radio_on_off_checking()
2300 		spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2302 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2309 			rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0);  in rtl92cu_gpio_radio_on_off_checking()
2310 			rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x8812);  in rtl92cu_gpio_radio_on_off_checking()
2324 		spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2326 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2328 		spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()
2330 		spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag);  in rtl92cu_gpio_radio_on_off_checking()