Lines Matching refs:rtlpriv
49 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_set_bcn_ctrl_reg() local
54 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in _rtl92ee_set_bcn_ctrl_reg()
59 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_stop_tx_beacon() local
62 tmp = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ee_stop_tx_beacon()
63 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp & (~BIT(6))); in _rtl92ee_stop_tx_beacon()
64 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ee_stop_tx_beacon()
65 tmp = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ee_stop_tx_beacon()
67 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp); in _rtl92ee_stop_tx_beacon()
72 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_resume_tx_beacon() local
75 tmp = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ee_resume_tx_beacon()
76 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp | BIT(6)); in _rtl92ee_resume_tx_beacon()
77 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ee_resume_tx_beacon()
78 tmp = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ee_resume_tx_beacon()
80 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp); in _rtl92ee_resume_tx_beacon()
96 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_set_fw_clock_on() local
102 rtlpriv->cfg->ops->get_hw_reg(hw, HAL_DEF_WOWLAN, in _rtl92ee_set_fw_clock_on()
107 if (!rtlpriv->psc.fw_current_inpsmode) in _rtl92ee_set_fw_clock_on()
111 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
114 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
119 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
121 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
124 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
130 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_SET_RPWM, in _rtl92ee_set_fw_clock_on()
134 content = rtl_read_dword(rtlpriv, isr_regaddr); in _rtl92ee_set_fw_clock_on()
138 content = rtl_read_dword(rtlpriv, isr_regaddr); in _rtl92ee_set_fw_clock_on()
142 rtl_write_word(rtlpriv, isr_regaddr, 0x0100); in _rtl92ee_set_fw_clock_on()
144 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, in _rtl92ee_set_fw_clock_on()
150 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
152 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
154 mod_timer(&rtlpriv->works.fw_clockoff_timer, in _rtl92ee_set_fw_clock_on()
158 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
160 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_on()
166 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_set_fw_clock_off() local
176 if (!rtlpriv->psc.fw_current_inpsmode) in _rtl92ee_set_fw_clock_off()
181 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE, (u8 *)(&rtstate)); in _rtl92ee_set_fw_clock_off()
182 if (rtstate == ERFOFF || rtlpriv->psc.inactive_pwrstate == ERFOFF) in _rtl92ee_set_fw_clock_off()
194 mod_timer(&rtlpriv->works.fw_clockoff_timer, in _rtl92ee_set_fw_clock_off()
200 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_off()
203 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_off()
205 rtl_write_word(rtlpriv, REG_HISR, 0x0100); in _rtl92ee_set_fw_clock_off()
206 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, in _rtl92ee_set_fw_clock_off()
208 spin_lock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_off()
210 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_off()
212 spin_unlock_bh(&rtlpriv->locks.fw_ps_lock); in _rtl92ee_set_fw_clock_off()
213 mod_timer(&rtlpriv->works.fw_clockoff_timer, in _rtl92ee_set_fw_clock_off()
244 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_fwlps_leave() local
254 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, in _rtl92ee_fwlps_leave()
256 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, in _rtl92ee_fwlps_leave()
260 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, in _rtl92ee_fwlps_leave()
262 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, in _rtl92ee_fwlps_leave()
264 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, in _rtl92ee_fwlps_leave()
271 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_fwlps_enter() local
279 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, in _rtl92ee_fwlps_enter()
281 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, in _rtl92ee_fwlps_enter()
287 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, in _rtl92ee_fwlps_enter()
289 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, in _rtl92ee_fwlps_enter()
291 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, in _rtl92ee_fwlps_enter()
298 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_get_hw_reg() local
313 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE, in rtl92ee_get_hw_reg()
318 val_rcr = rtl_read_dword(rtlpriv, REG_RCR); in rtl92ee_get_hw_reg()
335 *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4)); in rtl92ee_get_hw_reg()
336 *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR); in rtl92ee_get_hw_reg()
342 RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG, in rtl92ee_get_hw_reg()
350 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_download_rsvd_page() local
357 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in _rtl92ee_download_rsvd_page()
358 rtl_write_byte(rtlpriv, REG_CR + 1, tmp_regcr | BIT(0)); in _rtl92ee_download_rsvd_page()
371 tmp_reg422 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ee_download_rsvd_page()
372 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422 & (~BIT(6))); in _rtl92ee_download_rsvd_page()
379 bcnvalid_reg = rtl_read_byte(rtlpriv, REG_DWBCN0_CTRL + 2); in _rtl92ee_download_rsvd_page()
380 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 2, in _rtl92ee_download_rsvd_page()
386 txbc_reg = rtl_read_byte(rtlpriv, REG_MGQ_TXBD_NUM + 3); in _rtl92ee_download_rsvd_page()
391 txbc_reg = rtl_read_byte(rtlpriv, REG_MGQ_TXBD_NUM + 3); in _rtl92ee_download_rsvd_page()
393 rtl_write_byte(rtlpriv, REG_MGQ_TXBD_NUM + 3, in _rtl92ee_download_rsvd_page()
397 bcnvalid_reg = rtl_read_byte(rtlpriv, REG_DWBCN0_CTRL + 2); in _rtl92ee_download_rsvd_page()
402 bcnvalid_reg = rtl_read_byte(rtlpriv, in _rtl92ee_download_rsvd_page()
407 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 2, BIT(0)); in _rtl92ee_download_rsvd_page()
413 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_download_rsvd_page()
421 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422); in _rtl92ee_download_rsvd_page()
423 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in _rtl92ee_download_rsvd_page()
424 rtl_write_byte(rtlpriv, REG_CR + 1, tmp_regcr & (~BIT(0))); in _rtl92ee_download_rsvd_page()
429 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_hw_reg() local
439 rtl_write_byte(rtlpriv, (REG_MACID + idx), val[idx]); in rtl92ee_set_hw_reg()
447 rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff); in rtl92ee_set_hw_reg()
448 rtl_write_byte(rtlpriv, REG_RRSR + 1, (b_rate_cfg >> 8) & 0xff); in rtl92ee_set_hw_reg()
452 rtl_write_byte(rtlpriv, (REG_BSSID + idx), val[idx]); in rtl92ee_set_hw_reg()
455 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92ee_set_hw_reg()
456 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92ee_set_hw_reg()
458 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92ee_set_hw_reg()
459 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92ee_set_hw_reg()
462 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, 0x0e0e); in rtl92ee_set_hw_reg()
464 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92ee_set_hw_reg()
470 RT_TRACE(rtlpriv, COMP_MLME, DBG_TRACE, in rtl92ee_set_hw_reg()
473 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92ee_set_hw_reg()
476 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM, in rtl92ee_set_hw_reg()
484 reg_tmp = (rtlpriv->mac80211.cur_40_prime_sc) << 5; in rtl92ee_set_hw_reg()
487 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92ee_set_hw_reg()
488 rtlpriv->mac80211.short_preamble = short_preamble; in rtl92ee_set_hw_reg()
492 rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *)val)); in rtl92ee_set_hw_reg()
513 rtl_write_byte(rtlpriv, in rtl92ee_set_hw_reg()
517 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ee_set_hw_reg()
526 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL, in rtl92ee_set_hw_reg()
535 u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); in rtl92ee_set_hw_reg()
551 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ee_set_hw_reg()
568 RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG, in rtl92ee_set_hw_reg()
574 RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, in rtl92ee_set_hw_reg()
577 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92ee_set_hw_reg()
581 rtl_write_dword(rtlpriv, REG_RCR, ((u32 *)(val))[0]); in rtl92ee_set_hw_reg()
588 rtl_write_word(rtlpriv, REG_RETRY_LIMIT, in rtl92ee_set_hw_reg()
594 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92ee_set_hw_reg()
608 rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM); in rtl92ee_set_hw_reg()
612 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, (*(u8 *)val)); in rtl92ee_set_hw_reg()
614 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, in rtl92ee_set_hw_reg()
641 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, NULL); in rtl92ee_set_hw_reg()
653 u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT); in rtl92ee_set_hw_reg()
655 rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, in rtl92ee_set_hw_reg()
667 rtl_write_dword(rtlpriv, REG_TSFTR, in rtl92ee_set_hw_reg()
669 rtl_write_dword(rtlpriv, REG_TSFTR + 4, in rtl92ee_set_hw_reg()
687 RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG, in rtl92ee_set_hw_reg()
695 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_llt_table_init() local
701 rtl_write_dword(rtlpriv, REG_RQPN, 0x80E90808); in _rtl92ee_llt_table_init()
703 rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
704 rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x3d00 - 1); in _rtl92ee_llt_table_init()
706 rtl_write_byte(rtlpriv, REG_DWBCN0_CTRL + 1, txpktbuf_bndy); in _rtl92ee_llt_table_init()
707 rtl_write_byte(rtlpriv, REG_DWBCN1_CTRL + 1, txpktbuf_bndy); in _rtl92ee_llt_table_init()
709 rtl_write_byte(rtlpriv, REG_BCNQ_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
710 rtl_write_byte(rtlpriv, REG_BCNQ1_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
712 rtl_write_byte(rtlpriv, REG_MGQ_BDNY, txpktbuf_bndy); in _rtl92ee_llt_table_init()
713 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92ee_llt_table_init()
715 rtl_write_byte(rtlpriv, REG_PBP, 0x31); in _rtl92ee_llt_table_init()
716 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92ee_llt_table_init()
718 u8tmp = rtl_read_byte(rtlpriv, REG_AUTO_LLT + 2); in _rtl92ee_llt_table_init()
719 rtl_write_byte(rtlpriv, REG_AUTO_LLT + 2, u8tmp | BIT(0)); in _rtl92ee_llt_table_init()
722 u8tmp = rtl_read_byte(rtlpriv, REG_AUTO_LLT + 2); in _rtl92ee_llt_table_init()
734 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_gen_refresh_led_state() local
739 if (rtlpriv->rtlhal.up_first_time) in _rtl92ee_gen_refresh_led_state()
752 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_init_mac() local
760 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0); in _rtl92ee_init_mac()
762 dwordtmp = rtl_read_dword(rtlpriv, REG_SYS_CFG1); in _rtl92ee_init_mac()
764 rtl_write_byte(rtlpriv, 0x7c, 0xc3); in _rtl92ee_init_mac()
766 bytetmp = rtl_read_byte(rtlpriv, 0x16); in _rtl92ee_init_mac()
767 rtl_write_byte(rtlpriv, 0x16, bytetmp | BIT(4) | BIT(6)); in _rtl92ee_init_mac()
768 rtl_write_byte(rtlpriv, 0x7c, 0x83); in _rtl92ee_init_mac()
771 bytetmp = rtl_read_byte(rtlpriv, REG_AFE_CTRL2); in _rtl92ee_init_mac()
773 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, bytetmp); in _rtl92ee_init_mac()
775 dwordtmp = rtl_read_dword(rtlpriv, REG_AFE_CTRL4); in _rtl92ee_init_mac()
777 rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp); in _rtl92ee_init_mac()
782 bytetmp = rtl_read_byte(rtlpriv, REG_AFE_CTRL2); in _rtl92ee_init_mac()
784 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, bytetmp); in _rtl92ee_init_mac()
786 dwordtmp = rtl_read_dword(rtlpriv, REG_AFE_CTRL4); in _rtl92ee_init_mac()
788 rtl_write_dword(rtlpriv, REG_AFE_CTRL4, dwordtmp); in _rtl92ee_init_mac()
791 if (!rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, in _rtl92ee_init_mac()
794 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_init_mac()
800 bytetmp = rtl_read_byte(rtlpriv, REG_CR); in _rtl92ee_init_mac()
802 rtl_write_byte(rtlpriv, REG_CR, bytetmp); in _rtl92ee_init_mac()
805 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, bytetmp); in _rtl92ee_init_mac()
809 bytetmp = rtl_read_byte(rtlpriv, REG_SYS_CLKR); in _rtl92ee_init_mac()
810 rtl_write_byte(rtlpriv, REG_SYS_CLKR, bytetmp | BIT(3)); in _rtl92ee_init_mac()
811 bytetmp = rtl_read_byte(rtlpriv, REG_GPIO_MUXCFG + 1); in _rtl92ee_init_mac()
812 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG + 1, bytetmp & (~BIT(4))); in _rtl92ee_init_mac()
814 rtl_write_word(rtlpriv, REG_CR, 0x2ff); in _rtl92ee_init_mac()
818 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_init_mac()
824 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); in _rtl92ee_init_mac()
825 rtl_write_dword(rtlpriv, REG_HISRE, 0xffffffff); in _rtl92ee_init_mac()
827 wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL); in _rtl92ee_init_mac()
830 rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); in _rtl92ee_init_mac()
832 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92ee_init_mac()
835 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in _rtl92ee_init_mac()
836 rtl_write_word(rtlpriv, REG_RXFLTMAP2, 0xffff); in _rtl92ee_init_mac()
839 rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); in _rtl92ee_init_mac()
842 rtl_write_dword(rtlpriv, REG_BCNQ_DESA, in _rtl92ee_init_mac()
845 rtl_write_dword(rtlpriv, REG_MGQ_DESA, in _rtl92ee_init_mac()
848 rtl_write_dword(rtlpriv, REG_VOQ_DESA, in _rtl92ee_init_mac()
851 rtl_write_dword(rtlpriv, REG_VIQ_DESA, in _rtl92ee_init_mac()
855 rtl_write_dword(rtlpriv, REG_BEQ_DESA, in _rtl92ee_init_mac()
859 dwordtmp = rtl_read_dword(rtlpriv, REG_BEQ_DESA); in _rtl92ee_init_mac()
861 rtl_write_dword(rtlpriv, REG_BKQ_DESA, in _rtl92ee_init_mac()
864 rtl_write_dword(rtlpriv, REG_HQ0_DESA, in _rtl92ee_init_mac()
868 rtl_write_dword(rtlpriv, REG_RX_DESA, in _rtl92ee_init_mac()
876 rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0x3fffffff); in _rtl92ee_init_mac()
878 bytetmp = rtl_read_byte(rtlpriv, REG_PCIE_CTRL_REG + 3); in _rtl92ee_init_mac()
879 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, bytetmp | 0xF7); in _rtl92ee_init_mac()
881 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in _rtl92ee_init_mac()
883 rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); in _rtl92ee_init_mac()
885 rtl_write_word(rtlpriv, REG_MGQ_TXBD_NUM, in _rtl92ee_init_mac()
887 rtl_write_word(rtlpriv, REG_VOQ_TXBD_NUM, in _rtl92ee_init_mac()
889 rtl_write_word(rtlpriv, REG_VIQ_TXBD_NUM, in _rtl92ee_init_mac()
891 rtl_write_word(rtlpriv, REG_BEQ_TXBD_NUM, in _rtl92ee_init_mac()
893 rtl_write_word(rtlpriv, REG_VOQ_TXBD_NUM, in _rtl92ee_init_mac()
895 rtl_write_word(rtlpriv, REG_BKQ_TXBD_NUM, in _rtl92ee_init_mac()
897 rtl_write_word(rtlpriv, REG_HI0Q_TXBD_NUM, in _rtl92ee_init_mac()
899 rtl_write_word(rtlpriv, REG_HI1Q_TXBD_NUM, in _rtl92ee_init_mac()
901 rtl_write_word(rtlpriv, REG_HI2Q_TXBD_NUM, in _rtl92ee_init_mac()
903 rtl_write_word(rtlpriv, REG_HI3Q_TXBD_NUM, in _rtl92ee_init_mac()
905 rtl_write_word(rtlpriv, REG_HI4Q_TXBD_NUM, in _rtl92ee_init_mac()
907 rtl_write_word(rtlpriv, REG_HI5Q_TXBD_NUM, in _rtl92ee_init_mac()
909 rtl_write_word(rtlpriv, REG_HI6Q_TXBD_NUM, in _rtl92ee_init_mac()
911 rtl_write_word(rtlpriv, REG_HI7Q_TXBD_NUM, in _rtl92ee_init_mac()
915 rtl_write_word(rtlpriv, REG_RX_RXBD_NUM, in _rtl92ee_init_mac()
919 rtl_write_word(rtlpriv, REG_RX_RXBD_NUM, in _rtl92ee_init_mac()
924 rtl_write_dword(rtlpriv, REG_TSFTIMER_HCI, 0XFFFFFFFF); in _rtl92ee_init_mac()
932 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_hw_configure() local
938 rtl_write_dword(rtlpriv, REG_RRSR, reg_rrsr); in _rtl92ee_hw_configure()
941 rtl_write_dword(rtlpriv, REG_ARFR0, 0x00000010); in _rtl92ee_hw_configure()
942 rtl_write_dword(rtlpriv, REG_ARFR0 + 4, 0x3e0ff000); in _rtl92ee_hw_configure()
945 rtl_write_dword(rtlpriv, REG_ARFR1, 0x00000010); in _rtl92ee_hw_configure()
946 rtl_write_dword(rtlpriv, REG_ARFR1 + 4, 0x000ff000); in _rtl92ee_hw_configure()
949 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92ee_hw_configure()
952 rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); in _rtl92ee_hw_configure()
955 rtl_write_word(rtlpriv, REG_RETRY_LIMIT, 0x0707); in _rtl92ee_hw_configure()
958 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x0201ffff); in _rtl92ee_hw_configure()
961 rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); in _rtl92ee_hw_configure()
962 rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); in _rtl92ee_hw_configure()
963 rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); in _rtl92ee_hw_configure()
964 rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); in _rtl92ee_hw_configure()
967 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92ee_hw_configure()
968 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92ee_hw_configure()
971 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92ee_hw_configure()
978 rtl_write_byte(rtlpriv, REG_BCN_CTRL_1, 0); in _rtl92ee_hw_configure()
981 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); /* 8 ms */ in _rtl92ee_hw_configure()
983 rtl_write_byte(rtlpriv, REG_PIFS, 0); in _rtl92ee_hw_configure()
984 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92ee_hw_configure()
986 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040); in _rtl92ee_hw_configure()
987 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x08ff); in _rtl92ee_hw_configure()
990 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); in _rtl92ee_hw_configure()
993 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92ee_hw_configure()
996 rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x100a); in _rtl92ee_hw_configure()
997 rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x100a); in _rtl92ee_hw_configure()
1000 rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x100a); in _rtl92ee_hw_configure()
1003 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x100a); in _rtl92ee_hw_configure()
1006 rtl_write_byte(rtlpriv, 0x4C7, 0x80); in _rtl92ee_hw_configure()
1008 rtl_write_byte(rtlpriv, REG_RX_PKT_LIMIT, 0x20); in _rtl92ee_hw_configure()
1010 rtl_write_word(rtlpriv, REG_MAX_AGGR_NUM, 0x1717); in _rtl92ee_hw_configure()
1013 rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); in _rtl92ee_hw_configure()
1014 rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); in _rtl92ee_hw_configure()
1019 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_enable_aspm_back_door() local
1024 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0x78); in _rtl92ee_enable_aspm_back_door()
1025 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1026 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1030 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1035 tmp32 = rtl_read_dword(rtlpriv, REG_BACKDOOR_DBI_RDATA); in _rtl92ee_enable_aspm_back_door()
1038 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1040 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0xf078); in _rtl92ee_enable_aspm_back_door()
1041 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1043 tmp8 = rtl_read_byte(rtlpriv, in _rtl92ee_enable_aspm_back_door()
1048 tmp8 = rtl_read_byte(rtlpriv, in _rtl92ee_enable_aspm_back_door()
1055 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0x70c); in _rtl92ee_enable_aspm_back_door()
1056 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1057 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1061 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1065 tmp32 = rtl_read_dword(rtlpriv, REG_BACKDOOR_DBI_RDATA); in _rtl92ee_enable_aspm_back_door()
1066 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1068 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0xf70c); in _rtl92ee_enable_aspm_back_door()
1069 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1072 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1076 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1080 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0x718); in _rtl92ee_enable_aspm_back_door()
1081 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x2); in _rtl92ee_enable_aspm_back_door()
1082 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1086 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1090 tmp32 = rtl_read_dword(rtlpriv, REG_BACKDOOR_DBI_RDATA); in _rtl92ee_enable_aspm_back_door()
1091 rtl_write_dword(rtlpriv, REG_BACKDOOR_DBI_WDATA, in _rtl92ee_enable_aspm_back_door()
1093 rtl_write_word(rtlpriv, REG_BACKDOOR_DBI_DATA, 0xf718); in _rtl92ee_enable_aspm_back_door()
1094 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2, 0x1); in _rtl92ee_enable_aspm_back_door()
1096 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1100 tmp8 = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 2); in _rtl92ee_enable_aspm_back_door()
1107 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_enable_hw_security_config() local
1111 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, in rtl92ee_enable_hw_security_config()
1113 rtlpriv->sec.pairwise_enc_algorithm, in rtl92ee_enable_hw_security_config()
1114 rtlpriv->sec.group_enc_algorithm); in rtl92ee_enable_hw_security_config()
1116 if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { in rtl92ee_enable_hw_security_config()
1117 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_enable_hw_security_config()
1124 if (rtlpriv->sec.use_defaultkey) { in rtl92ee_enable_hw_security_config()
1131 tmp = rtl_read_byte(rtlpriv, REG_CR + 1); in rtl92ee_enable_hw_security_config()
1132 rtl_write_byte(rtlpriv, REG_CR + 1, tmp | BIT(1)); in rtl92ee_enable_hw_security_config()
1134 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_enable_hw_security_config()
1137 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); in rtl92ee_enable_hw_security_config()
1140 static bool _rtl8192ee_check_pcie_dma_hang(struct rtl_priv *rtlpriv) in _rtl8192ee_check_pcie_dma_hang() argument
1145 tmp = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 3); in _rtl8192ee_check_pcie_dma_hang()
1147 rtl_write_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 3, in _rtl8192ee_check_pcie_dma_hang()
1155 tmp = rtl_read_byte(rtlpriv, REG_BACKDOOR_DBI_DATA + 3); in _rtl8192ee_check_pcie_dma_hang()
1157 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl8192ee_check_pcie_dma_hang()
1164 static void _rtl8192ee_reset_pcie_interface_dma(struct rtl_priv *rtlpriv, in _rtl8192ee_reset_pcie_interface_dma() argument
1171 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl8192ee_reset_pcie_interface_dma()
1182 tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL); in _rtl8192ee_reset_pcie_interface_dma()
1184 rtl_write_byte(rtlpriv, REG_RSV_CTRL, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1185 tmp = rtl_read_byte(rtlpriv, REG_PMC_DBG_CTRL2); in _rtl8192ee_reset_pcie_interface_dma()
1187 rtl_write_byte(rtlpriv, REG_PMC_DBG_CTRL2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1193 tmp = rtl_read_byte(rtlpriv, REG_RXDMA_CONTROL); in _rtl8192ee_reset_pcie_interface_dma()
1198 rtl_write_byte(rtlpriv, REG_RXDMA_CONTROL, (tmp | BIT(2))); in _rtl8192ee_reset_pcie_interface_dma()
1202 backup_pcie_dma_pause = rtl_read_byte(rtlpriv, REG_PCIE_CTRL_REG + 1); in _rtl8192ee_reset_pcie_interface_dma()
1204 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xFF); in _rtl8192ee_reset_pcie_interface_dma()
1210 rtl_write_byte(rtlpriv, REG_CR, 0); in _rtl8192ee_reset_pcie_interface_dma()
1216 tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1); in _rtl8192ee_reset_pcie_interface_dma()
1218 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1223 tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1); in _rtl8192ee_reset_pcie_interface_dma()
1225 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1231 rtl_write_byte(rtlpriv, REG_CR, 0xFF); in _rtl8192ee_reset_pcie_interface_dma()
1242 tmp = rtl_read_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL + 2); in _rtl8192ee_reset_pcie_interface_dma()
1244 rtl_write_byte(rtlpriv, REG_MAC_PHY_CTRL_NORMAL + 2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1257 tmp = rtl_read_byte(rtlpriv, REG_RXDMA_CONTROL); in _rtl8192ee_reset_pcie_interface_dma()
1258 rtl_write_byte(rtlpriv, REG_RXDMA_CONTROL, in _rtl8192ee_reset_pcie_interface_dma()
1261 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, in _rtl8192ee_reset_pcie_interface_dma()
1268 tmp = rtl_read_byte(rtlpriv, REG_PMC_DBG_CTRL2); in _rtl8192ee_reset_pcie_interface_dma()
1270 rtl_write_byte(rtlpriv, REG_PMC_DBG_CTRL2, tmp); in _rtl8192ee_reset_pcie_interface_dma()
1275 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_hw_init() local
1278 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_hw_init()
1285 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, " Rtl8192EE hw init\n"); in rtl92ee_hw_init()
1286 rtlpriv->rtlhal.being_init_adapter = true; in rtl92ee_hw_init()
1287 rtlpriv->intf_ops->disable_aspm(hw); in rtl92ee_hw_init()
1289 tmp_u1b = rtl_read_byte(rtlpriv, REG_SYS_CLKR+1); in rtl92ee_hw_init()
1290 u1byte = rtl_read_byte(rtlpriv, REG_CR); in rtl92ee_hw_init()
1298 if (_rtl8192ee_check_pcie_dma_hang(rtlpriv)) { in rtl92ee_hw_init()
1299 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "92ee dma hang!\n"); in rtl92ee_hw_init()
1300 _rtl8192ee_reset_pcie_interface_dma(rtlpriv, in rtl92ee_hw_init()
1307 rtl_write_byte(rtlpriv, 0x577, 0x03); in rtl92ee_hw_init()
1310 rtl_write_byte(rtlpriv, REG_AFE_CTRL4, 0x2A); in rtl92ee_hw_init()
1311 rtl_write_byte(rtlpriv, REG_AFE_CTRL4 + 1, 0x00); in rtl92ee_hw_init()
1312 rtl_write_byte(rtlpriv, REG_AFE_CTRL2, 0x83); in rtl92ee_hw_init()
1315 if (rtlpriv->btcoexist.btc_info.btcoexist == 1) { in rtl92ee_hw_init()
1316 rtl_write_byte(rtlpriv, 0x64, 0); in rtl92ee_hw_init()
1317 rtl_write_byte(rtlpriv, 0x65, 1); in rtl92ee_hw_init()
1320 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); in rtl92ee_hw_init()
1325 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, 0x8000); in rtl92ee_hw_init()
1328 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ee_hw_init()
1381 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); in rtl92ee_hw_init()
1383 rtlpriv->intf_ops->enable_aspm(hw); in rtl92ee_hw_init()
1387 rtlpriv->rtlhal.being_init_adapter = false; in rtl92ee_hw_init()
1405 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "PA BIAS path A\n"); in rtl92ee_hw_init()
1410 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "PA BIAS path B\n"); in rtl92ee_hw_init()
1413 rtl_write_byte(rtlpriv, REG_NAV_UPPER, ((30000 + 127) / 128)); in rtl92ee_hw_init()
1416 tmp_u4b = rtl_read_dword(rtlpriv, REG_SYS_SWR_CTRL1); in rtl92ee_hw_init()
1417 rtl_write_byte(rtlpriv, REG_SYS_SWR_CTRL2, 0x75); in rtl92ee_hw_init()
1419 rtl_write_dword(rtlpriv, REG_SYS_SWR_CTRL1, tmp_u4b); in rtl92ee_hw_init()
1423 rtl_write_dword(rtlpriv, 0x4fc, 0); in rtl92ee_hw_init()
1425 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92ee_hw_init()
1432 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_read_chip_version() local
1433 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92ee_read_chip_version()
1439 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG1); in _rtl92ee_read_chip_version()
1445 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_chip_version()
1455 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_set_media_status() local
1456 u8 bt_msr = rtl_read_byte(rtlpriv, MSR) & 0xfc; in _rtl92ee_set_media_status()
1463 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ee_set_media_status()
1469 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ee_set_media_status()
1475 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ee_set_media_status()
1481 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ee_set_media_status()
1485 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ee_set_media_status()
1496 if (mode != MSR_AP && rtlpriv->mac80211.link_state < MAC80211_LINKED) { in _rtl92ee_set_media_status()
1508 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92ee_set_media_status()
1513 rtl_write_byte(rtlpriv, MSR, bt_msr | mode); in _rtl92ee_set_media_status()
1514 rtlpriv->cfg->ops->led_control(hw, ledaction); in _rtl92ee_set_media_status()
1516 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92ee_set_media_status()
1518 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92ee_set_media_status()
1524 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_check_bssid() local
1528 if (rtlpriv->psc.rfpwr_state != ERFON) in rtl92ee_set_check_bssid()
1533 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, in rtl92ee_set_check_bssid()
1539 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, in rtl92ee_set_check_bssid()
1546 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_network_type() local
1551 if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { in rtl92ee_set_network_type()
1565 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_qos() local
1570 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); in rtl92ee_set_qos()
1576 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); in rtl92ee_set_qos()
1579 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); in rtl92ee_set_qos()
1589 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_enable_interrupt() local
1592 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); in rtl92ee_enable_interrupt()
1593 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); in rtl92ee_enable_interrupt()
1599 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_disable_interrupt() local
1602 rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED); in rtl92ee_disable_interrupt()
1603 rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED); in rtl92ee_disable_interrupt()
1610 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_poweroff_adapter() local
1616 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "POWER OFF adapter\n"); in _rtl92ee_poweroff_adapter()
1619 rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, in _rtl92ee_poweroff_adapter()
1622 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92ee_poweroff_adapter()
1625 if ((rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) && rtlhal->fw_ready) in _rtl92ee_poweroff_adapter()
1629 u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1); in _rtl92ee_poweroff_adapter()
1630 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2)))); in _rtl92ee_poweroff_adapter()
1633 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92ee_poweroff_adapter()
1636 rtl_hal_pwrseqcmdparsing(rtlpriv, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, in _rtl92ee_poweroff_adapter()
1640 u1b_tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL + 1); in _rtl92ee_poweroff_adapter()
1641 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp & (~BIT(0)))); in _rtl92ee_poweroff_adapter()
1642 u1b_tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL + 1); in _rtl92ee_poweroff_adapter()
1643 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp | BIT(0))); in _rtl92ee_poweroff_adapter()
1646 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0E); in _rtl92ee_poweroff_adapter()
1651 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_card_disable() local
1656 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "RTL8192ee card disable\n"); in rtl92ee_card_disable()
1665 if (rtlpriv->rtlhal.driver_is_goingto_unload || in rtl92ee_card_disable()
1667 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); in rtl92ee_card_disable()
1672 rtlpriv->phy.iqk_initialized = false; in rtl92ee_card_disable()
1678 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_interrupt_recognized() local
1681 *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92ee_interrupt_recognized()
1682 rtl_write_dword(rtlpriv, ISR, *p_inta); in rtl92ee_interrupt_recognized()
1684 *p_intb = rtl_read_dword(rtlpriv, REG_HISRE) & rtlpci->irq_mask[1]; in rtl92ee_interrupt_recognized()
1685 rtl_write_dword(rtlpriv, REG_HISRE, *p_intb); in rtl92ee_interrupt_recognized()
1690 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_beacon_related_registers() local
1698 rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); in rtl92ee_set_beacon_related_registers()
1699 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ee_set_beacon_related_registers()
1700 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); in rtl92ee_set_beacon_related_registers()
1701 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); in rtl92ee_set_beacon_related_registers()
1702 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); in rtl92ee_set_beacon_related_registers()
1703 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92ee_set_beacon_related_registers()
1705 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in rtl92ee_set_beacon_related_registers()
1710 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_beacon_interval() local
1714 RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, in rtl92ee_set_beacon_interval()
1716 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ee_set_beacon_interval()
1722 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_update_interrupt_mask() local
1725 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, in rtl92ee_update_interrupt_mask()
1789 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl8192ee_read_power_value_fromprom() local
1792 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl8192ee_read_power_value_fromprom()
1799 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl8192ee_read_power_value_fromprom()
2017 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_read_txpower_info_from_hwpg() local
2093 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ee_read_txpower_info_from_hwpg()
2104 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ee_read_txpower_info_from_hwpg()
2110 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_read_adapter_info() local
2123 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ee_read_adapter_info()
2127 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, in _rtl92ee_read_adapter_info()
2132 RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP\n", in _rtl92ee_read_adapter_info()
2137 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92ee_read_adapter_info()
2141 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in _rtl92ee_read_adapter_info()
2152 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROMId = 0x%4x\n", eeprom_id); in _rtl92ee_read_adapter_info()
2153 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_adapter_info()
2155 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_adapter_info()
2157 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_adapter_info()
2159 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_adapter_info()
2166 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, in _rtl92ee_read_adapter_info()
2176 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, in _rtl92ee_read_adapter_info()
2225 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ee_hal_customized_behavior() local
2231 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, in _rtl92ee_hal_customized_behavior()
2237 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_read_eeprom_info() local
2239 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_read_eeprom_info()
2245 rtlpriv->dm.rfpath_rxenable[0] = true; in rtl92ee_read_eeprom_info()
2247 rtlpriv->dm.rfpath_rxenable[0] = true; in rtl92ee_read_eeprom_info()
2248 rtlpriv->dm.rfpath_rxenable[1] = true; in rtl92ee_read_eeprom_info()
2250 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n", in rtl92ee_read_eeprom_info()
2252 tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); in rtl92ee_read_eeprom_info()
2254 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); in rtl92ee_read_eeprom_info()
2257 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); in rtl92ee_read_eeprom_info()
2261 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in rtl92ee_read_eeprom_info()
2265 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); in rtl92ee_read_eeprom_info()
2309 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_update_hal_rate_mask() local
2310 struct rtl_phy *rtlphy = &rtlpriv->phy; in rtl92ee_update_hal_rate_mask()
2420 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ee_update_hal_rate_mask()
2431 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ee_update_hal_rate_mask()
2443 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_update_hal_rate_tbl() local
2445 if (rtlpriv->dm.useramask) in rtl92ee_update_hal_rate_tbl()
2451 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_update_channel_access_setting() local
2455 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, in rtl92ee_update_channel_access_setting()
2461 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); in rtl92ee_update_channel_access_setting()
2474 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_set_key() local
2496 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); in rtl92ee_set_key()
2503 memset(rtlpriv->sec.key_buf[idx], 0, in rtl92ee_set_key()
2505 rtlpriv->sec.key_len[idx] = 0; in rtl92ee_set_key()
2524 RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG, in rtl92ee_set_key()
2530 if (is_wepkey || rtlpriv->sec.use_defaultkey) { in rtl92ee_set_key()
2543 RT_TRACE(rtlpriv, COMP_SEC, in rtl92ee_set_key()
2557 if (rtlpriv->sec.key_len[key_index] == 0) { in rtl92ee_set_key()
2558 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_set_key()
2566 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_set_key()
2569 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_set_key()
2575 rtlpriv->sec.key_buf[key_index]); in rtl92ee_set_key()
2577 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ee_set_key()
2586 rtlpriv->sec.key_buf[entry_id]); in rtl92ee_set_key()
2592 rtlpriv->sec.key_buf[entry_id]); in rtl92ee_set_key()
2601 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_read_bt_coexist_info_from_hwpg() local
2607 rtlpriv->btcoexist.btc_info.btcoexist = 1; in rtl92ee_read_bt_coexist_info_from_hwpg()
2609 rtlpriv->btcoexist.btc_info.btcoexist = 0; in rtl92ee_read_bt_coexist_info_from_hwpg()
2611 rtlpriv->btcoexist.btc_info.bt_type = BT_RTL8192E; in rtl92ee_read_bt_coexist_info_from_hwpg()
2612 rtlpriv->btcoexist.btc_info.ant_num = ANT_TOTAL_X2; in rtl92ee_read_bt_coexist_info_from_hwpg()
2614 rtlpriv->btcoexist.btc_info.btcoexist = 1; in rtl92ee_read_bt_coexist_info_from_hwpg()
2615 rtlpriv->btcoexist.btc_info.bt_type = BT_RTL8192E; in rtl92ee_read_bt_coexist_info_from_hwpg()
2616 rtlpriv->btcoexist.btc_info.ant_num = ANT_TOTAL_X1; in rtl92ee_read_bt_coexist_info_from_hwpg()
2622 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_bt_reg_init() local
2625 rtlpriv->btcoexist.reg_bt_iso = 2; in rtl92ee_bt_reg_init()
2627 rtlpriv->btcoexist.reg_bt_sco = 3; in rtl92ee_bt_reg_init()
2629 rtlpriv->btcoexist.reg_bt_sco = 0; in rtl92ee_bt_reg_init()
2634 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_bt_hw_init() local
2636 if (rtlpriv->cfg->ops->get_btc_status()) in rtl92ee_bt_hw_init()
2637 rtlpriv->btcoexist.btc_ops->btc_init_hw_config(rtlpriv); in rtl92ee_bt_hw_init()
2652 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ee_allow_all_destaddr() local
2661 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in rtl92ee_allow_all_destaddr()
2663 RT_TRACE(rtlpriv, COMP_TURBO | COMP_INIT, DBG_LOUD, in rtl92ee_allow_all_destaddr()