Lines Matching refs:ndev_dev
257 dev_dbg(ndev_dev(ndev), "Peer db addr %llx\n", *db_addr); in ndev_db_addr()
262 dev_dbg(ndev_dev(ndev), "Peer db size %llx\n", *db_size); in ndev_db_addr()
355 dev_dbg(ndev_dev(ndev), "Peer spad addr %llx\n", *spad_addr); in ndev_spad_addr()
393 dev_dbg(ndev_dev(ndev), "vec %d vec_mask %llx\n", vec, vec_mask); in ndev_interrupt()
468 dev_dbg(ndev_dev(ndev), "Using msix interrupts\n"); in ndev_init_isr()
496 dev_dbg(ndev_dev(ndev), "Using msi interrupts\n"); in ndev_init_isr()
514 dev_dbg(ndev_dev(ndev), "Using intx interrupts\n"); in ndev_init_isr()
973 dev_dbg(ndev_dev(ndev), in intel_ntb_link_enable()
977 dev_dbg(ndev_dev(ndev), "ignoring max_speed %d\n", max_speed); in intel_ntb_link_enable()
979 dev_dbg(ndev_dev(ndev), "ignoring max_width %d\n", max_width); in intel_ntb_link_enable()
1002 dev_dbg(ndev_dev(ndev), "Disabling link\n"); in intel_ntb_link_disable()
1211 dev_dbg(ndev_dev(ndev), "PPD %d B2B USD\n", ppd); in atom_ppd_topo()
1215 dev_dbg(ndev_dev(ndev), "PPD %d B2B DSD\n", ppd); in atom_ppd_topo()
1222 dev_dbg(ndev_dev(ndev), "PPD %d non B2B disabled\n", ppd); in atom_ppd_topo()
1226 dev_dbg(ndev_dev(ndev), "PPD %d invalid\n", ppd); in atom_ppd_topo()
1270 dev_dbg(ndev_dev(ndev), "ERRCORSTS = %x\n", status32); in atom_link_hb()
1276 dev_dbg(ndev_dev(ndev), "LTSSMERRSTS0 = %x\n", status32); in atom_link_hb()
1282 dev_dbg(ndev_dev(ndev), "DESKEWSTS = %x\n", status32); in atom_link_hb()
1287 dev_dbg(ndev_dev(ndev), "IBSTERRRCRVSTS0 = %x\n", status32); in atom_link_hb()
1293 dev_dbg(ndev_dev(ndev), "LTSSMSTATEJMP = %x\n", status32); in atom_link_hb()
1460 dev_dbg(ndev_dev(ndev), "PPD %d split bar\n", ppd); in xeon_ppd_bar4_split()
1494 dev_dbg(ndev_dev(ndev), "not using b2b mw\n"); in xeon_setup_b2b_mw()
1502 dev_dbg(ndev_dev(ndev), "using b2b mw bar %d\n", b2b_bar); in xeon_setup_b2b_mw()
1506 dev_dbg(ndev_dev(ndev), "b2b bar size %#llx\n", bar_size); in xeon_setup_b2b_mw()
1509 dev_dbg(ndev_dev(ndev), in xeon_setup_b2b_mw()
1513 dev_dbg(ndev_dev(ndev), in xeon_setup_b2b_mw()
1518 dev_dbg(ndev_dev(ndev), in xeon_setup_b2b_mw()
1531 dev_dbg(ndev_dev(ndev), "PBAR23SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1540 dev_dbg(ndev_dev(ndev), "SBAR23SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1544 dev_dbg(ndev_dev(ndev), "PBAR45SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1553 dev_dbg(ndev_dev(ndev), "SBAR45SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1556 dev_dbg(ndev_dev(ndev), "PBAR4SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1565 dev_dbg(ndev_dev(ndev), "SBAR4SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1568 dev_dbg(ndev_dev(ndev), "PBAR5SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1577 dev_dbg(ndev_dev(ndev), "SBAR5SZ %#x\n", bar_sz); in xeon_setup_b2b_mw()
1594 dev_dbg(ndev_dev(ndev), "SBAR01 %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1605 dev_dbg(ndev_dev(ndev), "SBAR23 %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1612 dev_dbg(ndev_dev(ndev), "SBAR45 %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1618 dev_dbg(ndev_dev(ndev), "SBAR4 %#010llx\n", bar_addr); in xeon_setup_b2b_mw()
1624 dev_dbg(ndev_dev(ndev), "SBAR5 %#010llx\n", bar_addr); in xeon_setup_b2b_mw()
1632 dev_dbg(ndev_dev(ndev), "SBAR23LMT %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1639 dev_dbg(ndev_dev(ndev), "SBAR45LMT %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1645 dev_dbg(ndev_dev(ndev), "SBAR4LMT %#010llx\n", bar_addr); in xeon_setup_b2b_mw()
1651 dev_dbg(ndev_dev(ndev), "SBAR5LMT %#05llx\n", bar_addr); in xeon_setup_b2b_mw()
1677 dev_dbg(ndev_dev(ndev), "PBAR23XLAT %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1683 dev_dbg(ndev_dev(ndev), "PBAR45XLAT %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1688 dev_dbg(ndev_dev(ndev), "PBAR4XLAT %#010llx\n", bar_addr); in xeon_setup_b2b_mw()
1693 dev_dbg(ndev_dev(ndev), "PBAR5XLAT %#010llx\n", bar_addr); in xeon_setup_b2b_mw()
1711 dev_dbg(ndev_dev(ndev), "B2BXLAT %#018llx\n", bar_addr); in xeon_setup_b2b_mw()
1743 dev_err(ndev_dev(ndev), "NTB Primary config disabled\n"); in xeon_init_ntb()
1761 dev_err(ndev_dev(ndev), "NTB Secondary config disabled\n"); in xeon_init_ntb()
1786 dev_dbg(ndev_dev(ndev), in xeon_init_ntb()
1792 dev_dbg(ndev_dev(ndev), in xeon_init_ntb()
1797 dev_warn(ndev_dev(ndev), "Reduce doorbell count by 1\n"); in xeon_init_ntb()
1914 dev_dbg(ndev_dev(ndev), "ppd %#x topo %s\n", ppd, in xeon_init_dev()
1921 dev_dbg(ndev_dev(ndev), "ppd %#x bar4_split %d\n", in xeon_init_dev()
1931 dev_dbg(ndev_dev(ndev), "mem %#x bar4_split %d\n", in xeon_init_dev()
1968 dev_warn(ndev_dev(ndev), "Cannot DMA highmem\n"); in intel_ntb_init_pci()
1976 dev_warn(ndev_dev(ndev), "Cannot DMA consistent highmem\n"); in intel_ntb_init_pci()