Lines Matching refs:entry
110 struct msi_desc *entry; in arch_setup_msi_irqs() local
122 for_each_pci_msi_entry(entry, dev) { in arch_setup_msi_irqs()
123 ret = arch_setup_msi_irq(dev, entry); in arch_setup_msi_irqs()
140 struct msi_desc *entry; in default_teardown_msi_irqs() local
142 for_each_pci_msi_entry(entry, dev) in default_teardown_msi_irqs()
143 if (entry->irq) in default_teardown_msi_irqs()
144 for (i = 0; i < entry->nvec_used; i++) in default_teardown_msi_irqs()
145 arch_teardown_msi_irq(entry->irq + i); in default_teardown_msi_irqs()
155 struct msi_desc *entry; in default_restore_msi_irq() local
157 entry = NULL; in default_restore_msi_irq()
159 for_each_pci_msi_entry(entry, dev) { in default_restore_msi_irq()
160 if (irq == entry->irq) in default_restore_msi_irq()
164 entry = irq_get_msi_desc(irq); in default_restore_msi_irq()
167 if (entry) in default_restore_msi_irq()
168 __pci_write_msi_msg(entry, &entry->msg); in default_restore_msi_irq()
279 struct msi_desc *entry; in default_restore_msi_irqs() local
281 for_each_pci_msi_entry(entry, dev) in default_restore_msi_irqs()
282 default_restore_msi_irq(dev, entry->irq); in default_restore_msi_irqs()
285 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) in __pci_read_msi_msg() argument
287 struct pci_dev *dev = msi_desc_to_pci_dev(entry); in __pci_read_msi_msg()
291 if (entry->msi_attrib.is_msix) { in __pci_read_msi_msg()
292 void __iomem *base = entry->mask_base + in __pci_read_msi_msg()
293 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; in __pci_read_msi_msg()
304 if (entry->msi_attrib.is_64) { in __pci_read_msi_msg()
316 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) in __pci_write_msi_msg() argument
318 struct pci_dev *dev = msi_desc_to_pci_dev(entry); in __pci_write_msi_msg()
322 } else if (entry->msi_attrib.is_msix) { in __pci_write_msi_msg()
323 void __iomem *base = pci_msix_desc_addr(entry); in __pci_write_msi_msg()
324 bool unmasked = !(entry->masked & PCI_MSIX_ENTRY_CTRL_MASKBIT); in __pci_write_msi_msg()
335 __pci_msix_desc_mask_irq(entry, PCI_MSIX_ENTRY_CTRL_MASKBIT); in __pci_write_msi_msg()
342 __pci_msix_desc_mask_irq(entry, 0); in __pci_write_msi_msg()
352 msgctl |= entry->msi_attrib.multiple << 4; in __pci_write_msi_msg()
357 if (entry->msi_attrib.is_64) { in __pci_write_msi_msg()
369 entry->msg = *msg; in __pci_write_msi_msg()
374 struct msi_desc *entry = irq_get_msi_desc(irq); in pci_write_msi_msg() local
376 __pci_write_msi_msg(entry, msg); in pci_write_msi_msg()
383 struct msi_desc *entry, *tmp; in free_msi_irqs() local
388 for_each_pci_msi_entry(entry, dev) in free_msi_irqs()
389 if (entry->irq) in free_msi_irqs()
390 for (i = 0; i < entry->nvec_used; i++) in free_msi_irqs()
391 BUG_ON(irq_has_action(entry->irq + i)); in free_msi_irqs()
411 list_for_each_entry_safe(entry, tmp, msi_list, list) { in free_msi_irqs()
412 if (entry->msi_attrib.is_msix) { in free_msi_irqs()
413 if (list_is_last(&entry->list, msi_list)) in free_msi_irqs()
414 iounmap(entry->mask_base); in free_msi_irqs()
417 list_del(&entry->list); in free_msi_irqs()
418 free_msi_entry(entry); in free_msi_irqs()
431 struct msi_desc *entry; in __pci_restore_msi_state() local
436 entry = irq_get_msi_desc(dev->irq); in __pci_restore_msi_state()
443 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap), in __pci_restore_msi_state()
444 entry->masked); in __pci_restore_msi_state()
446 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; in __pci_restore_msi_state()
452 struct msi_desc *entry; in __pci_restore_msix_state() local
464 for_each_pci_msi_entry(entry, dev) in __pci_restore_msix_state()
465 msix_mask_irq(entry, entry->masked); in __pci_restore_msix_state()
480 struct msi_desc *entry; in msi_mode_show() local
488 entry = irq_get_msi_desc(irq); in msi_mode_show()
489 if (entry) in msi_mode_show()
491 entry->msi_attrib.is_msix ? "msix" : "msi"); in msi_mode_show()
503 struct msi_desc *entry; in populate_msi_sysfs() local
510 for_each_pci_msi_entry(entry, pdev) in populate_msi_sysfs()
511 num_msi += entry->nvec_used; in populate_msi_sysfs()
519 for_each_pci_msi_entry(entry, pdev) { in populate_msi_sysfs()
520 for (i = 0; i < entry->nvec_used; i++) { in populate_msi_sysfs()
528 entry->irq + i); in populate_msi_sysfs()
576 struct msi_desc *entry; in msi_setup_entry() local
579 entry = alloc_msi_entry(&dev->dev); in msi_setup_entry()
580 if (!entry) in msi_setup_entry()
585 entry->msi_attrib.is_msix = 0; in msi_setup_entry()
586 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT); in msi_setup_entry()
587 entry->msi_attrib.entry_nr = 0; in msi_setup_entry()
588 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); in msi_setup_entry()
589 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ in msi_setup_entry()
590 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; in msi_setup_entry()
591 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec)); in msi_setup_entry()
592 entry->nvec_used = nvec; in msi_setup_entry()
595 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64; in msi_setup_entry()
597 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32; in msi_setup_entry()
600 if (entry->msi_attrib.maskbit) in msi_setup_entry()
601 pci_read_config_dword(dev, entry->mask_pos, &entry->masked); in msi_setup_entry()
603 return entry; in msi_setup_entry()
608 struct msi_desc *entry; in msi_verify_entries() local
610 for_each_pci_msi_entry(entry, dev) { in msi_verify_entries()
611 if (!dev->no_64bit_msi || !entry->msg.address_hi) in msi_verify_entries()
633 struct msi_desc *entry; in msi_capability_init() local
639 entry = msi_setup_entry(dev, nvec); in msi_capability_init()
640 if (!entry) in msi_capability_init()
644 mask = msi_mask(entry->msi_attrib.multi_cap); in msi_capability_init()
645 msi_mask_irq(entry, mask, mask); in msi_capability_init()
647 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev)); in msi_capability_init()
652 msi_mask_irq(entry, mask, 0); in msi_capability_init()
659 msi_mask_irq(entry, mask, 0); in msi_capability_init()
666 msi_mask_irq(entry, mask, 0); in msi_capability_init()
677 dev->irq = entry->irq; in msi_capability_init()
704 struct msi_desc *entry; in msix_setup_entries() local
709 entry = alloc_msi_entry(&dev->dev); in msix_setup_entries()
710 if (!entry) { in msix_setup_entries()
719 entry->msi_attrib.is_msix = 1; in msix_setup_entries()
720 entry->msi_attrib.is_64 = 1; in msix_setup_entries()
721 entry->msi_attrib.entry_nr = entries[i].entry; in msix_setup_entries()
722 entry->msi_attrib.default_irq = dev->irq; in msix_setup_entries()
723 entry->mask_base = base; in msix_setup_entries()
724 entry->nvec_used = 1; in msix_setup_entries()
726 addr = pci_msix_desc_addr(entry); in msix_setup_entries()
727 entry->masked = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL); in msix_setup_entries()
728 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev)); in msix_setup_entries()
736 struct msi_desc *entry; in msix_update_entries() local
738 for_each_pci_msi_entry(entry, dev) { in msix_update_entries()
740 entries->vector = entry->irq; in msix_update_entries()
828 struct msi_desc *entry; in msix_capability_init() local
831 for_each_pci_msi_entry(entry, dev) { in msix_capability_init()
832 if (entry->irq != 0) in msix_capability_init()
1003 if (entries[i].entry >= nr_entries) in pci_enable_msix()
1006 if (entries[i].entry == entries[j].entry) in pci_enable_msix()
1023 struct msi_desc *entry; in pci_msix_shutdown() local
1029 for_each_pci_msi_entry(entry, dev) in pci_msix_shutdown()
1030 __pci_msix_desc_mask_irq(entry, 1); in pci_msix_shutdown()