• Home
  • Raw
  • Download

Lines Matching refs:pio

153 	enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
154 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
155 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
156 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
157 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
158 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
159 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
160 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
161 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
162 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
163 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
164 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
165 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
166 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
167 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
363 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt() argument
365 writel_relaxed(mask, pio + PIO_IDR); in at91_mux_disable_interrupt()
368 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin) in at91_mux_get_pullup() argument
370 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1); in at91_mux_get_pullup()
373 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_pullup() argument
376 writel_relaxed(mask, pio + PIO_PPDDR); in at91_mux_set_pullup()
378 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR)); in at91_mux_set_pullup()
381 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin) in at91_mux_get_multidrive() argument
383 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1; in at91_mux_get_multidrive()
386 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_multidrive() argument
388 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR)); in at91_mux_set_multidrive()
391 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_set_A_periph() argument
393 writel_relaxed(mask, pio + PIO_ASR); in at91_mux_set_A_periph()
396 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_set_B_periph() argument
398 writel_relaxed(mask, pio + PIO_BSR); in at91_mux_set_B_periph()
401 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_A_periph() argument
404 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, in at91_mux_pio3_set_A_periph()
405 pio + PIO_ABCDSR1); in at91_mux_pio3_set_A_periph()
406 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_A_periph()
407 pio + PIO_ABCDSR2); in at91_mux_pio3_set_A_periph()
410 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_B_periph() argument
412 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, in at91_mux_pio3_set_B_periph()
413 pio + PIO_ABCDSR1); in at91_mux_pio3_set_B_periph()
414 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_B_periph()
415 pio + PIO_ABCDSR2); in at91_mux_pio3_set_B_periph()
418 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_C_periph() argument
420 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_C_periph()
421 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_C_periph()
424 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_D_periph() argument
426 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_D_periph()
427 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_D_periph()
430 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_get_periph() argument
434 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_pio3_get_periph()
437 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask); in at91_mux_pio3_get_periph()
438 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1); in at91_mux_pio3_get_periph()
443 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) in at91_mux_get_periph() argument
447 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_get_periph()
450 select = readl_relaxed(pio + PIO_ABSR) & mask; in at91_mux_get_periph()
455 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_get_deglitch() argument
457 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1; in at91_mux_get_deglitch()
460 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_set_deglitch() argument
462 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); in at91_mux_set_deglitch()
465 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_deglitch() argument
467 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) in at91_mux_pio3_get_deglitch()
468 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_deglitch()
473 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_deglitch() argument
476 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_deglitch()
477 at91_mux_set_deglitch(pio, mask, is_on); in at91_mux_pio3_set_deglitch()
480 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) in at91_mux_pio3_get_debounce() argument
482 *div = readl_relaxed(pio + PIO_SCDR); in at91_mux_pio3_get_debounce()
484 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) && in at91_mux_pio3_get_debounce()
485 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_debounce()
488 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, in at91_mux_pio3_set_debounce() argument
492 writel_relaxed(mask, pio + PIO_IFSCER); in at91_mux_pio3_set_debounce()
493 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); in at91_mux_pio3_set_debounce()
494 writel_relaxed(mask, pio + PIO_IFER); in at91_mux_pio3_set_debounce()
496 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_debounce()
499 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_pulldown() argument
501 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1); in at91_mux_pio3_get_pulldown()
504 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_pulldown() argument
507 writel_relaxed(mask, pio + PIO_PUDR); in at91_mux_pio3_set_pulldown()
509 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); in at91_mux_pio3_set_pulldown()
512 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) in at91_mux_pio3_disable_schmitt_trig() argument
514 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); in at91_mux_pio3_disable_schmitt_trig()
517 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_schmitt_trig() argument
519 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1; in at91_mux_pio3_get_schmitt_trig()
531 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio, in at91_mux_sama5d3_get_drivestrength() argument
534 unsigned tmp = read_drive_strength(pio + in at91_mux_sama5d3_get_drivestrength()
545 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio, in at91_mux_sam9x5_get_drivestrength() argument
548 unsigned tmp = read_drive_strength(pio + in at91_mux_sam9x5_get_drivestrength()
569 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sama5d3_set_drivestrength() argument
577 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting); in at91_mux_sama5d3_set_drivestrength()
580 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x5_set_drivestrength() argument
591 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin, in at91_mux_sam9x5_set_drivestrength()
697 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask) in at91_mux_gpio_disable() argument
699 writel_relaxed(mask, pio + PIO_PDR); in at91_mux_gpio_disable()
702 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input) in at91_mux_gpio_enable() argument
704 writel_relaxed(mask, pio + PIO_PER); in at91_mux_gpio_enable()
705 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER)); in at91_mux_gpio_enable()
717 void __iomem *pio; in at91_pmx_set() local
734 pio = pin_to_controller(info, pin->bank); in at91_pmx_set()
736 if (!pio) in at91_pmx_set()
740 at91_mux_disable_interrupt(pio, mask); in at91_pmx_set()
743 at91_mux_gpio_enable(pio, mask, 1); in at91_pmx_set()
746 info->ops->mux_A_periph(pio, mask); in at91_pmx_set()
749 info->ops->mux_B_periph(pio, mask); in at91_pmx_set()
754 info->ops->mux_C_periph(pio, mask); in at91_pmx_set()
759 info->ops->mux_D_periph(pio, mask); in at91_pmx_set()
763 at91_mux_gpio_disable(pio, mask); in at91_pmx_set()
851 void __iomem *pio; in at91_pinconf_get() local
857 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_get()
859 if (!pio) in at91_pinconf_get()
864 if (at91_mux_get_multidrive(pio, pin)) in at91_pinconf_get()
867 if (at91_mux_get_pullup(pio, pin)) in at91_pinconf_get()
870 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin)) in at91_pinconf_get()
872 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) in at91_pinconf_get()
874 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin)) in at91_pinconf_get()
876 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin)) in at91_pinconf_get()
879 *config |= (info->ops->get_drivestrength(pio, pin) in at91_pinconf_get()
891 void __iomem *pio; in at91_pinconf_set() local
902 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_set()
904 if (!pio) in at91_pinconf_set()
913 at91_mux_set_pullup(pio, mask, config & PULL_UP); in at91_pinconf_set()
914 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE); in at91_pinconf_set()
916 info->ops->set_deglitch(pio, mask, config & DEGLITCH); in at91_pinconf_set()
918 info->ops->set_debounce(pio, mask, config & DEBOUNCE, in at91_pinconf_set()
921 info->ops->set_pulldown(pio, mask, config & PULL_DOWN); in at91_pinconf_set()
923 info->ops->disable_schmitt_trig(pio, mask); in at91_pinconf_set()
925 info->ops->set_drivestrength(pio, pin, in at91_pinconf_set()
1286 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction() local
1290 osr = readl_relaxed(pio + PIO_OSR); in at91_gpio_get_direction()
1297 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input() local
1300 writel_relaxed(mask, pio + PIO_ODR); in at91_gpio_direction_input()
1307 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get() local
1311 pdsr = readl_relaxed(pio + PIO_PDSR); in at91_gpio_get()
1319 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set() local
1322 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_set()
1329 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple() local
1336 writel_relaxed(set_mask, pio + PIO_SODR); in at91_gpio_set_multiple()
1337 writel_relaxed(clear_mask, pio + PIO_CODR); in at91_gpio_set_multiple()
1344 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output() local
1347 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_direction_output()
1348 writel_relaxed(mask, pio + PIO_OER); in at91_gpio_direction_output()
1359 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show() local
1368 mode = at91_gpio->ops->get_periph(pio, mask); in at91_gpio_dbg_show()
1374 readl_relaxed(pio + PIO_OSR) & mask ? in at91_gpio_dbg_show()
1377 readl_relaxed(pio + PIO_PDSR) & mask ? in at91_gpio_dbg_show()
1406 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask() local
1409 if (pio) in gpio_irq_mask()
1410 writel_relaxed(mask, pio + PIO_IDR); in gpio_irq_mask()
1416 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask() local
1419 if (pio) in gpio_irq_unmask()
1420 writel_relaxed(mask, pio + PIO_IER); in gpio_irq_unmask()
1438 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type() local
1444 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1445 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1449 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1450 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1454 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1455 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1459 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1460 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1468 writel_relaxed(mask, pio + PIO_AIMDR); in alt_gpio_irq_type()
1477 writel_relaxed(mask, pio + PIO_AIMER); in alt_gpio_irq_type()
1516 void __iomem *pio; in at91_pinctrl_gpio_suspend() local
1521 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_suspend()
1523 backups[i] = readl_relaxed(pio + PIO_IMR); in at91_pinctrl_gpio_suspend()
1524 writel_relaxed(backups[i], pio + PIO_IDR); in at91_pinctrl_gpio_suspend()
1525 writel_relaxed(wakeups[i], pio + PIO_IER); in at91_pinctrl_gpio_suspend()
1540 void __iomem *pio; in at91_pinctrl_gpio_resume() local
1545 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_resume()
1550 writel_relaxed(wakeups[i], pio + PIO_IDR); in at91_pinctrl_gpio_resume()
1551 writel_relaxed(backups[i], pio + PIO_IER); in at91_pinctrl_gpio_resume()
1566 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler() local
1576 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR); in gpio_irq_handler()
1581 pio = at91_gpio->regbase; in gpio_irq_handler()