Lines Matching refs:BIT4
492 #define RECEIVE_DATA BIT4
509 #define RXSTATUS_RXBOUND BIT4
548 #define TXSTATUS_EOF_SENT BIT4
549 #define TXSTATUS_EOM_SENT BIT4
569 #define MISCSTATUS_CTS BIT4
594 #define SICR_CTS_INACTIVE BIT4
595 #define SICR_CTS (BIT5|BIT4)
629 #define TXSTATUS_EOF BIT4
4727 RegValue |= BIT4; in usc_set_sdlc_mode()
4999 RegValue |= BIT4; /* enable BRG1 */ in usc_set_sdlc_mode()
5915 RegValue |= BIT4 | BIT3 | BIT2; in usc_set_async_mode()
5972 RegValue |= BIT4 | BIT3 | BIT2; in usc_set_async_mode()
6119 if (usc_InReg( info, RCSR ) & (BIT8 | BIT4 | BIT3 | BIT1)) in usc_loopback_frame()
6273 Control &= ~(BIT4); in usc_set_serial_signals()
6275 Control |= BIT4; in usc_set_serial_signals()
7188 if ( !(status & BIT4) && (status & BIT5) ) { in mgsl_dma_test()
7282 while ( !(status & (BIT6 | BIT5 | BIT4 | BIT2 | BIT1)) ) { in mgsl_dma_test()