Lines Matching refs:BIT1
417 #define TXRDYE BIT1
427 #define BRKD BIT1
428 #define ABTD BIT1
429 #define GAPD BIT1
2581 if (status & BIT1 << shift) in synclinkmp_interrupt()
2590 if (dmastatus & BIT1 << shift) in synclinkmp_interrupt()
4029 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0))); in enable_loopback()
4047 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) & ~(BIT1 + BIT0))); in enable_loopback()
4302 while( info->tx_count && (read_reg(info,SR0) & BIT1) ) { in tx_load_fifo()
4396 RegValue |= BIT1; in async_mode()
4415 RegValue |= BIT1; in async_mode()
4430 RegValue |= (BIT1 + BIT0); in async_mode()
4547 RegValue |= BIT2 + BIT1; in hdlc_mode()
4754 testbit = BIT1 << (info->port_num * 2); // Port 0..3 RI is GPDATA<1,3,5,7> in get_signals()
4779 EnableBit = BIT1 << (info->port_num*2); in set_signals()