Lines Matching refs:BIT4
423 #define SYNCD BIT4
424 #define FLGD BIT4
439 #define FRME BIT4
440 #define RBIT BIT4
2598 if (timerstatus0 & (BIT5 | BIT4)) in synclinkmp_interrupt()
2602 if (timerstatus1 & (BIT5 | BIT4)) in synclinkmp_interrupt()
4410 case 7: RegValue |= BIT4 + BIT2; break; in async_mode()
4412 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break; in async_mode()
4543 RegValue |= BIT4; in hdlc_mode()
4545 RegValue |= BIT4; in hdlc_mode()
4591 RegValue |= BIT4; in hdlc_mode()
5104 write_reg(info, IER2, (unsigned char)((info->port_num & 1) ? BIT6 : BIT4)); in irq_test()
5207 lcr1_brdr_value &= ~(BIT5 + BIT4 + BIT3); in init_adapter()
5212 lcr1_brdr_value |= BIT5 + BIT4 + BIT3; in init_adapter()
5215 lcr1_brdr_value |= BIT5 + BIT4; in init_adapter()