Lines Matching refs:CTRL_TIMEOUT
48 #define CTRL_TIMEOUT 2000 /* milliseconds */ macro
166 0x32, 0x40, state ? 0x01 : 0x00, 0x00, NULL, 0, CTRL_TIMEOUT); in speedtch_set_swbuff()
186 0x01, 0x40, 0x0b, 0x00, buf, 2, CTRL_TIMEOUT); in speedtch_test_sequence()
194 0x01, 0x40, 0x02, 0x00, buf, 2, CTRL_TIMEOUT); in speedtch_test_sequence()
203 0x01, 0x40, 0x03, 0x00, buf, 3, CTRL_TIMEOUT); in speedtch_test_sequence()
212 0x01, 0x40, 0x04, 0x00, buf, 3, CTRL_TIMEOUT); in speedtch_test_sequence()
221 0x01, 0x40, 0x11, 0x00, buf, 1, CTRL_TIMEOUT); in speedtch_test_sequence()
232 MODEM_OPTION_LENGTH, CTRL_TIMEOUT); in speedtch_test_sequence()
240 0x01, 0x40, 0x12, 0x00, buf, 2, CTRL_TIMEOUT); in speedtch_test_sequence()
433 CTRL_TIMEOUT); in speedtch_read_status()
441 CTRL_TIMEOUT); in speedtch_read_status()
449 CTRL_TIMEOUT); in speedtch_read_status()
457 CTRL_TIMEOUT); in speedtch_read_status()
465 CTRL_TIMEOUT); in speedtch_read_status()
487 buf, 2, CTRL_TIMEOUT); in speedtch_start_synchro()