Lines Matching refs:hw_params
462 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_init_fs_ls_pclk_sel()
463 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_init_fs_ls_pclk_sel()
665 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_phy_init()
666 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_phy_init()
687 switch (hsotg->hw_params.arch) { in dwc2_gahbcfg_init()
736 switch (hsotg->hw_params.op_mode) { in dwc2_gusbcfg_init()
895 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_calculate_dynamic_fifo()
995 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) { in dwc2_config_fifos()
1050 u32 op_mode = hsotg->hw_params.op_mode; in dwc2_core_host_init()
1051 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a || in dwc2_core_host_init()
1052 !hsotg->hw_params.dma_desc_enable || in dwc2_core_host_init()
2107 if ((usbcfg & GUSBCFG_PHYSEL) && hsotg->hw_params.fs_phy_type == in dwc2_calc_frame_interval()
2120 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_SHARED_UTMI) in dwc2_calc_frame_interval()
2123 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED) in dwc2_calc_frame_interval()
2397 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) in dwc2_set_param_otg_cap()
2401 switch (hsotg->hw_params.op_mode) { in dwc2_set_param_otg_cap()
2425 switch (hsotg->hw_params.op_mode) { in dwc2_set_param_otg_cap()
2448 if (val > 0 && hsotg->hw_params.arch == GHWCFG2_SLAVE_ONLY_ARCH) in dwc2_set_param_dma_enable()
2458 val = hsotg->hw_params.arch != GHWCFG2_SLAVE_ONLY_ARCH; in dwc2_set_param_dma_enable()
2470 !hsotg->hw_params.dma_desc_enable)) in dwc2_set_param_dma_desc_enable()
2481 hsotg->hw_params.dma_desc_enable); in dwc2_set_param_dma_desc_enable()
2510 if (val > 0 && !hsotg->hw_params.enable_dynamic_fifo) in dwc2_set_param_enable_dynamic_fifo()
2520 val = hsotg->hw_params.enable_dynamic_fifo; in dwc2_set_param_enable_dynamic_fifo()
2531 if (val < 16 || val > hsotg->hw_params.host_rx_fifo_size) in dwc2_set_param_host_rx_fifo_size()
2539 val = hsotg->hw_params.host_rx_fifo_size; in dwc2_set_param_host_rx_fifo_size()
2550 if (val < 16 || val > hsotg->hw_params.host_nperio_tx_fifo_size) in dwc2_set_param_host_nperio_tx_fifo_size()
2558 val = hsotg->hw_params.host_nperio_tx_fifo_size; in dwc2_set_param_host_nperio_tx_fifo_size()
2570 if (val < 16 || val > hsotg->hw_params.host_perio_tx_fifo_size) in dwc2_set_param_host_perio_tx_fifo_size()
2578 val = hsotg->hw_params.host_perio_tx_fifo_size; in dwc2_set_param_host_perio_tx_fifo_size()
2590 if (val < 2047 || val > hsotg->hw_params.max_transfer_size) in dwc2_set_param_max_transfer_size()
2598 val = hsotg->hw_params.max_transfer_size; in dwc2_set_param_max_transfer_size()
2609 if (val < 15 || val > hsotg->hw_params.max_packet_count) in dwc2_set_param_max_packet_count()
2617 val = hsotg->hw_params.max_packet_count; in dwc2_set_param_max_packet_count()
2628 if (val < 1 || val > hsotg->hw_params.host_channels) in dwc2_set_param_host_channels()
2636 val = hsotg->hw_params.host_channels; in dwc2_set_param_host_channels()
2658 hs_phy_type = hsotg->hw_params.hs_phy_type; in dwc2_set_param_phy_type()
2659 fs_phy_type = hsotg->hw_params.fs_phy_type; in dwc2_set_param_phy_type()
2793 switch (hsotg->hw_params.utmi_phy_data_width) { in dwc2_set_param_phy_utmi_width()
2811 val = (hsotg->hw_params.utmi_phy_data_width == in dwc2_set_param_phy_utmi_width()
2860 if (val == 1 && !(hsotg->hw_params.i2c_enable)) in dwc2_set_param_i2c_enable()
2868 val = hsotg->hw_params.i2c_enable; in dwc2_set_param_i2c_enable()
2889 if (val == 1 && !hsotg->hw_params.en_multiple_tx_fifo) in dwc2_set_param_en_multiple_tx_fifo()
2897 val = hsotg->hw_params.en_multiple_tx_fifo; in dwc2_set_param_en_multiple_tx_fifo()
2917 if (val == 1 && hsotg->hw_params.snpsid < DWC2_CORE_REV_2_92a) in dwc2_set_param_reload_ctl()
2925 val = hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_92a; in dwc2_set_param_reload_ctl()
3061 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_get_hwparams()