Lines Matching refs:MHZ
41 #define MHZ (1000 * 1000) macro
42 #define FIN_HZ (24 * MHZ)
44 #define DFIN_PLL_MIN_HZ (6 * MHZ)
45 #define DFIN_PLL_MAX_HZ (12 * MHZ)
47 #define DFVCO_MIN_HZ (500 * MHZ)
48 #define DFVCO_MAX_HZ (1000 * MHZ)
502 if (dfin_pll < 7 * MHZ) in exynos_mipi_dsi_change_pll()
504 else if (dfin_pll < 8 * MHZ) in exynos_mipi_dsi_change_pll()
506 else if (dfin_pll < 9 * MHZ) in exynos_mipi_dsi_change_pll()
508 else if (dfin_pll < 10 * MHZ) in exynos_mipi_dsi_change_pll()
510 else if (dfin_pll < 11 * MHZ) in exynos_mipi_dsi_change_pll()
527 if (dpll_out < dpll_table[i] * MHZ) { in exynos_mipi_dsi_change_pll()
548 (dpll_out / MHZ)); in exynos_mipi_dsi_change_pll()
596 if ((byte_clk / esc_div) >= (20 * MHZ) || in exynos_mipi_dsi_set_clock()
616 (byte_clk / MHZ)); in exynos_mipi_dsi_set_clock()
618 (dsim->dsim_config->esc_clk / MHZ)); in exynos_mipi_dsi_set_clock()
621 ((byte_clk / esc_div) / MHZ)); in exynos_mipi_dsi_set_clock()