Lines Matching refs:mgr
72 #define PCXHR_INPB(mgr,x) inb((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
73 #define PCXHR_INPL(mgr,x) inl((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
74 #define PCXHR_OUTPB(mgr,x,data) outb((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
75 #define PCXHR_OUTPL(mgr,x,data) outl((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
126 static int pcxhr_check_reg_bit(struct pcxhr_mgr *mgr, unsigned int reg, in pcxhr_check_reg_bit() argument
133 *read = PCXHR_INPB(mgr, reg); in pcxhr_check_reg_bit()
136 dev_dbg(&mgr->pci->dev, in pcxhr_check_reg_bit()
143 dev_err(&mgr->pci->dev, in pcxhr_check_reg_bit()
179 static int pcxhr_send_it_dsp(struct pcxhr_mgr *mgr, in pcxhr_send_it_dsp() argument
187 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, in pcxhr_send_it_dsp()
188 PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & in pcxhr_send_it_dsp()
199 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_send_it_dsp()
203 PCXHR_OUTPB(mgr, PCXHR_DSP_CVR, reg); in pcxhr_send_it_dsp()
217 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_CVR, PCXHR_CVR_HI08_HC, 0, in pcxhr_send_it_dsp()
220 dev_err(&mgr->pci->dev, "pcxhr_send_it_dsp : TIMEOUT CVR\n"); in pcxhr_send_it_dsp()
225 err = pcxhr_check_reg_bit(mgr, PCXHR_PLX_MBOX0, in pcxhr_send_it_dsp()
231 dev_err(&mgr->pci->dev, in pcxhr_send_it_dsp()
239 void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr) in pcxhr_reset_xilinx_com() argument
242 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, in pcxhr_reset_xilinx_com()
246 static void pcxhr_enable_irq(struct pcxhr_mgr *mgr, int enable) in pcxhr_enable_irq() argument
248 unsigned int reg = PCXHR_INPL(mgr, PCXHR_PLX_IRQCS); in pcxhr_enable_irq()
254 PCXHR_OUTPL(mgr, PCXHR_PLX_IRQCS, reg); in pcxhr_enable_irq()
257 void pcxhr_reset_dsp(struct pcxhr_mgr *mgr) in pcxhr_reset_dsp() argument
260 pcxhr_enable_irq(mgr, 0); in pcxhr_reset_dsp()
263 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, 0); in pcxhr_reset_dsp()
265 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, 3); in pcxhr_reset_dsp()
269 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, 0); in pcxhr_reset_dsp()
272 void pcxhr_enable_dsp(struct pcxhr_mgr *mgr) in pcxhr_enable_dsp() argument
275 pcxhr_enable_irq(mgr, 1); in pcxhr_enable_dsp()
281 int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, in pcxhr_load_xilinx_binary() argument
291 chipsc = PCXHR_INPL(mgr, PCXHR_PLX_CHIPSC); in pcxhr_load_xilinx_binary()
298 dev_err(&mgr->pci->dev, "error loading first xilinx\n"); in pcxhr_load_xilinx_binary()
303 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
315 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
317 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
324 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
333 static int pcxhr_download_dsp(struct pcxhr_mgr *mgr, const struct firmware *dsp) in pcxhr_download_dsp() argument
359 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_download_dsp()
364 dev_err(&mgr->pci->dev, in pcxhr_download_dsp()
369 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, data[0]); in pcxhr_download_dsp()
370 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, data[1]); in pcxhr_download_dsp()
371 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, data[2]); in pcxhr_download_dsp()
384 int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, in pcxhr_load_eeprom_binary() argument
392 if (PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & PCXHR_MBOX0_BOOT_HERE) { in pcxhr_load_eeprom_binary()
396 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg | PCXHR_ICR_HI08_INIT); in pcxhr_load_eeprom_binary()
398 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_load_eeprom_binary()
400 dev_dbg(&mgr->pci->dev, "no need to load eeprom boot\n"); in pcxhr_load_eeprom_binary()
403 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_load_eeprom_binary()
405 err = pcxhr_download_dsp(mgr, eeprom); in pcxhr_load_eeprom_binary()
409 return pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_load_eeprom_binary()
416 int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot) in pcxhr_load_boot_binary() argument
419 unsigned int physaddr = mgr->hostport.addr; in pcxhr_load_boot_binary()
425 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX1, (physaddr >> 8)); in pcxhr_load_boot_binary()
427 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_BOOT, 0); in pcxhr_load_boot_binary()
431 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, in pcxhr_load_boot_binary()
432 PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & ~PCXHR_MBOX0_HF5); in pcxhr_load_boot_binary()
434 err = pcxhr_download_dsp(mgr, boot); in pcxhr_load_boot_binary()
438 return pcxhr_check_reg_bit(mgr, PCXHR_PLX_MBOX0, PCXHR_MBOX0_HF5, in pcxhr_load_boot_binary()
445 int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp) in pcxhr_load_dsp_binary() argument
449 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_BOARD_FUNC, 0); in pcxhr_load_dsp_binary()
452 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_DSP, 0); in pcxhr_load_dsp_binary()
455 err = pcxhr_download_dsp(mgr, dsp); in pcxhr_load_dsp_binary()
459 return pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_load_dsp_binary()
545 static int pcxhr_read_rmh_status(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_read_rmh_status() argument
560 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_read_rmh_status()
565 dev_err(&mgr->pci->dev, in pcxhr_read_rmh_status()
571 data = PCXHR_INPB(mgr, PCXHR_DSP_TXH) << 16; in pcxhr_read_rmh_status()
572 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXM) << 8; in pcxhr_read_rmh_status()
573 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXL); in pcxhr_read_rmh_status()
595 dev_dbg(&mgr->pci->dev, " stat[%d]=%x\n", i, data); in pcxhr_read_rmh_status()
601 dev_dbg(&mgr->pci->dev, "PCXHR : rmh->stat_len=%x too big\n", in pcxhr_read_rmh_status()
608 static int pcxhr_send_msg_nolock(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_send_msg_nolock() argument
617 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_MESSAGE, 1); in pcxhr_send_msg_nolock()
619 dev_err(&mgr->pci->dev, in pcxhr_send_msg_nolock()
624 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_send_msg_nolock()
629 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_CHK, 1); in pcxhr_send_msg_nolock()
633 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, 0, in pcxhr_send_msg_nolock()
646 dev_dbg(&mgr->pci->dev, "MSG cmd[0]=%x (%s)\n", in pcxhr_send_msg_nolock()
650 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_TRDY, in pcxhr_send_msg_nolock()
654 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
655 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
656 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
661 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
667 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
668 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
669 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
676 dev_dbg(&mgr->pci->dev, in pcxhr_send_msg_nolock()
679 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
685 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
686 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
687 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
691 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_send_msg_nolock()
698 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
703 dev_err(&mgr->pci->dev, in pcxhr_send_msg_nolock()
708 data = PCXHR_INPB(mgr, PCXHR_DSP_TXH) << 16; in pcxhr_send_msg_nolock()
709 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXM) << 8; in pcxhr_send_msg_nolock()
710 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXL); in pcxhr_send_msg_nolock()
711 dev_err(&mgr->pci->dev, "ERROR RMH(%d): 0x%x\n", in pcxhr_send_msg_nolock()
716 err = pcxhr_read_rmh_status(mgr, rmh); in pcxhr_send_msg_nolock()
719 if (pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_SEMAPHORE, 1) < 0) in pcxhr_send_msg_nolock()
768 int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_send_msg() argument
772 mutex_lock(&mgr->msg_lock); in pcxhr_send_msg()
773 err = pcxhr_send_msg_nolock(mgr, rmh); in pcxhr_send_msg()
774 mutex_unlock(&mgr->msg_lock); in pcxhr_send_msg()
778 static inline int pcxhr_pipes_running(struct pcxhr_mgr *mgr) in pcxhr_pipes_running() argument
780 int start_mask = PCXHR_INPL(mgr, PCXHR_PLX_MBOX2); in pcxhr_pipes_running()
787 dev_dbg(&mgr->pci->dev, "CMD_PIPE_STATE MBOX2=0x%06x\n", start_mask); in pcxhr_pipes_running()
794 static int pcxhr_prepair_pipe_start(struct pcxhr_mgr *mgr, in pcxhr_prepair_pipe_start() argument
814 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_prepair_pipe_start()
816 dev_err(&mgr->pci->dev, in pcxhr_prepair_pipe_start()
834 static int pcxhr_stop_pipes(struct pcxhr_mgr *mgr, int audio_mask) in pcxhr_stop_pipes() argument
852 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_stop_pipes()
854 dev_err(&mgr->pci->dev, in pcxhr_stop_pipes()
866 static int pcxhr_toggle_pipes(struct pcxhr_mgr *mgr, int audio_mask) in pcxhr_toggle_pipes() argument
881 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_toggle_pipes()
883 dev_err(&mgr->pci->dev, in pcxhr_toggle_pipes()
894 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_toggle_pipes()
896 dev_err(&mgr->pci->dev, in pcxhr_toggle_pipes()
906 int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, in pcxhr_set_pipe_state() argument
920 state = pcxhr_pipes_running(mgr); in pcxhr_set_pipe_state()
921 dev_dbg(&mgr->pci->dev, in pcxhr_set_pipe_state()
929 err = pcxhr_prepair_pipe_start(mgr, state, &state); in pcxhr_set_pipe_state()
942 err = pcxhr_toggle_pipes(mgr, audio_mask); in pcxhr_set_pipe_state()
948 state = pcxhr_pipes_running(mgr); in pcxhr_set_pipe_state()
953 dev_err(&mgr->pci->dev, "error pipe start/stop\n"); in pcxhr_set_pipe_state()
959 err = pcxhr_stop_pipes(mgr, audio_mask); in pcxhr_set_pipe_state()
966 dev_dbg(&mgr->pci->dev, "***SET PIPE STATE*** TIME = %ld (err = %x)\n", in pcxhr_set_pipe_state()
972 int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, in pcxhr_write_io_num_reg_cont() argument
978 mutex_lock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
979 if ((mgr->io_num_reg_cont & mask) == value) { in pcxhr_write_io_num_reg_cont()
980 dev_dbg(&mgr->pci->dev, in pcxhr_write_io_num_reg_cont()
985 mutex_unlock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
993 err = pcxhr_send_msg_nolock(mgr, &rmh); in pcxhr_write_io_num_reg_cont()
995 mgr->io_num_reg_cont &= ~mask; in pcxhr_write_io_num_reg_cont()
996 mgr->io_num_reg_cont |= value; in pcxhr_write_io_num_reg_cont()
1000 mutex_unlock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
1018 static int pcxhr_handle_async_err(struct pcxhr_mgr *mgr, u32 err, in pcxhr_handle_async_err() argument
1034 dev_dbg(&mgr->pci->dev, "CMD_ASYNC : Error %s %s Pipe %d err=%x\n", in pcxhr_handle_async_err()
1038 mgr->async_err_stream_xrun++; in pcxhr_handle_async_err()
1040 mgr->async_err_pipe_xrun++; in pcxhr_handle_async_err()
1042 mgr->async_err_other_last = (int)err; in pcxhr_handle_async_err()
1047 static void pcxhr_msg_thread(struct pcxhr_mgr *mgr) in pcxhr_msg_thread() argument
1049 struct pcxhr_rmh *prmh = mgr->prmh; in pcxhr_msg_thread()
1053 if (mgr->src_it_dsp & PCXHR_IRQ_FREQ_CHANGE) in pcxhr_msg_thread()
1054 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1056 if (mgr->src_it_dsp & PCXHR_IRQ_TIME_CODE) in pcxhr_msg_thread()
1057 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1059 if (mgr->src_it_dsp & PCXHR_IRQ_NOTIFY) in pcxhr_msg_thread()
1060 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1062 if (mgr->src_it_dsp & (PCXHR_IRQ_FREQ_CHANGE | PCXHR_IRQ_TIME_CODE)) { in pcxhr_msg_thread()
1065 err = pcxhr_send_msg(mgr, prmh); in pcxhr_msg_thread()
1066 dev_dbg(&mgr->pci->dev, "CMD_TEST_IT : err=%x, stat=%x\n", in pcxhr_msg_thread()
1069 if (mgr->src_it_dsp & PCXHR_IRQ_ASYNC) { in pcxhr_msg_thread()
1070 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1077 err = pcxhr_send_msg(mgr, prmh); in pcxhr_msg_thread()
1079 dev_err(&mgr->pci->dev, "ERROR pcxhr_msg_thread=%x;\n", in pcxhr_msg_thread()
1092 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1100 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1108 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1118 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1128 static u_int64_t pcxhr_stream_read_position(struct pcxhr_mgr *mgr, in pcxhr_stream_read_position() argument
1143 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_stream_read_position()
1150 dev_dbg(&mgr->pci->dev, in pcxhr_stream_read_position()
1156 mgr->granularity); in pcxhr_stream_read_position()
1160 static void pcxhr_update_timer_pos(struct pcxhr_mgr *mgr, in pcxhr_update_timer_pos() argument
1174 samples_to_add = mgr->granularity; in pcxhr_update_timer_pos()
1182 pcxhr_stream_read_position(mgr, stream); in pcxhr_update_timer_pos()
1184 if (new_sample_count >= mgr->granularity) { in pcxhr_update_timer_pos()
1189 new_sample_count -= mgr->granularity; in pcxhr_update_timer_pos()
1217 dev_err(&mgr->pci->dev, in pcxhr_update_timer_pos()
1223 mutex_unlock(&mgr->lock); in pcxhr_update_timer_pos()
1225 mutex_lock(&mgr->lock); in pcxhr_update_timer_pos()
1232 struct pcxhr_mgr *mgr = dev_id; in pcxhr_interrupt() local
1236 reg = PCXHR_INPL(mgr, PCXHR_PLX_IRQCS); in pcxhr_interrupt()
1243 reg = PCXHR_INPL(mgr, PCXHR_PLX_L2PCIDB); in pcxhr_interrupt()
1244 PCXHR_OUTPL(mgr, PCXHR_PLX_L2PCIDB, reg); in pcxhr_interrupt()
1249 if (timer_toggle == mgr->timer_toggle) { in pcxhr_interrupt()
1250 dev_dbg(&mgr->pci->dev, "ERROR TIMER TOGGLE\n"); in pcxhr_interrupt()
1251 mgr->dsp_time_err++; in pcxhr_interrupt()
1254 mgr->timer_toggle = timer_toggle; in pcxhr_interrupt()
1255 mgr->src_it_dsp = reg; in pcxhr_interrupt()
1266 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; in pcxhr_interrupt()
1268 mgr->src_it_dsp = reg; in pcxhr_interrupt()
1273 dev_dbg(&mgr->pci->dev, "FATAL DSP ERROR : %x\n", reg); in pcxhr_interrupt()
1281 struct pcxhr_mgr *mgr = dev_id; in pcxhr_threaded_irq() local
1285 mutex_lock(&mgr->lock); in pcxhr_threaded_irq()
1286 if (mgr->src_it_dsp & PCXHR_IRQ_TIMER) { in pcxhr_threaded_irq()
1289 PCXHR_INPL(mgr, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; in pcxhr_threaded_irq()
1290 int dsp_time_diff = dsp_time_new - mgr->dsp_time_last; in pcxhr_threaded_irq()
1293 (mgr->dsp_time_last != PCXHR_DSP_TIME_INVALID)) { in pcxhr_threaded_irq()
1296 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1298 mgr->dsp_time_last, dsp_time_new); in pcxhr_threaded_irq()
1299 if (tmp_diff > 0 && tmp_diff <= (2*mgr->granularity)) { in pcxhr_threaded_irq()
1300 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1305 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1307 mgr->dsp_time_err++; in pcxhr_threaded_irq()
1312 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1315 else if (dsp_time_diff >= (2*mgr->granularity)) in pcxhr_threaded_irq()
1316 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1318 mgr->dsp_time_last, in pcxhr_threaded_irq()
1319 dsp_time_new - mgr->dsp_time_last); in pcxhr_threaded_irq()
1320 else if (dsp_time_diff % mgr->granularity) in pcxhr_threaded_irq()
1321 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1325 mgr->dsp_time_last = dsp_time_new; in pcxhr_threaded_irq()
1327 for (i = 0; i < mgr->num_cards; i++) { in pcxhr_threaded_irq()
1328 chip = mgr->chip[i]; in pcxhr_threaded_irq()
1330 pcxhr_update_timer_pos(mgr, in pcxhr_threaded_irq()
1334 for (i = 0; i < mgr->num_cards; i++) { in pcxhr_threaded_irq()
1335 chip = mgr->chip[i]; in pcxhr_threaded_irq()
1337 pcxhr_update_timer_pos(mgr, in pcxhr_threaded_irq()
1343 pcxhr_msg_thread(mgr); in pcxhr_threaded_irq()
1344 mutex_unlock(&mgr->lock); in pcxhr_threaded_irq()