Lines Matching refs:vx_inl
148 #undef vx_inl
149 #define vx_inl(chip,reg) vx2_inl((struct vx_core*)(chip), VX_##reg) macro
187 vx_inl(chip, ISR); in vx2_test_xilinx()
188 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
196 vx_inl(chip, ISR); in vx2_test_xilinx()
197 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
207 vx_inl(chip, ISR); in vx2_test_xilinx()
208 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
216 vx_inl(chip, ISR); in vx2_test_xilinx()
217 data = vx_inl(chip, STATUS); in vx2_test_xilinx()
377 vx_inl(chip, CNTRL); in vx2_load_xilinx_binary()
380 vx_inl(chip, CNTRL); in vx2_load_xilinx_binary()
402 i = vx_inl(chip, GPIOC); in vx2_load_xilinx_binary()
455 if (! (vx_inl(chip, STATUS) & VX_STATUS_MEMIRQ_MASK)) in vx2_test_and_ack()
464 vx_inl(chip, STATUS); in vx2_test_and_ack()
469 vx_inl(chip, STATUS); in vx2_test_and_ack()
505 vx_inl(chip, HIFREQ); in vx2_write_codec_reg()
511 vx_inl(chip, RUER); in vx2_write_codec_reg()
718 vx_inl(chip, HIFREQ); in vx2_old_write_codec_bit()
724 vx_inl(chip, RUER); in vx2_old_write_codec_bit()
737 vx_inl(chip, CDSP); in vx2_reset_codec()
742 vx_inl(chip, CDSP); in vx2_reset_codec()
850 vx_inl(chip, DATA); /* Activate input level programming */ in vx2_set_input_level()
856 vx_inl(chip, RUER); /* Terminate input level programming */ in vx2_set_input_level()