256 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
258 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
268 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
270 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
283 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
285 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
312 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
314 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
356 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
358 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
363 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
365 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
550 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
552 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
562 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
564 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
586 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
588 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
601 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
603 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()