Lines Matching refs:i2s
79 unsigned (*tx_fn)(struct xtfpga_i2s *i2s,
134 struct xtfpga_i2s *i2s, struct snd_pcm_runtime *runtime, \
140 for (; i2s->tx_fifo_level < i2s->tx_fifo_high; \
141 i2s->tx_fifo_level += 2) { \
143 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
145 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
159 static bool xtfpga_pcm_push_tx(struct xtfpga_i2s *i2s) in xtfpga_pcm_push_tx() argument
165 tx_substream = rcu_dereference(i2s->tx_substream); in xtfpga_pcm_push_tx()
168 unsigned tx_ptr = ACCESS_ONCE(i2s->tx_ptr); in xtfpga_pcm_push_tx()
169 unsigned new_tx_ptr = i2s->tx_fn(i2s, tx_substream->runtime, in xtfpga_pcm_push_tx()
172 cmpxchg(&i2s->tx_ptr, tx_ptr, new_tx_ptr); in xtfpga_pcm_push_tx()
179 static void xtfpga_pcm_refill_fifo(struct xtfpga_i2s *i2s) in xtfpga_pcm_refill_fifo() argument
184 regmap_read(i2s->regmap, XTFPGA_I2S_INT_STATUS, in xtfpga_pcm_refill_fifo()
188 bool tx_active = xtfpga_pcm_push_tx(i2s); in xtfpga_pcm_refill_fifo()
190 regmap_write(i2s->regmap, XTFPGA_I2S_INT_STATUS, in xtfpga_pcm_refill_fifo()
193 regmap_read(i2s->regmap, XTFPGA_I2S_INT_STATUS, in xtfpga_pcm_refill_fifo()
204 i2s->tx_fifo_level = i2s->tx_fifo_low; in xtfpga_pcm_refill_fifo()
208 regmap_write(i2s->regmap, XTFPGA_I2S_INT_MASK, in xtfpga_pcm_refill_fifo()
211 regmap_write(i2s->regmap, XTFPGA_I2S_INT_MASK, in xtfpga_pcm_refill_fifo()
215 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_pcm_refill_fifo()
221 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_pcm_refill_fifo()
228 struct xtfpga_i2s *i2s = dev_id; in xtfpga_i2s_threaded_irq_handler() local
232 regmap_read(i2s->regmap, XTFPGA_I2S_CONFIG, &config); in xtfpga_i2s_threaded_irq_handler()
233 regmap_read(i2s->regmap, XTFPGA_I2S_INT_MASK, &int_mask); in xtfpga_i2s_threaded_irq_handler()
234 regmap_read(i2s->regmap, XTFPGA_I2S_INT_STATUS, &int_status); in xtfpga_i2s_threaded_irq_handler()
244 i2s->tx_fifo_level = 0; in xtfpga_i2s_threaded_irq_handler()
245 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_i2s_threaded_irq_handler()
251 i2s->tx_fifo_level = i2s->tx_fifo_low; in xtfpga_i2s_threaded_irq_handler()
255 tx_substream = rcu_dereference(i2s->tx_substream); in xtfpga_i2s_threaded_irq_handler()
260 dev_dbg_ratelimited(i2s->dev, "%s: underrun\n", in xtfpga_i2s_threaded_irq_handler()
268 xtfpga_pcm_refill_fifo(i2s); in xtfpga_i2s_threaded_irq_handler()
276 struct xtfpga_i2s *i2s = snd_soc_dai_get_drvdata(dai); in xtfpga_i2s_startup() local
278 snd_soc_dai_set_dma_data(dai, substream, i2s); in xtfpga_i2s_startup()
286 struct xtfpga_i2s *i2s = snd_soc_dai_get_drvdata(dai); in xtfpga_i2s_hw_params() local
294 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_i2s_hw_params()
299 err = clk_set_rate(i2s->clk, freq); in xtfpga_i2s_hw_params()
312 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_i2s_hw_params()
316 i2s->tx_fifo_low = XTFPGA_I2S_FIFO_SIZE / 2; in xtfpga_i2s_hw_params()
320 i2s->tx_fifo_low / 2 >= period_size * 2 && in xtfpga_i2s_hw_params()
323 i2s->tx_fifo_low /= 2; in xtfpga_i2s_hw_params()
325 i2s->tx_fifo_high = 2 * i2s->tx_fifo_low; in xtfpga_i2s_hw_params()
327 regmap_update_bits(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_i2s_hw_params()
331 dev_dbg(i2s->dev, in xtfpga_i2s_hw_params()
334 dev_dbg(i2s->dev, "%s freq: %u, ratio: %u, level: %u\n", in xtfpga_i2s_hw_params()
395 struct xtfpga_i2s *i2s = runtime->private_data; in xtfpga_pcm_hw_params() local
410 i2s->tx_fn = (channels == 1) ? in xtfpga_pcm_hw_params()
416 i2s->tx_fn = (channels == 1) ? in xtfpga_pcm_hw_params()
434 struct xtfpga_i2s *i2s = runtime->private_data; in xtfpga_pcm_trigger() local
440 ACCESS_ONCE(i2s->tx_ptr) = 0; in xtfpga_pcm_trigger()
441 rcu_assign_pointer(i2s->tx_substream, substream); in xtfpga_pcm_trigger()
442 xtfpga_pcm_refill_fifo(i2s); in xtfpga_pcm_trigger()
448 rcu_assign_pointer(i2s->tx_substream, NULL); in xtfpga_pcm_trigger()
461 struct xtfpga_i2s *i2s = runtime->private_data; in xtfpga_pcm_pointer() local
462 snd_pcm_uframes_t pos = ACCESS_ONCE(i2s->tx_ptr); in xtfpga_pcm_pointer()
518 struct xtfpga_i2s *i2s = dev_get_drvdata(dev); in xtfpga_i2s_runtime_suspend() local
520 clk_disable_unprepare(i2s->clk); in xtfpga_i2s_runtime_suspend()
526 struct xtfpga_i2s *i2s = dev_get_drvdata(dev); in xtfpga_i2s_runtime_resume() local
529 ret = clk_prepare_enable(i2s->clk); in xtfpga_i2s_runtime_resume()
539 struct xtfpga_i2s *i2s; in xtfpga_i2s_probe() local
543 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in xtfpga_i2s_probe()
544 if (!i2s) { in xtfpga_i2s_probe()
548 platform_set_drvdata(pdev, i2s); in xtfpga_i2s_probe()
549 i2s->dev = &pdev->dev; in xtfpga_i2s_probe()
550 dev_dbg(&pdev->dev, "dev: %p, i2s: %p\n", &pdev->dev, i2s); in xtfpga_i2s_probe()
553 i2s->regs = devm_ioremap_resource(&pdev->dev, mem); in xtfpga_i2s_probe()
554 if (IS_ERR(i2s->regs)) { in xtfpga_i2s_probe()
555 err = PTR_ERR(i2s->regs); in xtfpga_i2s_probe()
559 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->regs, in xtfpga_i2s_probe()
561 if (IS_ERR(i2s->regmap)) { in xtfpga_i2s_probe()
563 err = PTR_ERR(i2s->regmap); in xtfpga_i2s_probe()
567 i2s->clk = devm_clk_get(&pdev->dev, NULL); in xtfpga_i2s_probe()
568 if (IS_ERR(i2s->clk)) { in xtfpga_i2s_probe()
570 err = PTR_ERR(i2s->clk); in xtfpga_i2s_probe()
574 regmap_write(i2s->regmap, XTFPGA_I2S_CONFIG, in xtfpga_i2s_probe()
576 regmap_write(i2s->regmap, XTFPGA_I2S_INT_STATUS, XTFPGA_I2S_INT_VALID); in xtfpga_i2s_probe()
577 regmap_write(i2s->regmap, XTFPGA_I2S_INT_MASK, XTFPGA_I2S_INT_UNDERRUN); in xtfpga_i2s_probe()
588 pdev->name, i2s); in xtfpga_i2s_probe()
627 struct xtfpga_i2s *i2s = dev_get_drvdata(&pdev->dev); in xtfpga_i2s_remove() local
630 if (i2s->regmap && !IS_ERR(i2s->regmap)) { in xtfpga_i2s_remove()
631 regmap_write(i2s->regmap, XTFPGA_I2S_CONFIG, 0); in xtfpga_i2s_remove()
632 regmap_write(i2s->regmap, XTFPGA_I2S_INT_MASK, 0); in xtfpga_i2s_remove()
633 regmap_write(i2s->regmap, XTFPGA_I2S_INT_STATUS, in xtfpga_i2s_remove()