1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
25 #include <linux/time.h>
26
27 #include "common.h"
28 #include "debug.h"
29 #include "mci.h"
30 #include "dfs.h"
31
32 struct ath_node;
33 struct ath_vif;
34
35 extern struct ieee80211_ops ath9k_ops;
36 extern int ath9k_modparam_nohwcrypt;
37 extern int ath9k_led_blink;
38 extern bool is_ath9k_unloaded;
39 extern int ath9k_use_chanctx;
40
41 /*************************/
42 /* Descriptor Management */
43 /*************************/
44
45 #define ATH_TXSTATUS_RING_SIZE 512
46
47 /* Macro to expand scalars to 64-bit objects */
48 #define ito64(x) (sizeof(x) == 1) ? \
49 (((unsigned long long int)(x)) & (0xff)) : \
50 (sizeof(x) == 2) ? \
51 (((unsigned long long int)(x)) & 0xffff) : \
52 ((sizeof(x) == 4) ? \
53 (((unsigned long long int)(x)) & 0xffffffff) : \
54 (unsigned long long int)(x))
55
56 #define ATH_TXBUF_RESET(_bf) do { \
57 (_bf)->bf_lastbf = NULL; \
58 (_bf)->bf_next = NULL; \
59 memset(&((_bf)->bf_state), 0, \
60 sizeof(struct ath_buf_state)); \
61 } while (0)
62
63 #define DS2PHYS(_dd, _ds) \
64 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
65 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
66 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
67
68 struct ath_descdma {
69 void *dd_desc;
70 dma_addr_t dd_desc_paddr;
71 u32 dd_desc_len;
72 };
73
74 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
75 struct list_head *head, const char *name,
76 int nbuf, int ndesc, bool is_tx);
77
78 /***********/
79 /* RX / TX */
80 /***********/
81
82 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
83
84 /* increment with wrap-around */
85 #define INCR(_l, _sz) do { \
86 (_l)++; \
87 (_l) &= ((_sz) - 1); \
88 } while (0)
89
90 #define ATH_RXBUF 512
91 #define ATH_TXBUF 512
92 #define ATH_TXBUF_RESERVE 5
93 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
94 #define ATH_TXMAXTRY 13
95 #define ATH_MAX_SW_RETRIES 30
96
97 #define TID_TO_WME_AC(_tid) \
98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
101 IEEE80211_AC_VO)
102
103 #define ATH_AGGR_DELIM_SZ 4
104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
105 /* number of delimiters for encryption padding */
106 #define ATH_AGGR_ENCRYPTDELIM 10
107 /* minimum h/w qdepth to be sustained to maximize aggregation */
108 #define ATH_AGGR_MIN_QDEPTH 2
109 /* minimum h/w qdepth for non-aggregated traffic */
110 #define ATH_NON_AGGR_MIN_QDEPTH 8
111 #define ATH_TX_COMPLETE_POLL_INT 1000
112 #define ATH_TXFIFO_DEPTH 8
113 #define ATH_TX_ERROR 0x01
114
115 /* Stop tx traffic 1ms before the GO goes away */
116 #define ATH_P2P_PS_STOP_TIME 1000
117
118 #define IEEE80211_SEQ_SEQ_SHIFT 4
119 #define IEEE80211_SEQ_MAX 4096
120 #define IEEE80211_WEP_IVLEN 3
121 #define IEEE80211_WEP_KIDLEN 1
122 #define IEEE80211_WEP_CRCLEN 4
123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
124 (IEEE80211_WEP_IVLEN + \
125 IEEE80211_WEP_KIDLEN + \
126 IEEE80211_WEP_CRCLEN))
127
128 /* return whether a bit at index _n in bitmap _bm is set
129 * _sz is the size of the bitmap */
130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
132
133 /* return block-ack bitmap index given sequence and starting sequence */
134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
135
136 /* return the seqno for _start + _offset */
137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
138
139 /* returns delimiter padding required given the packet length */
140 #define ATH_AGGR_GET_NDELIM(_len) \
141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
143
144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
146
147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
148
149 #define IS_HT_RATE(rate) (rate & 0x80)
150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
152
153 enum {
154 WLAN_RC_PHY_OFDM,
155 WLAN_RC_PHY_CCK,
156 };
157
158 struct ath_txq {
159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
160 u32 axq_qnum; /* ath9k hardware queue number */
161 void *axq_link;
162 struct list_head axq_q;
163 spinlock_t axq_lock;
164 u32 axq_depth;
165 u32 axq_ampdu_depth;
166 bool stopped;
167 bool axq_tx_inprogress;
168 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
169 u8 txq_headidx;
170 u8 txq_tailidx;
171 int pending_frames;
172 struct sk_buff_head complete_q;
173 };
174
175 struct ath_frame_info {
176 struct ath_buf *bf;
177 u16 framelen;
178 s8 txq;
179 u8 keyix;
180 u8 rtscts_rate;
181 u8 retries : 6;
182 u8 dyn_smps : 1;
183 u8 baw_tracked : 1;
184 u8 tx_power;
185 enum ath9k_key_type keytype:2;
186 };
187
188 struct ath_rxbuf {
189 struct list_head list;
190 struct sk_buff *bf_mpdu;
191 void *bf_desc;
192 dma_addr_t bf_daddr;
193 dma_addr_t bf_buf_addr;
194 };
195
196 /**
197 * enum buffer_type - Buffer type flags
198 *
199 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
200 * @BUF_AGGR: Indicates whether the buffer can be aggregated
201 * (used in aggregation scheduling)
202 */
203 enum buffer_type {
204 BUF_AMPDU = BIT(0),
205 BUF_AGGR = BIT(1),
206 };
207
208 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
209 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
210
211 struct ath_buf_state {
212 u8 bf_type;
213 u8 bfs_paprd;
214 u8 ndelim;
215 bool stale;
216 u16 seqno;
217 unsigned long bfs_paprd_timestamp;
218 };
219
220 struct ath_buf {
221 struct list_head list;
222 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
223 an aggregate) */
224 struct ath_buf *bf_next; /* next subframe in the aggregate */
225 struct sk_buff *bf_mpdu; /* enclosing frame structure */
226 void *bf_desc; /* virtual addr of desc */
227 dma_addr_t bf_daddr; /* physical addr of desc */
228 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
229 struct ieee80211_tx_rate rates[4];
230 struct ath_buf_state bf_state;
231 };
232
233 struct ath_atx_tid {
234 struct list_head list;
235 struct sk_buff_head buf_q;
236 struct sk_buff_head retry_q;
237 struct ath_node *an;
238 struct ath_txq *txq;
239 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
240 u16 seq_start;
241 u16 seq_next;
242 u16 baw_size;
243 u8 tidno;
244 int baw_head; /* first un-acked tx buffer */
245 int baw_tail; /* next unused tx buffer slot */
246
247 s8 bar_index;
248 bool active;
249 bool clear_ps_filter;
250 };
251
252 struct ath_node {
253 struct ath_softc *sc;
254 struct ieee80211_sta *sta; /* station struct we're part of */
255 struct ieee80211_vif *vif; /* interface with which we're associated */
256 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
257
258 u16 maxampdu;
259 u8 mpdudensity;
260 s8 ps_key;
261
262 bool sleeping;
263 bool no_ps_filter;
264
265 #ifdef CONFIG_ATH9K_STATION_STATISTICS
266 struct ath_rx_rate_stats rx_rate_stats;
267 #endif
268 u8 key_idx[4];
269
270 u32 ackto;
271 struct list_head list;
272 };
273
274 struct ath_tx_control {
275 struct ath_txq *txq;
276 struct ath_node *an;
277 struct ieee80211_sta *sta;
278 u8 paprd;
279 bool force_channel;
280 };
281
282
283 /**
284 * @txq_map: Index is mac80211 queue number. This is
285 * not necessarily the same as the hardware queue number
286 * (axq_qnum).
287 */
288 struct ath_tx {
289 u32 txqsetup;
290 spinlock_t txbuflock;
291 struct list_head txbuf;
292 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
293 struct ath_descdma txdma;
294 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
295 struct ath_txq *uapsdq;
296 u32 txq_max_pending[IEEE80211_NUM_ACS];
297 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
298 };
299
300 struct ath_rx_edma {
301 struct sk_buff_head rx_fifo;
302 u32 rx_fifo_hwsize;
303 };
304
305 struct ath_rx {
306 u8 defant;
307 u8 rxotherant;
308 bool discard_next;
309 u32 *rxlink;
310 u32 num_pkts;
311 struct list_head rxbuf;
312 struct ath_descdma rxdma;
313 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
314
315 struct ath_rxbuf *buf_hold;
316 struct sk_buff *frag;
317
318 u32 ampdu_ref;
319 };
320
321 /*******************/
322 /* Channel Context */
323 /*******************/
324
325 struct ath_chanctx {
326 struct cfg80211_chan_def chandef;
327 struct list_head vifs;
328 struct list_head acq[IEEE80211_NUM_ACS];
329 int hw_queue_base;
330
331 /* do not dereference, use for comparison only */
332 struct ieee80211_vif *primary_sta;
333
334 struct ath_beacon_config beacon;
335 struct ath9k_hw_cal_data caldata;
336 struct timespec tsf_ts;
337 u64 tsf_val;
338 u32 last_beacon;
339
340 int flush_timeout;
341 u16 txpower;
342 u16 cur_txpower;
343 bool offchannel;
344 bool stopped;
345 bool active;
346 bool assigned;
347 bool switch_after_beacon;
348
349 short nvifs;
350 short nvifs_assigned;
351 unsigned int rxfilter;
352 };
353
354 enum ath_chanctx_event {
355 ATH_CHANCTX_EVENT_BEACON_PREPARE,
356 ATH_CHANCTX_EVENT_BEACON_SENT,
357 ATH_CHANCTX_EVENT_TSF_TIMER,
358 ATH_CHANCTX_EVENT_BEACON_RECEIVED,
359 ATH_CHANCTX_EVENT_AUTHORIZED,
360 ATH_CHANCTX_EVENT_SWITCH,
361 ATH_CHANCTX_EVENT_ASSIGN,
362 ATH_CHANCTX_EVENT_UNASSIGN,
363 ATH_CHANCTX_EVENT_CHANGE,
364 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
365 };
366
367 enum ath_chanctx_state {
368 ATH_CHANCTX_STATE_IDLE,
369 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
370 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
371 ATH_CHANCTX_STATE_SWITCH,
372 ATH_CHANCTX_STATE_FORCE_ACTIVE,
373 };
374
375 struct ath_chanctx_sched {
376 bool beacon_pending;
377 bool beacon_adjust;
378 bool offchannel_pending;
379 bool wait_switch;
380 bool force_noa_update;
381 bool extend_absence;
382 bool mgd_prepare_tx;
383 enum ath_chanctx_state state;
384 u8 beacon_miss;
385
386 u32 next_tbtt;
387 u32 switch_start_time;
388 unsigned int offchannel_duration;
389 unsigned int channel_switch_time;
390
391 /* backup, in case the hardware timer fails */
392 struct timer_list timer;
393 };
394
395 enum ath_offchannel_state {
396 ATH_OFFCHANNEL_IDLE,
397 ATH_OFFCHANNEL_PROBE_SEND,
398 ATH_OFFCHANNEL_PROBE_WAIT,
399 ATH_OFFCHANNEL_SUSPEND,
400 ATH_OFFCHANNEL_ROC_START,
401 ATH_OFFCHANNEL_ROC_WAIT,
402 ATH_OFFCHANNEL_ROC_DONE,
403 };
404
405 enum ath_roc_complete_reason {
406 ATH_ROC_COMPLETE_EXPIRE,
407 ATH_ROC_COMPLETE_ABORT,
408 ATH_ROC_COMPLETE_CANCEL,
409 };
410
411 struct ath_offchannel {
412 struct ath_chanctx chan;
413 struct timer_list timer;
414 struct cfg80211_scan_request *scan_req;
415 struct ieee80211_vif *scan_vif;
416 int scan_idx;
417 enum ath_offchannel_state state;
418 struct ieee80211_channel *roc_chan;
419 struct ieee80211_vif *roc_vif;
420 int roc_duration;
421 int duration;
422 };
423
424 #define case_rtn_string(val) case val: return #val
425
426 #define ath_for_each_chanctx(_sc, _ctx) \
427 for (ctx = &sc->chanctx[0]; \
428 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \
429 ctx++)
430
431 void ath_chanctx_init(struct ath_softc *sc);
432 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
433 struct cfg80211_chan_def *chandef);
434
435 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
436
437 static inline struct ath_chanctx *
ath_chanctx_get(struct ieee80211_chanctx_conf * ctx)438 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
439 {
440 struct ath_chanctx **ptr = (void *) ctx->drv_priv;
441 return *ptr;
442 }
443
444 bool ath9k_is_chanctx_enabled(void);
445 void ath9k_fill_chanctx_ops(void);
446 void ath9k_init_channel_context(struct ath_softc *sc);
447 void ath9k_offchannel_init(struct ath_softc *sc);
448 void ath9k_deinit_channel_context(struct ath_softc *sc);
449 int ath9k_init_p2p(struct ath_softc *sc);
450 void ath9k_deinit_p2p(struct ath_softc *sc);
451 void ath9k_p2p_remove_vif(struct ath_softc *sc,
452 struct ieee80211_vif *vif);
453 void ath9k_p2p_beacon_sync(struct ath_softc *sc);
454 void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
455 struct ieee80211_vif *vif);
456 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
457 struct sk_buff *skb);
458 void ath9k_p2p_ps_timer(void *priv);
459 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
460 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
461 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
462
463 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
464 enum ath_chanctx_event ev);
465 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
466 enum ath_chanctx_event ev);
467 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
468 enum ath_chanctx_event ev);
469 void ath_chanctx_set_next(struct ath_softc *sc, bool force);
470 void ath_offchannel_next(struct ath_softc *sc);
471 void ath_scan_complete(struct ath_softc *sc, bool abort);
472 void ath_roc_complete(struct ath_softc *sc,
473 enum ath_roc_complete_reason reason);
474 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
475
476 #else
477
ath9k_is_chanctx_enabled(void)478 static inline bool ath9k_is_chanctx_enabled(void)
479 {
480 return false;
481 }
ath9k_fill_chanctx_ops(void)482 static inline void ath9k_fill_chanctx_ops(void)
483 {
484 }
ath9k_init_channel_context(struct ath_softc * sc)485 static inline void ath9k_init_channel_context(struct ath_softc *sc)
486 {
487 }
ath9k_offchannel_init(struct ath_softc * sc)488 static inline void ath9k_offchannel_init(struct ath_softc *sc)
489 {
490 }
ath9k_deinit_channel_context(struct ath_softc * sc)491 static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
492 {
493 }
ath_chanctx_beacon_recv_ev(struct ath_softc * sc,enum ath_chanctx_event ev)494 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
495 enum ath_chanctx_event ev)
496 {
497 }
ath_chanctx_beacon_sent_ev(struct ath_softc * sc,enum ath_chanctx_event ev)498 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
499 enum ath_chanctx_event ev)
500 {
501 }
ath_chanctx_event(struct ath_softc * sc,struct ieee80211_vif * vif,enum ath_chanctx_event ev)502 static inline void ath_chanctx_event(struct ath_softc *sc,
503 struct ieee80211_vif *vif,
504 enum ath_chanctx_event ev)
505 {
506 }
ath9k_init_p2p(struct ath_softc * sc)507 static inline int ath9k_init_p2p(struct ath_softc *sc)
508 {
509 return 0;
510 }
ath9k_deinit_p2p(struct ath_softc * sc)511 static inline void ath9k_deinit_p2p(struct ath_softc *sc)
512 {
513 }
ath9k_p2p_remove_vif(struct ath_softc * sc,struct ieee80211_vif * vif)514 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
515 struct ieee80211_vif *vif)
516 {
517 }
ath9k_p2p_beacon_sync(struct ath_softc * sc)518 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
519 {
520 }
ath9k_p2p_bss_info_changed(struct ath_softc * sc,struct ieee80211_vif * vif)521 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
522 struct ieee80211_vif *vif)
523 {
524 }
ath9k_beacon_add_noa(struct ath_softc * sc,struct ath_vif * avp,struct sk_buff * skb)525 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
526 struct sk_buff *skb)
527 {
528 }
ath9k_p2p_ps_timer(struct ath_softc * sc)529 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
530 {
531 }
ath9k_chanctx_wake_queues(struct ath_softc * sc,struct ath_chanctx * ctx)532 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
533 struct ath_chanctx *ctx)
534 {
535 }
ath9k_chanctx_stop_queues(struct ath_softc * sc,struct ath_chanctx * ctx)536 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
537 struct ath_chanctx *ctx)
538 {
539 }
ath_chanctx_check_active(struct ath_softc * sc,struct ath_chanctx * ctx)540 static inline void ath_chanctx_check_active(struct ath_softc *sc,
541 struct ath_chanctx *ctx)
542 {
543 }
544
545 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
546
547 void ath_startrecv(struct ath_softc *sc);
548 bool ath_stoprecv(struct ath_softc *sc);
549 u32 ath_calcrxfilter(struct ath_softc *sc);
550 int ath_rx_init(struct ath_softc *sc, int nbufs);
551 void ath_rx_cleanup(struct ath_softc *sc);
552 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
553 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
554 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
555 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
556 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
557 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
558 bool ath_drain_all_txq(struct ath_softc *sc);
559 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
560 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
561 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
562 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
563 void ath_txq_schedule_all(struct ath_softc *sc);
564 int ath_tx_init(struct ath_softc *sc, int nbufs);
565 int ath_txq_update(struct ath_softc *sc, int qnum,
566 struct ath9k_tx_queue_info *q);
567 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
568 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
569 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
570 struct ath_tx_control *txctl);
571 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
572 struct sk_buff *skb);
573 void ath_tx_tasklet(struct ath_softc *sc);
574 void ath_tx_edma_tasklet(struct ath_softc *sc);
575 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
576 u16 tid, u16 *ssn);
577 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
578 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
579
580 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
581 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
582 struct ath_node *an);
583 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
584 struct ieee80211_sta *sta,
585 u16 tids, int nframes,
586 enum ieee80211_frame_release_type reason,
587 bool more_data);
588
589 /********/
590 /* VIFs */
591 /********/
592
593 #define P2P_DEFAULT_CTWIN 10
594
595 struct ath_vif {
596 struct list_head list;
597
598 u16 seq_no;
599
600 /* BSS info */
601 u8 bssid[ETH_ALEN] __aligned(2);
602 u16 aid;
603 bool assoc;
604
605 struct ieee80211_vif *vif;
606 struct ath_node mcast_node;
607 int av_bslot;
608 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
609 struct ath_buf *av_bcbuf;
610 struct ath_chanctx *chanctx;
611
612 /* P2P Client */
613 struct ieee80211_noa_data noa;
614
615 /* P2P GO */
616 u8 noa_index;
617 u32 offchannel_start;
618 u32 offchannel_duration;
619
620 /* These are used for both periodic and one-shot */
621 u32 noa_start;
622 u32 noa_duration;
623 bool periodic_noa;
624 bool oneshot_noa;
625 };
626
627 struct ath9k_vif_iter_data {
628 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
629 u8 mask[ETH_ALEN]; /* bssid mask */
630 bool has_hw_macaddr;
631 u8 slottime;
632 bool beacons;
633
634 int naps; /* number of AP vifs */
635 int nmeshes; /* number of mesh vifs */
636 int nstations; /* number of station vifs */
637 int nwds; /* number of WDS vifs */
638 int nadhocs; /* number of adhoc vifs */
639 int nocbs; /* number of OCB vifs */
640 struct ieee80211_vif *primary_sta;
641 };
642
643 void ath9k_calculate_iter_data(struct ath_softc *sc,
644 struct ath_chanctx *ctx,
645 struct ath9k_vif_iter_data *iter_data);
646 void ath9k_calculate_summary_state(struct ath_softc *sc,
647 struct ath_chanctx *ctx);
648 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);
649
650 /*******************/
651 /* Beacon Handling */
652 /*******************/
653
654 /*
655 * Regardless of the number of beacons we stagger, (i.e. regardless of the
656 * number of BSSIDs) if a given beacon does not go out even after waiting this
657 * number of beacon intervals, the game's up.
658 */
659 #define BSTUCK_THRESH 9
660 #define ATH_BCBUF 8
661 #define ATH_DEFAULT_BINTVAL 100 /* TU */
662 #define ATH_DEFAULT_BMISS_LIMIT 10
663
664 #define TSF_TO_TU(_h,_l) \
665 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
666
667 struct ath_beacon {
668 enum {
669 OK, /* no change needed */
670 UPDATE, /* update pending */
671 COMMIT /* beacon sent, commit change */
672 } updateslot; /* slot time update fsm */
673
674 u32 beaconq;
675 u32 bmisscnt;
676 struct ieee80211_vif *bslot[ATH_BCBUF];
677 int slottime;
678 int slotupdate;
679 struct ath_descdma bdma;
680 struct ath_txq *cabq;
681 struct list_head bbuf;
682
683 bool tx_processed;
684 bool tx_last;
685 };
686
687 void ath9k_beacon_tasklet(unsigned long data);
688 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
689 u32 changed);
690 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
691 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
692 void ath9k_set_beacon(struct ath_softc *sc);
693 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
694 void ath9k_csa_update(struct ath_softc *sc);
695
696 /*******************/
697 /* Link Monitoring */
698 /*******************/
699
700 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
701 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
702 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
703 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
704 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
705 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
706 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
707 #define ATH_ANI_MAX_SKIP_COUNT 10
708 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
709 #define ATH_PLL_WORK_INTERVAL 100
710
711 void ath_tx_complete_poll_work(struct work_struct *work);
712 void ath_reset_work(struct work_struct *work);
713 bool ath_hw_check(struct ath_softc *sc);
714 void ath_hw_pll_work(struct work_struct *work);
715 void ath_paprd_calibrate(struct work_struct *work);
716 void ath_ani_calibrate(unsigned long data);
717 void ath_start_ani(struct ath_softc *sc);
718 void ath_stop_ani(struct ath_softc *sc);
719 void ath_check_ani(struct ath_softc *sc);
720 int ath_update_survey_stats(struct ath_softc *sc);
721 void ath_update_survey_nf(struct ath_softc *sc, int channel);
722 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
723 void ath_ps_full_sleep(unsigned long data);
724 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
725 bool sw_pending, bool timeout_override);
726
727 /**********/
728 /* BTCOEX */
729 /**********/
730
731 #define ATH_DUMP_BTCOEX(_s, _val) \
732 do { \
733 len += scnprintf(buf + len, size - len, \
734 "%20s : %10d\n", _s, (_val)); \
735 } while (0)
736
737 enum bt_op_flags {
738 BT_OP_PRIORITY_DETECTED,
739 BT_OP_SCAN,
740 };
741
742 struct ath_btcoex {
743 spinlock_t btcoex_lock;
744 struct timer_list period_timer; /* Timer for BT period */
745 struct timer_list no_stomp_timer;
746 u32 bt_priority_cnt;
747 unsigned long bt_priority_time;
748 unsigned long op_flags;
749 int bt_stomp_type; /* Types of BT stomping */
750 u32 btcoex_no_stomp; /* in msec */
751 u32 btcoex_period; /* in msec */
752 u32 btscan_no_stomp; /* in msec */
753 u32 duty_cycle;
754 u32 bt_wait_time;
755 int rssi_count;
756 struct ath_mci_profile mci;
757 u8 stomp_audio;
758 };
759
760 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
761 int ath9k_init_btcoex(struct ath_softc *sc);
762 void ath9k_deinit_btcoex(struct ath_softc *sc);
763 void ath9k_start_btcoex(struct ath_softc *sc);
764 void ath9k_stop_btcoex(struct ath_softc *sc);
765 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
766 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
767 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
768 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
769 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
770 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
771 #else
ath9k_init_btcoex(struct ath_softc * sc)772 static inline int ath9k_init_btcoex(struct ath_softc *sc)
773 {
774 return 0;
775 }
ath9k_deinit_btcoex(struct ath_softc * sc)776 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
777 {
778 }
ath9k_start_btcoex(struct ath_softc * sc)779 static inline void ath9k_start_btcoex(struct ath_softc *sc)
780 {
781 }
ath9k_stop_btcoex(struct ath_softc * sc)782 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
783 {
784 }
ath9k_btcoex_handle_interrupt(struct ath_softc * sc,u32 status)785 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
786 u32 status)
787 {
788 }
ath9k_btcoex_aggr_limit(struct ath_softc * sc,u32 max_4ms_framelen)789 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
790 u32 max_4ms_framelen)
791 {
792 return 0;
793 }
ath9k_btcoex_stop_gen_timer(struct ath_softc * sc)794 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
795 {
796 }
ath9k_dump_btcoex(struct ath_softc * sc,u8 * buf,u32 size)797 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
798 {
799 return 0;
800 }
801 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
802
803 /********************/
804 /* LED Control */
805 /********************/
806
807 #define ATH_LED_PIN_DEF 1
808 #define ATH_LED_PIN_9287 8
809 #define ATH_LED_PIN_9300 10
810 #define ATH_LED_PIN_9485 6
811 #define ATH_LED_PIN_9462 4
812
813 #ifdef CONFIG_MAC80211_LEDS
814 void ath_init_leds(struct ath_softc *sc);
815 void ath_deinit_leds(struct ath_softc *sc);
816 void ath_fill_led_pin(struct ath_softc *sc);
817 #else
ath_init_leds(struct ath_softc * sc)818 static inline void ath_init_leds(struct ath_softc *sc)
819 {
820 }
821
ath_deinit_leds(struct ath_softc * sc)822 static inline void ath_deinit_leds(struct ath_softc *sc)
823 {
824 }
ath_fill_led_pin(struct ath_softc * sc)825 static inline void ath_fill_led_pin(struct ath_softc *sc)
826 {
827 }
828 #endif
829
830 /************************/
831 /* Wake on Wireless LAN */
832 /************************/
833
834 #ifdef CONFIG_ATH9K_WOW
835 void ath9k_init_wow(struct ieee80211_hw *hw);
836 void ath9k_deinit_wow(struct ieee80211_hw *hw);
837 int ath9k_suspend(struct ieee80211_hw *hw,
838 struct cfg80211_wowlan *wowlan);
839 int ath9k_resume(struct ieee80211_hw *hw);
840 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
841 #else
ath9k_init_wow(struct ieee80211_hw * hw)842 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
843 {
844 }
ath9k_deinit_wow(struct ieee80211_hw * hw)845 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)
846 {
847 }
ath9k_suspend(struct ieee80211_hw * hw,struct cfg80211_wowlan * wowlan)848 static inline int ath9k_suspend(struct ieee80211_hw *hw,
849 struct cfg80211_wowlan *wowlan)
850 {
851 return 0;
852 }
ath9k_resume(struct ieee80211_hw * hw)853 static inline int ath9k_resume(struct ieee80211_hw *hw)
854 {
855 return 0;
856 }
ath9k_set_wakeup(struct ieee80211_hw * hw,bool enabled)857 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
858 {
859 }
860 #endif /* CONFIG_ATH9K_WOW */
861
862 /*******************************/
863 /* Antenna diversity/combining */
864 /*******************************/
865
866 #define ATH_ANT_RX_CURRENT_SHIFT 4
867 #define ATH_ANT_RX_MAIN_SHIFT 2
868 #define ATH_ANT_RX_MASK 0x3
869
870 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
871 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
872 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
873 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
874 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
875 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
876 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
877 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
878 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
879
880 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
881 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
882 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
883
884 struct ath_ant_comb {
885 u16 count;
886 u16 total_pkt_count;
887 bool scan;
888 bool scan_not_start;
889 int main_total_rssi;
890 int alt_total_rssi;
891 int alt_recv_cnt;
892 int main_recv_cnt;
893 int rssi_lna1;
894 int rssi_lna2;
895 int rssi_add;
896 int rssi_sub;
897 int rssi_first;
898 int rssi_second;
899 int rssi_third;
900 int ant_ratio;
901 int ant_ratio2;
902 bool alt_good;
903 int quick_scan_cnt;
904 enum ath9k_ant_div_comb_lna_conf main_conf;
905 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
906 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
907 bool first_ratio;
908 bool second_ratio;
909 unsigned long scan_start_time;
910
911 /*
912 * Card-specific config values.
913 */
914 int low_rssi_thresh;
915 int fast_div_bias;
916 };
917
918 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
919
920 /********************/
921 /* Main driver core */
922 /********************/
923
924 #define ATH9K_PCI_CUS198 0x0001
925 #define ATH9K_PCI_CUS230 0x0002
926 #define ATH9K_PCI_CUS217 0x0004
927 #define ATH9K_PCI_CUS252 0x0008
928 #define ATH9K_PCI_WOW 0x0010
929 #define ATH9K_PCI_BT_ANT_DIV 0x0020
930 #define ATH9K_PCI_D3_L1_WAR 0x0040
931 #define ATH9K_PCI_AR9565_1ANT 0x0080
932 #define ATH9K_PCI_AR9565_2ANT 0x0100
933 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
934 #define ATH9K_PCI_KILLER 0x0400
935 #define ATH9K_PCI_LED_ACT_HI 0x0800
936
937 /*
938 * Default cache line size, in bytes.
939 * Used when PCI device not fully initialized by bootrom/BIOS
940 */
941 #define DEFAULT_CACHELINE 32
942 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
943 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
944 #define MAX_GTT_CNT 5
945
946 /* Powersave flags */
947 #define PS_WAIT_FOR_BEACON BIT(0)
948 #define PS_WAIT_FOR_CAB BIT(1)
949 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
950 #define PS_WAIT_FOR_TX_ACK BIT(3)
951 #define PS_BEACON_SYNC BIT(4)
952 #define PS_WAIT_FOR_ANI BIT(5)
953
954 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
955
956 struct ath_softc {
957 struct ieee80211_hw *hw;
958 struct device *dev;
959
960 struct survey_info *cur_survey;
961 struct survey_info survey[ATH9K_NUM_CHANNELS];
962
963 spinlock_t intr_lock;
964 struct tasklet_struct intr_tq;
965 struct tasklet_struct bcon_tasklet;
966 struct ath_hw *sc_ah;
967 void __iomem *mem;
968 int irq;
969 spinlock_t sc_serial_rw;
970 spinlock_t sc_pm_lock;
971 spinlock_t sc_pcu_lock;
972 struct mutex mutex;
973 struct work_struct paprd_work;
974 struct work_struct hw_reset_work;
975 struct completion paprd_complete;
976 wait_queue_head_t tx_wait;
977
978 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
979 struct work_struct chanctx_work;
980 struct ath_gen_timer *p2p_ps_timer;
981 struct ath_vif *p2p_ps_vif;
982 struct ath_chanctx_sched sched;
983 struct ath_offchannel offchannel;
984 struct ath_chanctx *next_chan;
985 struct completion go_beacon;
986 #endif
987
988 unsigned long driver_data;
989
990 u8 gtt_cnt;
991 u32 intrstatus;
992 u16 ps_flags; /* PS_* */
993 bool ps_enabled;
994 bool ps_idle;
995 short nbcnvifs;
996 unsigned long ps_usecount;
997
998 struct ath_rx rx;
999 struct ath_tx tx;
1000 struct ath_beacon beacon;
1001
1002 struct cfg80211_chan_def cur_chandef;
1003 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
1004 struct ath_chanctx *cur_chan;
1005 spinlock_t chan_lock;
1006
1007 #ifdef CONFIG_MAC80211_LEDS
1008 bool led_registered;
1009 char led_name[32];
1010 struct led_classdev led_cdev;
1011 #endif
1012
1013 #ifdef CONFIG_ATH9K_DEBUGFS
1014 struct ath9k_debug debug;
1015 #endif
1016 struct delayed_work tx_complete_work;
1017 struct delayed_work hw_pll_work;
1018 struct timer_list sleep_timer;
1019
1020 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1021 struct ath_btcoex btcoex;
1022 struct ath_mci_coex mci_coex;
1023 struct work_struct mci_work;
1024 #endif
1025
1026 struct ath_descdma txsdma;
1027
1028 struct ath_ant_comb ant_comb;
1029 u8 ant_tx, ant_rx;
1030 struct dfs_pattern_detector *dfs_detector;
1031 u64 dfs_prev_pulse_ts;
1032 u32 wow_enabled;
1033
1034 struct ath_spec_scan_priv spec_priv;
1035
1036 struct ieee80211_vif *tx99_vif;
1037 struct sk_buff *tx99_skb;
1038 bool tx99_state;
1039 s16 tx99_power;
1040
1041 #ifdef CONFIG_ATH9K_WOW
1042 u32 wow_intr_before_sleep;
1043 bool force_wow;
1044 #endif
1045 };
1046
1047 /********/
1048 /* TX99 */
1049 /********/
1050
1051 #ifdef CONFIG_ATH9K_TX99
1052 void ath9k_tx99_init_debug(struct ath_softc *sc);
1053 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1054 struct ath_tx_control *txctl);
1055 #else
ath9k_tx99_init_debug(struct ath_softc * sc)1056 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1057 {
1058 }
ath9k_tx99_send(struct ath_softc * sc,struct sk_buff * skb,struct ath_tx_control * txctl)1059 static inline int ath9k_tx99_send(struct ath_softc *sc,
1060 struct sk_buff *skb,
1061 struct ath_tx_control *txctl)
1062 {
1063 return 0;
1064 }
1065 #endif /* CONFIG_ATH9K_TX99 */
1066
ath_read_cachesize(struct ath_common * common,int * csz)1067 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1068 {
1069 common->bus_ops->read_cachesize(common, csz);
1070 }
1071
1072 void ath9k_tasklet(unsigned long data);
1073 int ath_cabq_update(struct ath_softc *);
1074 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1075 irqreturn_t ath_isr(int irq, void *dev);
1076 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1077 void ath_cancel_work(struct ath_softc *sc);
1078 void ath_restart_work(struct ath_softc *sc);
1079 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1080 const struct ath_bus_ops *bus_ops);
1081 void ath9k_deinit_device(struct ath_softc *sc);
1082 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1083 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1084 void ath_start_rfkill_poll(struct ath_softc *sc);
1085 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1086 void ath9k_ps_wakeup(struct ath_softc *sc);
1087 void ath9k_ps_restore(struct ath_softc *sc);
1088
1089 #ifdef CONFIG_ATH9K_PCI
1090 int ath_pci_init(void);
1091 void ath_pci_exit(void);
1092 #else
ath_pci_init(void)1093 static inline int ath_pci_init(void) { return 0; };
ath_pci_exit(void)1094 static inline void ath_pci_exit(void) {};
1095 #endif
1096
1097 #ifdef CONFIG_ATH9K_AHB
1098 int ath_ahb_init(void);
1099 void ath_ahb_exit(void);
1100 #else
ath_ahb_init(void)1101 static inline int ath_ahb_init(void) { return 0; };
ath_ahb_exit(void)1102 static inline void ath_ahb_exit(void) {};
1103 #endif
1104
1105 #endif /* ATH9K_H */
1106