1 #ifndef dprintk
2 # define dprintk(x)
3 #endif
4 /* eg: if (nblank(dprintk(x))) */
5 #define _nblank(x) #x
6 #define nblank(x) _nblank(x)[0]
7
8 #include <linux/interrupt.h>
9 #include <linux/pci.h>
10
11 /*------------------------------------------------------------------------------
12 * D E F I N E S
13 *----------------------------------------------------------------------------*/
14
15 #define AAC_MAX_MSIX 32 /* vectors */
16 #define AAC_PCI_MSI_ENABLE 0x8000
17
18 enum {
19 AAC_ENABLE_INTERRUPT = 0x0,
20 AAC_DISABLE_INTERRUPT,
21 AAC_ENABLE_MSIX,
22 AAC_DISABLE_MSIX,
23 AAC_CLEAR_AIF_BIT,
24 AAC_CLEAR_SYNC_BIT,
25 AAC_ENABLE_INTX
26 };
27
28 #define AAC_INT_MODE_INTX (1<<0)
29 #define AAC_INT_MODE_MSI (1<<1)
30 #define AAC_INT_MODE_AIF (1<<2)
31 #define AAC_INT_MODE_SYNC (1<<3)
32 #define AAC_INT_MODE_MSIX (1<<16)
33
34 #define AAC_INT_ENABLE_TYPE1_INTX 0xfffffffb
35 #define AAC_INT_ENABLE_TYPE1_MSIX 0xfffffffa
36 #define AAC_INT_DISABLE_ALL 0xffffffff
37
38 /* Bit definitions in IOA->Host Interrupt Register */
39 #define PMC_TRANSITION_TO_OPERATIONAL (1<<31)
40 #define PMC_IOARCB_TRANSFER_FAILED (1<<28)
41 #define PMC_IOA_UNIT_CHECK (1<<27)
42 #define PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE (1<<26)
43 #define PMC_CRITICAL_IOA_OP_IN_PROGRESS (1<<25)
44 #define PMC_IOARRIN_LOST (1<<4)
45 #define PMC_SYSTEM_BUS_MMIO_ERROR (1<<3)
46 #define PMC_IOA_PROCESSOR_IN_ERROR_STATE (1<<2)
47 #define PMC_HOST_RRQ_VALID (1<<1)
48 #define PMC_OPERATIONAL_STATUS (1<<31)
49 #define PMC_ALLOW_MSIX_VECTOR0 (1<<0)
50
51 #define PMC_IOA_ERROR_INTERRUPTS (PMC_IOARCB_TRANSFER_FAILED | \
52 PMC_IOA_UNIT_CHECK | \
53 PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE | \
54 PMC_IOARRIN_LOST | \
55 PMC_SYSTEM_BUS_MMIO_ERROR | \
56 PMC_IOA_PROCESSOR_IN_ERROR_STATE)
57
58 #define PMC_ALL_INTERRUPT_BITS (PMC_IOA_ERROR_INTERRUPTS | \
59 PMC_HOST_RRQ_VALID | \
60 PMC_TRANSITION_TO_OPERATIONAL | \
61 PMC_ALLOW_MSIX_VECTOR0)
62 #define PMC_GLOBAL_INT_BIT2 0x00000004
63 #define PMC_GLOBAL_INT_BIT0 0x00000001
64
65 #ifndef AAC_DRIVER_BUILD
66 # define AAC_DRIVER_BUILD 41010
67 # define AAC_DRIVER_BRANCH "-ms"
68 #endif
69 #define MAXIMUM_NUM_CONTAINERS 32
70
71 #define AAC_NUM_MGT_FIB 8
72 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
73 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
74
75 #define AAC_MAX_LUN (8)
76
77 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
78 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
79
80 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE
81
82 /*
83 * These macros convert from physical channels to virtual channels
84 */
85 #define CONTAINER_CHANNEL (0)
86 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
87 #define CONTAINER_TO_ID(cont) (cont)
88 #define CONTAINER_TO_LUN(cont) (0)
89
90 #define PMC_DEVICE_S6 0x28b
91 #define PMC_DEVICE_S7 0x28c
92 #define PMC_DEVICE_S8 0x28d
93 #define PMC_DEVICE_S9 0x28f
94
95 #define aac_phys_to_logical(x) ((x)+1)
96 #define aac_logical_to_phys(x) ((x)?(x)-1:0)
97
98 /* #define AAC_DETAILED_STATUS_INFO */
99
100 struct diskparm
101 {
102 int heads;
103 int sectors;
104 int cylinders;
105 };
106
107
108 /*
109 * Firmware constants
110 */
111
112 #define CT_NONE 0
113 #define CT_OK 218
114 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
115 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
116
117 /*
118 * Host side memory scatter gather list
119 * Used by the adapter for read, write, and readdirplus operations
120 * We have separate 32 and 64 bit version because even
121 * on 64 bit systems not all cards support the 64 bit version
122 */
123 struct sgentry {
124 __le32 addr; /* 32-bit address. */
125 __le32 count; /* Length. */
126 };
127
128 struct user_sgentry {
129 u32 addr; /* 32-bit address. */
130 u32 count; /* Length. */
131 };
132
133 struct sgentry64 {
134 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
135 __le32 count; /* Length. */
136 };
137
138 struct user_sgentry64 {
139 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
140 u32 count; /* Length. */
141 };
142
143 struct sgentryraw {
144 __le32 next; /* reserved for F/W use */
145 __le32 prev; /* reserved for F/W use */
146 __le32 addr[2];
147 __le32 count;
148 __le32 flags; /* reserved for F/W use */
149 };
150
151 struct user_sgentryraw {
152 u32 next; /* reserved for F/W use */
153 u32 prev; /* reserved for F/W use */
154 u32 addr[2];
155 u32 count;
156 u32 flags; /* reserved for F/W use */
157 };
158
159 struct sge_ieee1212 {
160 u32 addrLow;
161 u32 addrHigh;
162 u32 length;
163 u32 flags;
164 };
165
166 /*
167 * SGMAP
168 *
169 * This is the SGMAP structure for all commands that use
170 * 32-bit addressing.
171 */
172
173 struct sgmap {
174 __le32 count;
175 struct sgentry sg[1];
176 };
177
178 struct user_sgmap {
179 u32 count;
180 struct user_sgentry sg[1];
181 };
182
183 struct sgmap64 {
184 __le32 count;
185 struct sgentry64 sg[1];
186 };
187
188 struct user_sgmap64 {
189 u32 count;
190 struct user_sgentry64 sg[1];
191 };
192
193 struct sgmapraw {
194 __le32 count;
195 struct sgentryraw sg[1];
196 };
197
198 struct user_sgmapraw {
199 u32 count;
200 struct user_sgentryraw sg[1];
201 };
202
203 struct creation_info
204 {
205 u8 buildnum; /* e.g., 588 */
206 u8 usec; /* e.g., 588 */
207 u8 via; /* e.g., 1 = FSU,
208 * 2 = API
209 */
210 u8 year; /* e.g., 1997 = 97 */
211 __le32 date; /*
212 * unsigned Month :4; // 1 - 12
213 * unsigned Day :6; // 1 - 32
214 * unsigned Hour :6; // 0 - 23
215 * unsigned Minute :6; // 0 - 60
216 * unsigned Second :6; // 0 - 60
217 */
218 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
219 };
220
221
222 /*
223 * Define all the constants needed for the communication interface
224 */
225
226 /*
227 * Define how many queue entries each queue will have and the total
228 * number of entries for the entire communication interface. Also define
229 * how many queues we support.
230 *
231 * This has to match the controller
232 */
233
234 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
235 #define HOST_HIGH_CMD_ENTRIES 4
236 #define HOST_NORM_CMD_ENTRIES 8
237 #define ADAP_HIGH_CMD_ENTRIES 4
238 #define ADAP_NORM_CMD_ENTRIES 512
239 #define HOST_HIGH_RESP_ENTRIES 4
240 #define HOST_NORM_RESP_ENTRIES 512
241 #define ADAP_HIGH_RESP_ENTRIES 4
242 #define ADAP_NORM_RESP_ENTRIES 8
243
244 #define TOTAL_QUEUE_ENTRIES \
245 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
246 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
247
248
249 /*
250 * Set the queues on a 16 byte alignment
251 */
252
253 #define QUEUE_ALIGNMENT 16
254
255 /*
256 * The queue headers define the Communication Region queues. These
257 * are physically contiguous and accessible by both the adapter and the
258 * host. Even though all queue headers are in the same contiguous block
259 * they will be represented as individual units in the data structures.
260 */
261
262 struct aac_entry {
263 __le32 size; /* Size in bytes of Fib which this QE points to */
264 __le32 addr; /* Receiver address of the FIB */
265 };
266
267 /*
268 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
269 * adjacently and in that order.
270 */
271
272 struct aac_qhdr {
273 __le64 header_addr;/* Address to hand the adapter to access
274 to this queue head */
275 __le32 *producer; /* The producer index for this queue (host address) */
276 __le32 *consumer; /* The consumer index for this queue (host address) */
277 };
278
279 /*
280 * Define all the events which the adapter would like to notify
281 * the host of.
282 */
283
284 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
285 #define HostHighCmdQue 2 /* Change in host high priority command queue */
286 #define HostNormRespQue 3 /* Change in host normal priority response queue */
287 #define HostHighRespQue 4 /* Change in host high priority response queue */
288 #define AdapNormRespNotFull 5
289 #define AdapHighRespNotFull 6
290 #define AdapNormCmdNotFull 7
291 #define AdapHighCmdNotFull 8
292 #define SynchCommandComplete 9
293 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
294
295 /*
296 * Define all the events the host wishes to notify the
297 * adapter of. The first four values much match the Qid the
298 * corresponding queue.
299 */
300
301 #define AdapNormCmdQue 2
302 #define AdapHighCmdQue 3
303 #define AdapNormRespQue 6
304 #define AdapHighRespQue 7
305 #define HostShutdown 8
306 #define HostPowerFail 9
307 #define FatalCommError 10
308 #define HostNormRespNotFull 11
309 #define HostHighRespNotFull 12
310 #define HostNormCmdNotFull 13
311 #define HostHighCmdNotFull 14
312 #define FastIo 15
313 #define AdapPrintfDone 16
314
315 /*
316 * Define all the queues that the adapter and host use to communicate
317 * Number them to match the physical queue layout.
318 */
319
320 enum aac_queue_types {
321 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
322 HostHighCmdQueue, /* Adapter to host high priority command traffic */
323 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
324 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
325 HostNormRespQueue, /* Adapter to host normal priority response traffic */
326 HostHighRespQueue, /* Adapter to host high priority response traffic */
327 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
328 AdapHighRespQueue /* Host to adapter high priority response traffic */
329 };
330
331 /*
332 * Assign type values to the FSA communication data structures
333 */
334
335 #define FIB_MAGIC 0x0001
336 #define FIB_MAGIC2 0x0004
337 #define FIB_MAGIC2_64 0x0005
338
339 /*
340 * Define the priority levels the FSA communication routines support.
341 */
342
343 #define FsaNormal 1
344
345 /* transport FIB header (PMC) */
346 struct aac_fib_xporthdr {
347 u64 HostAddress; /* FIB host address w/o xport header */
348 u32 Size; /* FIB size excluding xport header */
349 u32 Handle; /* driver handle to reference the FIB */
350 u64 Reserved[2];
351 };
352
353 #define ALIGN32 32
354
355 /*
356 * Define the FIB. The FIB is the where all the requested data and
357 * command information are put to the application on the FSA adapter.
358 */
359
360 struct aac_fibhdr {
361 __le32 XferState; /* Current transfer state for this CCB */
362 __le16 Command; /* Routing information for the destination */
363 u8 StructType; /* Type FIB */
364 u8 Unused; /* Unused */
365 __le16 Size; /* Size of this FIB in bytes */
366 __le16 SenderSize; /* Size of the FIB in the sender
367 (for response sizing) */
368 __le32 SenderFibAddress; /* Host defined data in the FIB */
369 union {
370 __le32 ReceiverFibAddress;/* Logical address of this FIB for
371 the adapter (old) */
372 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */
373 __le32 TimeStamp; /* otherwise timestamp for FW internal use */
374 } u;
375 u32 Handle; /* FIB handle used for MSGU commnunication */
376 u32 Previous; /* FW internal use */
377 u32 Next; /* FW internal use */
378 };
379
380 struct hw_fib {
381 struct aac_fibhdr header;
382 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
383 };
384
385 /*
386 * FIB commands
387 */
388
389 #define TestCommandResponse 1
390 #define TestAdapterCommand 2
391 /*
392 * Lowlevel and comm commands
393 */
394 #define LastTestCommand 100
395 #define ReinitHostNormCommandQueue 101
396 #define ReinitHostHighCommandQueue 102
397 #define ReinitHostHighRespQueue 103
398 #define ReinitHostNormRespQueue 104
399 #define ReinitAdapNormCommandQueue 105
400 #define ReinitAdapHighCommandQueue 107
401 #define ReinitAdapHighRespQueue 108
402 #define ReinitAdapNormRespQueue 109
403 #define InterfaceShutdown 110
404 #define DmaCommandFib 120
405 #define StartProfile 121
406 #define TermProfile 122
407 #define SpeedTest 123
408 #define TakeABreakPt 124
409 #define RequestPerfData 125
410 #define SetInterruptDefTimer 126
411 #define SetInterruptDefCount 127
412 #define GetInterruptDefStatus 128
413 #define LastCommCommand 129
414 /*
415 * Filesystem commands
416 */
417 #define NuFileSystem 300
418 #define UFS 301
419 #define HostFileSystem 302
420 #define LastFileSystemCommand 303
421 /*
422 * Container Commands
423 */
424 #define ContainerCommand 500
425 #define ContainerCommand64 501
426 #define ContainerRawIo 502
427 #define ContainerRawIo2 503
428 /*
429 * Scsi Port commands (scsi passthrough)
430 */
431 #define ScsiPortCommand 600
432 #define ScsiPortCommand64 601
433 /*
434 * Misc house keeping and generic adapter initiated commands
435 */
436 #define AifRequest 700
437 #define CheckRevision 701
438 #define FsaHostShutdown 702
439 #define RequestAdapterInfo 703
440 #define IsAdapterPaused 704
441 #define SendHostTime 705
442 #define RequestSupplementAdapterInfo 706
443 #define LastMiscCommand 707
444
445 /*
446 * Commands that will target the failover level on the FSA adapter
447 */
448
449 enum fib_xfer_state {
450 HostOwned = (1<<0),
451 AdapterOwned = (1<<1),
452 FibInitialized = (1<<2),
453 FibEmpty = (1<<3),
454 AllocatedFromPool = (1<<4),
455 SentFromHost = (1<<5),
456 SentFromAdapter = (1<<6),
457 ResponseExpected = (1<<7),
458 NoResponseExpected = (1<<8),
459 AdapterProcessed = (1<<9),
460 HostProcessed = (1<<10),
461 HighPriority = (1<<11),
462 NormalPriority = (1<<12),
463 Async = (1<<13),
464 AsyncIo = (1<<13), // rpbfix: remove with new regime
465 PageFileIo = (1<<14), // rpbfix: remove with new regime
466 ShutdownRequest = (1<<15),
467 LazyWrite = (1<<16), // rpbfix: remove with new regime
468 AdapterMicroFib = (1<<17),
469 BIOSFibPath = (1<<18),
470 FastResponseCapable = (1<<19),
471 ApiFib = (1<<20), /* Its an API Fib */
472 /* PMC NEW COMM: There is no more AIF data pending */
473 NoMoreAifDataAvailable = (1<<21)
474 };
475
476 /*
477 * The following defines needs to be updated any time there is an
478 * incompatible change made to the aac_init structure.
479 */
480
481 #define ADAPTER_INIT_STRUCT_REVISION 3
482 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science
483 #define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */
484 #define ADAPTER_INIT_STRUCT_REVISION_7 7 /* Denali */
485
486 struct aac_init
487 {
488 __le32 InitStructRevision;
489 __le32 Sa_MSIXVectors;
490 __le32 fsrev;
491 __le32 CommHeaderAddress;
492 __le32 FastIoCommAreaAddress;
493 __le32 AdapterFibsPhysicalAddress;
494 __le32 AdapterFibsVirtualAddress;
495 __le32 AdapterFibsSize;
496 __le32 AdapterFibAlign;
497 __le32 printfbuf;
498 __le32 printfbufsiz;
499 __le32 HostPhysMemPages; /* number of 4k pages of host
500 physical memory */
501 __le32 HostElapsedSeconds; /* number of seconds since 1970. */
502 /*
503 * ADAPTER_INIT_STRUCT_REVISION_4 begins here
504 */
505 __le32 InitFlags; /* flags for supported features */
506 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
507 #define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
508 #define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
509 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000040
510 #define INITFLAGS_FAST_JBOD_SUPPORTED 0x00000080
511 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED 0x00000100
512 __le32 MaxIoCommands; /* max outstanding commands */
513 __le32 MaxIoSize; /* largest I/O command */
514 __le32 MaxFibSize; /* largest FIB to adapter */
515 /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */
516 __le32 MaxNumAif; /* max number of aif */
517 /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */
518 __le32 HostRRQ_AddrLow;
519 __le32 HostRRQ_AddrHigh; /* Host RRQ (response queue) for SRC */
520 };
521
522 enum aac_log_level {
523 LOG_AAC_INIT = 10,
524 LOG_AAC_INFORMATIONAL = 20,
525 LOG_AAC_WARNING = 30,
526 LOG_AAC_LOW_ERROR = 40,
527 LOG_AAC_MEDIUM_ERROR = 50,
528 LOG_AAC_HIGH_ERROR = 60,
529 LOG_AAC_PANIC = 70,
530 LOG_AAC_DEBUG = 80,
531 LOG_AAC_WINDBG_PRINT = 90
532 };
533
534 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
535 #define FSAFS_NTC_FIB_CONTEXT 0x030c
536
537 struct aac_dev;
538 struct fib;
539 struct scsi_cmnd;
540
541 struct adapter_ops
542 {
543 /* Low level operations */
544 void (*adapter_interrupt)(struct aac_dev *dev);
545 void (*adapter_notify)(struct aac_dev *dev, u32 event);
546 void (*adapter_disable_int)(struct aac_dev *dev);
547 void (*adapter_enable_int)(struct aac_dev *dev);
548 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
549 int (*adapter_check_health)(struct aac_dev *dev);
550 int (*adapter_restart)(struct aac_dev *dev, int bled);
551 void (*adapter_start)(struct aac_dev *dev);
552 /* Transport operations */
553 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
554 irq_handler_t adapter_intr;
555 /* Packet operations */
556 int (*adapter_deliver)(struct fib * fib);
557 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
558 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
559 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
560 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
561 /* Administrative operations */
562 int (*adapter_comm)(struct aac_dev * dev, int comm);
563 };
564
565 /*
566 * Define which interrupt handler needs to be installed
567 */
568
569 struct aac_driver_ident
570 {
571 int (*init)(struct aac_dev *dev);
572 char * name;
573 char * vname;
574 char * model;
575 u16 channels;
576 int quirks;
577 };
578 /*
579 * Some adapter firmware needs communication memory
580 * below 2gig. This tells the init function to set the
581 * dma mask such that fib memory will be allocated where the
582 * adapter firmware can get to it.
583 */
584 #define AAC_QUIRK_31BIT 0x0001
585
586 /*
587 * Some adapter firmware, when the raid card's cache is turned off, can not
588 * split up scatter gathers in order to deal with the limits of the
589 * underlying CHIM. This limit is 34 scatter gather elements.
590 */
591 #define AAC_QUIRK_34SG 0x0002
592
593 /*
594 * This adapter is a slave (no Firmware)
595 */
596 #define AAC_QUIRK_SLAVE 0x0004
597
598 /*
599 * This adapter is a master.
600 */
601 #define AAC_QUIRK_MASTER 0x0008
602
603 /*
604 * Some adapter firmware perform poorly when it must split up scatter gathers
605 * in order to deal with the limits of the underlying CHIM. This limit in this
606 * class of adapters is 17 scatter gather elements.
607 */
608 #define AAC_QUIRK_17SG 0x0010
609
610 /*
611 * Some adapter firmware does not support 64 bit scsi passthrough
612 * commands.
613 */
614 #define AAC_QUIRK_SCSI_32 0x0020
615
616 /*
617 * The adapter interface specs all queues to be located in the same
618 * physically contiguous block. The host structure that defines the
619 * commuication queues will assume they are each a separate physically
620 * contiguous memory region that will support them all being one big
621 * contiguous block.
622 * There is a command and response queue for each level and direction of
623 * commuication. These regions are accessed by both the host and adapter.
624 */
625
626 struct aac_queue {
627 u64 logical; /*address we give the adapter */
628 struct aac_entry *base; /*system virtual address */
629 struct aac_qhdr headers; /*producer,consumer q headers*/
630 u32 entries; /*Number of queue entries */
631 wait_queue_head_t qfull; /*Event to wait on if q full */
632 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
633 /* This is only valid for adapter to host command queues. */
634 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
635 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
636 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
637 /* only valid for command queues which receive entries from the adapter. */
638 /* Number of entries on outstanding queue. */
639 atomic_t numpending;
640 struct aac_dev * dev; /* Back pointer to adapter structure */
641 };
642
643 /*
644 * Message queues. The order here is important, see also the
645 * queue type ordering
646 */
647
648 struct aac_queue_block
649 {
650 struct aac_queue queue[8];
651 };
652
653 /*
654 * SaP1 Message Unit Registers
655 */
656
657 struct sa_drawbridge_CSR {
658 /* Offset | Name */
659 __le32 reserved[10]; /* 00h-27h | Reserved */
660 u8 LUT_Offset; /* 28h | Lookup Table Offset */
661 u8 reserved1[3]; /* 29h-2bh | Reserved */
662 __le32 LUT_Data; /* 2ch | Looup Table Data */
663 __le32 reserved2[26]; /* 30h-97h | Reserved */
664 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */
665 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */
666 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */
667 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */
668 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */
669 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */
670 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */
671 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */
672 __le32 MAILBOX0; /* a8h | Scratchpad 0 */
673 __le32 MAILBOX1; /* ach | Scratchpad 1 */
674 __le32 MAILBOX2; /* b0h | Scratchpad 2 */
675 __le32 MAILBOX3; /* b4h | Scratchpad 3 */
676 __le32 MAILBOX4; /* b8h | Scratchpad 4 */
677 __le32 MAILBOX5; /* bch | Scratchpad 5 */
678 __le32 MAILBOX6; /* c0h | Scratchpad 6 */
679 __le32 MAILBOX7; /* c4h | Scratchpad 7 */
680 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */
681 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */
682 __le32 reserved3[12]; /* d0h-ffh | reserved */
683 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */
684 };
685
686 #define Mailbox0 SaDbCSR.MAILBOX0
687 #define Mailbox1 SaDbCSR.MAILBOX1
688 #define Mailbox2 SaDbCSR.MAILBOX2
689 #define Mailbox3 SaDbCSR.MAILBOX3
690 #define Mailbox4 SaDbCSR.MAILBOX4
691 #define Mailbox5 SaDbCSR.MAILBOX5
692 #define Mailbox6 SaDbCSR.MAILBOX6
693 #define Mailbox7 SaDbCSR.MAILBOX7
694
695 #define DoorbellReg_p SaDbCSR.PRISETIRQ
696 #define DoorbellReg_s SaDbCSR.SECSETIRQ
697 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
698
699
700 #define DOORBELL_0 0x0001
701 #define DOORBELL_1 0x0002
702 #define DOORBELL_2 0x0004
703 #define DOORBELL_3 0x0008
704 #define DOORBELL_4 0x0010
705 #define DOORBELL_5 0x0020
706 #define DOORBELL_6 0x0040
707
708
709 #define PrintfReady DOORBELL_5
710 #define PrintfDone DOORBELL_5
711
712 struct sa_registers {
713 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
714 };
715
716
717 #define Sa_MINIPORT_REVISION 1
718
719 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
720 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
721 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
722 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
723
724 /*
725 * Rx Message Unit Registers
726 */
727
728 struct rx_mu_registers {
729 /* Local | PCI*| Name */
730 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */
731 __le32 reserved0; /* 1304h | 04h | Reserved */
732 __le32 AWR; /* 1308h | 08h | APIC Window Register */
733 __le32 reserved1; /* 130Ch | 0Ch | Reserved */
734 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */
735 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */
736 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */
737 __le32 IISR; /* 1324h | 24h | Inbound Interrupt
738 Status Register */
739 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt
740 Mask Register */
741 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */
742 __le32 OISR; /* 1330h | 30h | Outbound Interrupt
743 Status Register */
744 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt
745 Mask Register */
746 __le32 reserved2; /* 1338h | 38h | Reserved */
747 __le32 reserved3; /* 133Ch | 3Ch | Reserved */
748 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */
749 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */
750 /* * Must access through ATU Inbound
751 Translation Window */
752 };
753
754 struct rx_inbound {
755 __le32 Mailbox[8];
756 };
757
758 #define INBOUNDDOORBELL_0 0x00000001
759 #define INBOUNDDOORBELL_1 0x00000002
760 #define INBOUNDDOORBELL_2 0x00000004
761 #define INBOUNDDOORBELL_3 0x00000008
762 #define INBOUNDDOORBELL_4 0x00000010
763 #define INBOUNDDOORBELL_5 0x00000020
764 #define INBOUNDDOORBELL_6 0x00000040
765
766 #define OUTBOUNDDOORBELL_0 0x00000001
767 #define OUTBOUNDDOORBELL_1 0x00000002
768 #define OUTBOUNDDOORBELL_2 0x00000004
769 #define OUTBOUNDDOORBELL_3 0x00000008
770 #define OUTBOUNDDOORBELL_4 0x00000010
771
772 #define InboundDoorbellReg MUnit.IDR
773 #define OutboundDoorbellReg MUnit.ODR
774
775 struct rx_registers {
776 struct rx_mu_registers MUnit; /* 1300h - 1347h */
777 __le32 reserved1[2]; /* 1348h - 134ch */
778 struct rx_inbound IndexRegs;
779 };
780
781 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
782 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
783 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
784 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
785
786 /*
787 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
788 */
789
790 #define rkt_mu_registers rx_mu_registers
791 #define rkt_inbound rx_inbound
792
793 struct rkt_registers {
794 struct rkt_mu_registers MUnit; /* 1300h - 1347h */
795 __le32 reserved1[1006]; /* 1348h - 22fch */
796 struct rkt_inbound IndexRegs; /* 2300h - */
797 };
798
799 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
800 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
801 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
802 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
803
804 /*
805 * PMC SRC message unit registers
806 */
807
808 #define src_inbound rx_inbound
809
810 struct src_mu_registers {
811 /* PCI*| Name */
812 __le32 reserved0[6]; /* 00h | Reserved */
813 __le32 IOAR[2]; /* 18h | IOA->host interrupt register */
814 __le32 IDR; /* 20h | Inbound Doorbell Register */
815 __le32 IISR; /* 24h | Inbound Int. Status Register */
816 __le32 reserved1[3]; /* 28h | Reserved */
817 __le32 OIMR; /* 34h | Outbound Int. Mask Register */
818 __le32 reserved2[25]; /* 38h | Reserved */
819 __le32 ODR_R; /* 9ch | Outbound Doorbell Read */
820 __le32 ODR_C; /* a0h | Outbound Doorbell Clear */
821 __le32 reserved3[6]; /* a4h | Reserved */
822 __le32 OMR; /* bch | Outbound Message Register */
823 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */
824 __le32 IQ_H; /* c4h | Inbound Queue (High address) */
825 __le32 ODR_MSI; /* c8h | MSI register for sync./AIF */
826 };
827
828 struct src_registers {
829 struct src_mu_registers MUnit; /* 00h - cbh */
830 union {
831 struct {
832 __le32 reserved1[130789]; /* cch - 7fc5fh */
833 struct src_inbound IndexRegs; /* 7fc60h */
834 } tupelo;
835 struct {
836 __le32 reserved1[973]; /* cch - fffh */
837 struct src_inbound IndexRegs; /* 1000h */
838 } denali;
839 } u;
840 };
841
842 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR))
843 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR))
844 #define src_writeb(AEP, CSR, value) writeb(value, \
845 &((AEP)->regs.src.bar0->CSR))
846 #define src_writel(AEP, CSR, value) writel(value, \
847 &((AEP)->regs.src.bar0->CSR))
848 #if defined(writeq)
849 #define src_writeq(AEP, CSR, value) writeq(value, \
850 &((AEP)->regs.src.bar0->CSR))
851 #endif
852
853 #define SRC_ODR_SHIFT 12
854 #define SRC_IDR_SHIFT 9
855
856 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
857
858 struct aac_fib_context {
859 s16 type; // used for verification of structure
860 s16 size;
861 u32 unique; // unique value representing this context
862 ulong jiffies; // used for cleanup - dmb changed to ulong
863 struct list_head next; // used to link context's into a linked list
864 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
865 int wait; // Set to true when thread is in WaitForSingleObject
866 unsigned long count; // total number of FIBs on FibList
867 struct list_head fib_list; // this holds fibs and their attachd hw_fibs
868 };
869
870 struct sense_data {
871 u8 error_code; /* 70h (current errors), 71h(deferred errors) */
872 u8 valid:1; /* A valid bit of one indicates that the information */
873 /* field contains valid information as defined in the
874 * SCSI-2 Standard.
875 */
876 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */
877 u8 sense_key:4; /* Sense Key */
878 u8 reserved:1;
879 u8 ILI:1; /* Incorrect Length Indicator */
880 u8 EOM:1; /* End Of Medium - reserved for random access devices */
881 u8 filemark:1; /* Filemark - reserved for random access devices */
882
883 u8 information[4]; /* for direct-access devices, contains the unsigned
884 * logical block address or residue associated with
885 * the sense key
886 */
887 u8 add_sense_len; /* number of additional sense bytes to follow this field */
888 u8 cmnd_info[4]; /* not used */
889 u8 ASC; /* Additional Sense Code */
890 u8 ASCQ; /* Additional Sense Code Qualifier */
891 u8 FRUC; /* Field Replaceable Unit Code - not used */
892 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data
893 * was in error
894 */
895 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that
896 * the bit_ptr field has valid value
897 */
898 u8 reserved2:2;
899 u8 CD:1; /* command data bit: 1- illegal parameter in CDB.
900 * 0- illegal parameter in data.
901 */
902 u8 SKSV:1;
903 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */
904 };
905
906 struct fsa_dev_info {
907 u64 last;
908 u64 size;
909 u32 type;
910 u32 config_waiting_on;
911 unsigned long config_waiting_stamp;
912 u16 queue_depth;
913 u8 config_needed;
914 u8 valid;
915 u8 ro;
916 u8 locked;
917 u8 deleted;
918 char devname[8];
919 struct sense_data sense_data;
920 u32 block_size;
921 };
922
923 struct fib {
924 void *next; /* this is used by the allocator */
925 s16 type;
926 s16 size;
927 /*
928 * The Adapter that this I/O is destined for.
929 */
930 struct aac_dev *dev;
931 /*
932 * This is the event the sendfib routine will wait on if the
933 * caller did not pass one and this is synch io.
934 */
935 struct semaphore event_wait;
936 spinlock_t event_lock;
937
938 u32 done; /* gets set to 1 when fib is complete */
939 fib_callback callback;
940 void *callback_data;
941 u32 flags; // u32 dmb was ulong
942 /*
943 * And for the internal issue/reply queues (we may be able
944 * to merge these two)
945 */
946 struct list_head fiblink;
947 void *data;
948 u32 vector_no;
949 struct hw_fib *hw_fib_va; /* Actual shared object */
950 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
951 };
952
953 /*
954 * Adapter Information Block
955 *
956 * This is returned by the RequestAdapterInfo block
957 */
958
959 struct aac_adapter_info
960 {
961 __le32 platform;
962 __le32 cpu;
963 __le32 subcpu;
964 __le32 clock;
965 __le32 execmem;
966 __le32 buffermem;
967 __le32 totalmem;
968 __le32 kernelrev;
969 __le32 kernelbuild;
970 __le32 monitorrev;
971 __le32 monitorbuild;
972 __le32 hwrev;
973 __le32 hwbuild;
974 __le32 biosrev;
975 __le32 biosbuild;
976 __le32 cluster;
977 __le32 clusterchannelmask;
978 __le32 serial[2];
979 __le32 battery;
980 __le32 options;
981 __le32 OEM;
982 };
983
984 struct aac_supplement_adapter_info
985 {
986 u8 AdapterTypeText[17+1];
987 u8 Pad[2];
988 __le32 FlashMemoryByteSize;
989 __le32 FlashImageId;
990 __le32 MaxNumberPorts;
991 __le32 Version;
992 __le32 FeatureBits;
993 u8 SlotNumber;
994 u8 ReservedPad0[3];
995 u8 BuildDate[12];
996 __le32 CurrentNumberPorts;
997 struct {
998 u8 AssemblyPn[8];
999 u8 FruPn[8];
1000 u8 BatteryFruPn[8];
1001 u8 EcVersionString[8];
1002 u8 Tsid[12];
1003 } VpdInfo;
1004 __le32 FlashFirmwareRevision;
1005 __le32 FlashFirmwareBuild;
1006 __le32 RaidTypeMorphOptions;
1007 __le32 FlashFirmwareBootRevision;
1008 __le32 FlashFirmwareBootBuild;
1009 u8 MfgPcbaSerialNo[12];
1010 u8 MfgWWNName[8];
1011 __le32 SupportedOptions2;
1012 __le32 StructExpansion;
1013 /* StructExpansion == 1 */
1014 __le32 FeatureBits3;
1015 __le32 SupportedPerformanceModes;
1016 __le32 ReservedForFutureGrowth[80];
1017 };
1018 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
1019 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
1020 /* SupportedOptions2 */
1021 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
1022 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
1023 #define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
1024 #define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000)
1025 /* 4KB sector size */
1026 #define AAC_OPTION_VARIABLE_BLOCK_SIZE cpu_to_le32(0x00040000)
1027 /* 240 simple volume support */
1028 #define AAC_OPTION_SUPPORTED_240_VOLUMES cpu_to_le32(0x10000000)
1029 #define AAC_SIS_VERSION_V3 3
1030 #define AAC_SIS_SLOT_UNKNOWN 0xFF
1031
1032 #define GetBusInfo 0x00000009
1033 struct aac_bus_info {
1034 __le32 Command; /* VM_Ioctl */
1035 __le32 ObjType; /* FT_DRIVE */
1036 __le32 MethodId; /* 1 = SCSI Layer */
1037 __le32 ObjectId; /* Handle */
1038 __le32 CtlCmd; /* GetBusInfo */
1039 };
1040
1041 struct aac_bus_info_response {
1042 __le32 Status; /* ST_OK */
1043 __le32 ObjType;
1044 __le32 MethodId; /* unused */
1045 __le32 ObjectId; /* unused */
1046 __le32 CtlCmd; /* unused */
1047 __le32 ProbeComplete;
1048 __le32 BusCount;
1049 __le32 TargetsPerBus;
1050 u8 InitiatorBusId[10];
1051 u8 BusValid[10];
1052 };
1053
1054 /*
1055 * Battery platforms
1056 */
1057 #define AAC_BAT_REQ_PRESENT (1)
1058 #define AAC_BAT_REQ_NOTPRESENT (2)
1059 #define AAC_BAT_OPT_PRESENT (3)
1060 #define AAC_BAT_OPT_NOTPRESENT (4)
1061 #define AAC_BAT_NOT_SUPPORTED (5)
1062 /*
1063 * cpu types
1064 */
1065 #define AAC_CPU_SIMULATOR (1)
1066 #define AAC_CPU_I960 (2)
1067 #define AAC_CPU_STRONGARM (3)
1068
1069 /*
1070 * Supported Options
1071 */
1072 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
1073 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
1074 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
1075 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
1076 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
1077 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
1078 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
1079 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
1080 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
1081 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
1082 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
1083 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
1084 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
1085 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
1086 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
1087 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
1088 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
1089 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
1090 #define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28)
1091 #define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29)
1092 #define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30)
1093 #define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31)
1094
1095 /* MSIX context */
1096 struct aac_msix_ctx {
1097 int vector_no;
1098 struct aac_dev *dev;
1099 };
1100
1101 struct aac_dev
1102 {
1103 struct list_head entry;
1104 const char *name;
1105 int id;
1106
1107 /*
1108 * negotiated FIB settings
1109 */
1110 unsigned max_fib_size;
1111 unsigned sg_tablesize;
1112 unsigned max_num_aif;
1113
1114 /*
1115 * Map for 128 fib objects (64k)
1116 */
1117 dma_addr_t hw_fib_pa;
1118 struct hw_fib *hw_fib_va;
1119 struct hw_fib *aif_base_va;
1120 /*
1121 * Fib Headers
1122 */
1123 struct fib *fibs;
1124
1125 struct fib *free_fib;
1126 spinlock_t fib_lock;
1127
1128 struct aac_queue_block *queues;
1129 /*
1130 * The user API will use an IOCTL to register itself to receive
1131 * FIBs from the adapter. The following list is used to keep
1132 * track of all the threads that have requested these FIBs. The
1133 * mutex is used to synchronize access to all data associated
1134 * with the adapter fibs.
1135 */
1136 struct list_head fib_list;
1137
1138 struct adapter_ops a_ops;
1139 unsigned long fsrev; /* Main driver's revision number */
1140
1141 resource_size_t base_start; /* main IO base */
1142 resource_size_t dbg_base; /* address of UART
1143 * debug buffer */
1144
1145 resource_size_t base_size, dbg_size; /* Size of
1146 * mapped in region */
1147
1148 struct aac_init *init; /* Holds initialization info to communicate with adapter */
1149 dma_addr_t init_pa; /* Holds physical address of the init struct */
1150
1151 u32 *host_rrq; /* response queue
1152 * if AAC_COMM_MESSAGE_TYPE1 */
1153
1154 dma_addr_t host_rrq_pa; /* phys. address */
1155 /* index into rrq buffer */
1156 u32 host_rrq_idx[AAC_MAX_MSIX];
1157 atomic_t rrq_outstanding[AAC_MAX_MSIX];
1158 u32 fibs_pushed_no;
1159 struct pci_dev *pdev; /* Our PCI interface */
1160 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
1161 void * comm_addr; /* Base address of Comm area */
1162 dma_addr_t comm_phys; /* Physical Address of Comm area */
1163 size_t comm_size;
1164
1165 struct Scsi_Host *scsi_host_ptr;
1166 int maximum_num_containers;
1167 int maximum_num_physicals;
1168 int maximum_num_channels;
1169 struct fsa_dev_info *fsa_dev;
1170 struct task_struct *thread;
1171 int cardtype;
1172 /*
1173 *This lock will protect the two 32-bit
1174 *writes to the Inbound Queue
1175 */
1176 spinlock_t iq_lock;
1177
1178 /*
1179 * The following is the device specific extension.
1180 */
1181 #ifndef AAC_MIN_FOOTPRINT_SIZE
1182 # define AAC_MIN_FOOTPRINT_SIZE 8192
1183 # define AAC_MIN_SRC_BAR0_SIZE 0x400000
1184 # define AAC_MIN_SRC_BAR1_SIZE 0x800
1185 # define AAC_MIN_SRCV_BAR0_SIZE 0x100000
1186 # define AAC_MIN_SRCV_BAR1_SIZE 0x400
1187 #endif
1188 union
1189 {
1190 struct sa_registers __iomem *sa;
1191 struct rx_registers __iomem *rx;
1192 struct rkt_registers __iomem *rkt;
1193 struct {
1194 struct src_registers __iomem *bar0;
1195 char __iomem *bar1;
1196 } src;
1197 } regs;
1198 volatile void __iomem *base, *dbg_base_mapped;
1199 volatile struct rx_inbound __iomem *IndexRegs;
1200 u32 OIMR; /* Mask Register Cache */
1201 /*
1202 * AIF thread states
1203 */
1204 u32 aif_thread;
1205 struct aac_adapter_info adapter_info;
1206 struct aac_supplement_adapter_info supplement_adapter_info;
1207 /* These are in adapter info but they are in the io flow so
1208 * lets break them out so we don't have to do an AND to check them
1209 */
1210 u8 nondasd_support;
1211 u8 jbod;
1212 u8 cache_protected;
1213 u8 dac_support;
1214 u8 needs_dac;
1215 u8 raid_scsi_mode;
1216 u8 comm_interface;
1217 # define AAC_COMM_PRODUCER 0
1218 # define AAC_COMM_MESSAGE 1
1219 # define AAC_COMM_MESSAGE_TYPE1 3
1220 # define AAC_COMM_MESSAGE_TYPE2 4
1221 u8 raw_io_interface;
1222 u8 raw_io_64;
1223 u8 printf_enabled;
1224 u8 in_reset;
1225 u8 msi;
1226 int management_fib_count;
1227 spinlock_t manage_lock;
1228 spinlock_t sync_lock;
1229 int sync_mode;
1230 struct fib *sync_fib;
1231 struct list_head sync_fib_list;
1232 u32 doorbell_mask;
1233 u32 max_msix; /* max. MSI-X vectors */
1234 u32 vector_cap; /* MSI-X vector capab.*/
1235 int msi_enabled; /* MSI/MSI-X enabled */
1236 struct msix_entry msixentry[AAC_MAX_MSIX];
1237 struct aac_msix_ctx aac_msix[AAC_MAX_MSIX]; /* context */
1238 u8 adapter_shutdown;
1239 };
1240
1241 #define aac_adapter_interrupt(dev) \
1242 (dev)->a_ops.adapter_interrupt(dev)
1243
1244 #define aac_adapter_notify(dev, event) \
1245 (dev)->a_ops.adapter_notify(dev, event)
1246
1247 #define aac_adapter_disable_int(dev) \
1248 (dev)->a_ops.adapter_disable_int(dev)
1249
1250 #define aac_adapter_enable_int(dev) \
1251 (dev)->a_ops.adapter_enable_int(dev)
1252
1253 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1254 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1255
1256 #define aac_adapter_check_health(dev) \
1257 (dev)->a_ops.adapter_check_health(dev)
1258
1259 #define aac_adapter_restart(dev,bled) \
1260 (dev)->a_ops.adapter_restart(dev,bled)
1261
1262 #define aac_adapter_start(dev) \
1263 ((dev)->a_ops.adapter_start(dev))
1264
1265 #define aac_adapter_ioremap(dev, size) \
1266 (dev)->a_ops.adapter_ioremap(dev, size)
1267
1268 #define aac_adapter_deliver(fib) \
1269 ((fib)->dev)->a_ops.adapter_deliver(fib)
1270
1271 #define aac_adapter_bounds(dev,cmd,lba) \
1272 dev->a_ops.adapter_bounds(dev,cmd,lba)
1273
1274 #define aac_adapter_read(fib,cmd,lba,count) \
1275 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1276
1277 #define aac_adapter_write(fib,cmd,lba,count,fua) \
1278 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1279
1280 #define aac_adapter_scsi(fib,cmd) \
1281 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1282
1283 #define aac_adapter_comm(dev,comm) \
1284 (dev)->a_ops.adapter_comm(dev, comm)
1285
1286 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1287 #define FIB_CONTEXT_FLAG (0x00000002)
1288 #define FIB_CONTEXT_FLAG_WAIT (0x00000004)
1289 #define FIB_CONTEXT_FLAG_FASTRESP (0x00000008)
1290
1291 /*
1292 * Define the command values
1293 */
1294
1295 #define Null 0
1296 #define GetAttributes 1
1297 #define SetAttributes 2
1298 #define Lookup 3
1299 #define ReadLink 4
1300 #define Read 5
1301 #define Write 6
1302 #define Create 7
1303 #define MakeDirectory 8
1304 #define SymbolicLink 9
1305 #define MakeNode 10
1306 #define Removex 11
1307 #define RemoveDirectoryx 12
1308 #define Rename 13
1309 #define Link 14
1310 #define ReadDirectory 15
1311 #define ReadDirectoryPlus 16
1312 #define FileSystemStatus 17
1313 #define FileSystemInfo 18
1314 #define PathConfigure 19
1315 #define Commit 20
1316 #define Mount 21
1317 #define UnMount 22
1318 #define Newfs 23
1319 #define FsCheck 24
1320 #define FsSync 25
1321 #define SimReadWrite 26
1322 #define SetFileSystemStatus 27
1323 #define BlockRead 28
1324 #define BlockWrite 29
1325 #define NvramIoctl 30
1326 #define FsSyncWait 31
1327 #define ClearArchiveBit 32
1328 #define SetAcl 33
1329 #define GetAcl 34
1330 #define AssignAcl 35
1331 #define FaultInsertion 36 /* Fault Insertion Command */
1332 #define CrazyCache 37 /* Crazycache */
1333
1334 #define MAX_FSACOMMAND_NUM 38
1335
1336
1337 /*
1338 * Define the status returns. These are very unixlike although
1339 * most are not in fact used
1340 */
1341
1342 #define ST_OK 0
1343 #define ST_PERM 1
1344 #define ST_NOENT 2
1345 #define ST_IO 5
1346 #define ST_NXIO 6
1347 #define ST_E2BIG 7
1348 #define ST_ACCES 13
1349 #define ST_EXIST 17
1350 #define ST_XDEV 18
1351 #define ST_NODEV 19
1352 #define ST_NOTDIR 20
1353 #define ST_ISDIR 21
1354 #define ST_INVAL 22
1355 #define ST_FBIG 27
1356 #define ST_NOSPC 28
1357 #define ST_ROFS 30
1358 #define ST_MLINK 31
1359 #define ST_WOULDBLOCK 35
1360 #define ST_NAMETOOLONG 63
1361 #define ST_NOTEMPTY 66
1362 #define ST_DQUOT 69
1363 #define ST_STALE 70
1364 #define ST_REMOTE 71
1365 #define ST_NOT_READY 72
1366 #define ST_BADHANDLE 10001
1367 #define ST_NOT_SYNC 10002
1368 #define ST_BAD_COOKIE 10003
1369 #define ST_NOTSUPP 10004
1370 #define ST_TOOSMALL 10005
1371 #define ST_SERVERFAULT 10006
1372 #define ST_BADTYPE 10007
1373 #define ST_JUKEBOX 10008
1374 #define ST_NOTMOUNTED 10009
1375 #define ST_MAINTMODE 10010
1376 #define ST_STALEACL 10011
1377
1378 /*
1379 * On writes how does the client want the data written.
1380 */
1381
1382 #define CACHE_CSTABLE 1
1383 #define CACHE_UNSTABLE 2
1384
1385 /*
1386 * Lets the client know at which level the data was committed on
1387 * a write request
1388 */
1389
1390 #define CMFILE_SYNCH_NVRAM 1
1391 #define CMDATA_SYNCH_NVRAM 2
1392 #define CMFILE_SYNCH 3
1393 #define CMDATA_SYNCH 4
1394 #define CMUNSTABLE 5
1395
1396 #define RIO_TYPE_WRITE 0x0000
1397 #define RIO_TYPE_READ 0x0001
1398 #define RIO_SUREWRITE 0x0008
1399
1400 #define RIO2_IO_TYPE 0x0003
1401 #define RIO2_IO_TYPE_WRITE 0x0000
1402 #define RIO2_IO_TYPE_READ 0x0001
1403 #define RIO2_IO_TYPE_VERIFY 0x0002
1404 #define RIO2_IO_ERROR 0x0004
1405 #define RIO2_IO_SUREWRITE 0x0008
1406 #define RIO2_SGL_CONFORMANT 0x0010
1407 #define RIO2_SG_FORMAT 0xF000
1408 #define RIO2_SG_FORMAT_ARC 0x0000
1409 #define RIO2_SG_FORMAT_SRL 0x1000
1410 #define RIO2_SG_FORMAT_IEEE1212 0x2000
1411
1412 struct aac_read
1413 {
1414 __le32 command;
1415 __le32 cid;
1416 __le32 block;
1417 __le32 count;
1418 struct sgmap sg; // Must be last in struct because it is variable
1419 };
1420
1421 struct aac_read64
1422 {
1423 __le32 command;
1424 __le16 cid;
1425 __le16 sector_count;
1426 __le32 block;
1427 __le16 pad;
1428 __le16 flags;
1429 struct sgmap64 sg; // Must be last in struct because it is variable
1430 };
1431
1432 struct aac_read_reply
1433 {
1434 __le32 status;
1435 __le32 count;
1436 };
1437
1438 struct aac_write
1439 {
1440 __le32 command;
1441 __le32 cid;
1442 __le32 block;
1443 __le32 count;
1444 __le32 stable; // Not used
1445 struct sgmap sg; // Must be last in struct because it is variable
1446 };
1447
1448 struct aac_write64
1449 {
1450 __le32 command;
1451 __le16 cid;
1452 __le16 sector_count;
1453 __le32 block;
1454 __le16 pad;
1455 __le16 flags;
1456 struct sgmap64 sg; // Must be last in struct because it is variable
1457 };
1458 struct aac_write_reply
1459 {
1460 __le32 status;
1461 __le32 count;
1462 __le32 committed;
1463 };
1464
1465 struct aac_raw_io
1466 {
1467 __le32 block[2];
1468 __le32 count;
1469 __le16 cid;
1470 __le16 flags; /* 00 W, 01 R */
1471 __le16 bpTotal; /* reserved for F/W use */
1472 __le16 bpComplete; /* reserved for F/W use */
1473 struct sgmapraw sg;
1474 };
1475
1476 struct aac_raw_io2 {
1477 __le32 blockLow;
1478 __le32 blockHigh;
1479 __le32 byteCount;
1480 __le16 cid;
1481 __le16 flags; /* RIO2 flags */
1482 __le32 sgeFirstSize; /* size of first sge el. */
1483 __le32 sgeNominalSize; /* size of 2nd sge el. (if conformant) */
1484 u8 sgeCnt; /* only 8 bits required */
1485 u8 bpTotal; /* reserved for F/W use */
1486 u8 bpComplete; /* reserved for F/W use */
1487 u8 sgeFirstIndex; /* reserved for F/W use */
1488 u8 unused[4];
1489 struct sge_ieee1212 sge[1];
1490 };
1491
1492 #define CT_FLUSH_CACHE 129
1493 struct aac_synchronize {
1494 __le32 command; /* VM_ContainerConfig */
1495 __le32 type; /* CT_FLUSH_CACHE */
1496 __le32 cid;
1497 __le32 parm1;
1498 __le32 parm2;
1499 __le32 parm3;
1500 __le32 parm4;
1501 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1502 };
1503
1504 struct aac_synchronize_reply {
1505 __le32 dummy0;
1506 __le32 dummy1;
1507 __le32 status; /* CT_OK */
1508 __le32 parm1;
1509 __le32 parm2;
1510 __le32 parm3;
1511 __le32 parm4;
1512 __le32 parm5;
1513 u8 data[16];
1514 };
1515
1516 #define CT_POWER_MANAGEMENT 245
1517 #define CT_PM_START_UNIT 2
1518 #define CT_PM_STOP_UNIT 3
1519 #define CT_PM_UNIT_IMMEDIATE 1
1520 struct aac_power_management {
1521 __le32 command; /* VM_ContainerConfig */
1522 __le32 type; /* CT_POWER_MANAGEMENT */
1523 __le32 sub; /* CT_PM_* */
1524 __le32 cid;
1525 __le32 parm; /* CT_PM_sub_* */
1526 };
1527
1528 #define CT_PAUSE_IO 65
1529 #define CT_RELEASE_IO 66
1530 struct aac_pause {
1531 __le32 command; /* VM_ContainerConfig */
1532 __le32 type; /* CT_PAUSE_IO */
1533 __le32 timeout; /* 10ms ticks */
1534 __le32 min;
1535 __le32 noRescan;
1536 __le32 parm3;
1537 __le32 parm4;
1538 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */
1539 };
1540
1541 struct aac_srb
1542 {
1543 __le32 function;
1544 __le32 channel;
1545 __le32 id;
1546 __le32 lun;
1547 __le32 timeout;
1548 __le32 flags;
1549 __le32 count; // Data xfer size
1550 __le32 retry_limit;
1551 __le32 cdb_size;
1552 u8 cdb[16];
1553 struct sgmap sg;
1554 };
1555
1556 /*
1557 * This and associated data structs are used by the
1558 * ioctl caller and are in cpu order.
1559 */
1560 struct user_aac_srb
1561 {
1562 u32 function;
1563 u32 channel;
1564 u32 id;
1565 u32 lun;
1566 u32 timeout;
1567 u32 flags;
1568 u32 count; // Data xfer size
1569 u32 retry_limit;
1570 u32 cdb_size;
1571 u8 cdb[16];
1572 struct user_sgmap sg;
1573 };
1574
1575 #define AAC_SENSE_BUFFERSIZE 30
1576
1577 struct aac_srb_reply
1578 {
1579 __le32 status;
1580 __le32 srb_status;
1581 __le32 scsi_status;
1582 __le32 data_xfer_length;
1583 __le32 sense_data_size;
1584 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1585 };
1586 /*
1587 * SRB Flags
1588 */
1589 #define SRB_NoDataXfer 0x0000
1590 #define SRB_DisableDisconnect 0x0004
1591 #define SRB_DisableSynchTransfer 0x0008
1592 #define SRB_BypassFrozenQueue 0x0010
1593 #define SRB_DisableAutosense 0x0020
1594 #define SRB_DataIn 0x0040
1595 #define SRB_DataOut 0x0080
1596
1597 /*
1598 * SRB Functions - set in aac_srb->function
1599 */
1600 #define SRBF_ExecuteScsi 0x0000
1601 #define SRBF_ClaimDevice 0x0001
1602 #define SRBF_IO_Control 0x0002
1603 #define SRBF_ReceiveEvent 0x0003
1604 #define SRBF_ReleaseQueue 0x0004
1605 #define SRBF_AttachDevice 0x0005
1606 #define SRBF_ReleaseDevice 0x0006
1607 #define SRBF_Shutdown 0x0007
1608 #define SRBF_Flush 0x0008
1609 #define SRBF_AbortCommand 0x0010
1610 #define SRBF_ReleaseRecovery 0x0011
1611 #define SRBF_ResetBus 0x0012
1612 #define SRBF_ResetDevice 0x0013
1613 #define SRBF_TerminateIO 0x0014
1614 #define SRBF_FlushQueue 0x0015
1615 #define SRBF_RemoveDevice 0x0016
1616 #define SRBF_DomainValidation 0x0017
1617
1618 /*
1619 * SRB SCSI Status - set in aac_srb->scsi_status
1620 */
1621 #define SRB_STATUS_PENDING 0x00
1622 #define SRB_STATUS_SUCCESS 0x01
1623 #define SRB_STATUS_ABORTED 0x02
1624 #define SRB_STATUS_ABORT_FAILED 0x03
1625 #define SRB_STATUS_ERROR 0x04
1626 #define SRB_STATUS_BUSY 0x05
1627 #define SRB_STATUS_INVALID_REQUEST 0x06
1628 #define SRB_STATUS_INVALID_PATH_ID 0x07
1629 #define SRB_STATUS_NO_DEVICE 0x08
1630 #define SRB_STATUS_TIMEOUT 0x09
1631 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1632 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1633 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1634 #define SRB_STATUS_BUS_RESET 0x0E
1635 #define SRB_STATUS_PARITY_ERROR 0x0F
1636 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1637 #define SRB_STATUS_NO_HBA 0x11
1638 #define SRB_STATUS_DATA_OVERRUN 0x12
1639 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1640 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1641 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1642 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1643 #define SRB_STATUS_DELAYED_RETRY 0x17
1644 #define SRB_STATUS_INVALID_LUN 0x20
1645 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1646 #define SRB_STATUS_BAD_FUNCTION 0x22
1647 #define SRB_STATUS_ERROR_RECOVERY 0x23
1648 #define SRB_STATUS_NOT_STARTED 0x24
1649 #define SRB_STATUS_NOT_IN_USE 0x30
1650 #define SRB_STATUS_FORCE_ABORT 0x31
1651 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1652
1653 /*
1654 * Object-Server / Volume-Manager Dispatch Classes
1655 */
1656
1657 #define VM_Null 0
1658 #define VM_NameServe 1
1659 #define VM_ContainerConfig 2
1660 #define VM_Ioctl 3
1661 #define VM_FilesystemIoctl 4
1662 #define VM_CloseAll 5
1663 #define VM_CtBlockRead 6
1664 #define VM_CtBlockWrite 7
1665 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1666 #define VM_SliceBlockWrite 9
1667 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1668 #define VM_DriveBlockWrite 11
1669 #define VM_EnclosureMgt 12 /* enclosure management */
1670 #define VM_Unused 13 /* used to be diskset management */
1671 #define VM_CtBlockVerify 14
1672 #define VM_CtPerf 15 /* performance test */
1673 #define VM_CtBlockRead64 16
1674 #define VM_CtBlockWrite64 17
1675 #define VM_CtBlockVerify64 18
1676 #define VM_CtHostRead64 19
1677 #define VM_CtHostWrite64 20
1678 #define VM_DrvErrTblLog 21
1679 #define VM_NameServe64 22
1680 #define VM_NameServeAllBlk 30
1681
1682 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
1683
1684 /*
1685 * Descriptive information (eg, vital stats)
1686 * that a content manager might report. The
1687 * FileArray filesystem component is one example
1688 * of a content manager. Raw mode might be
1689 * another.
1690 */
1691
1692 struct aac_fsinfo {
1693 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */
1694 __le32 fsBlockSize;
1695 __le32 fsFragSize;
1696 __le32 fsMaxExtendSize;
1697 __le32 fsSpaceUnits;
1698 __le32 fsMaxNumFiles;
1699 __le32 fsNumFreeFiles;
1700 __le32 fsInodeDensity;
1701 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1702
1703 struct aac_blockdevinfo {
1704 __le32 block_size;
1705 };
1706
1707 union aac_contentinfo {
1708 struct aac_fsinfo filesys;
1709 struct aac_blockdevinfo bdevinfo;
1710 };
1711
1712 /*
1713 * Query for Container Configuration Status
1714 */
1715
1716 #define CT_GET_CONFIG_STATUS 147
1717 struct aac_get_config_status {
1718 __le32 command; /* VM_ContainerConfig */
1719 __le32 type; /* CT_GET_CONFIG_STATUS */
1720 __le32 parm1;
1721 __le32 parm2;
1722 __le32 parm3;
1723 __le32 parm4;
1724 __le32 parm5;
1725 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
1726 };
1727
1728 #define CFACT_CONTINUE 0
1729 #define CFACT_PAUSE 1
1730 #define CFACT_ABORT 2
1731 struct aac_get_config_status_resp {
1732 __le32 response; /* ST_OK */
1733 __le32 dummy0;
1734 __le32 status; /* CT_OK */
1735 __le32 parm1;
1736 __le32 parm2;
1737 __le32 parm3;
1738 __le32 parm4;
1739 __le32 parm5;
1740 struct {
1741 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */
1742 __le16 flags;
1743 __le16 count;
1744 } data;
1745 };
1746
1747 /*
1748 * Accept the configuration as-is
1749 */
1750
1751 #define CT_COMMIT_CONFIG 152
1752
1753 struct aac_commit_config {
1754 __le32 command; /* VM_ContainerConfig */
1755 __le32 type; /* CT_COMMIT_CONFIG */
1756 };
1757
1758 /*
1759 * Query for Container Configuration Status
1760 */
1761
1762 #define CT_GET_CONTAINER_COUNT 4
1763 struct aac_get_container_count {
1764 __le32 command; /* VM_ContainerConfig */
1765 __le32 type; /* CT_GET_CONTAINER_COUNT */
1766 };
1767
1768 struct aac_get_container_count_resp {
1769 __le32 response; /* ST_OK */
1770 __le32 dummy0;
1771 __le32 MaxContainers;
1772 __le32 ContainerSwitchEntries;
1773 __le32 MaxPartitions;
1774 __le32 MaxSimpleVolumes;
1775 };
1776
1777
1778 /*
1779 * Query for "mountable" objects, ie, objects that are typically
1780 * associated with a drive letter on the client (host) side.
1781 */
1782
1783 struct aac_mntent {
1784 __le32 oid;
1785 u8 name[16]; /* if applicable */
1786 struct creation_info create_info; /* if applicable */
1787 __le32 capacity;
1788 __le32 vol; /* substrate structure */
1789 __le32 obj; /* FT_FILESYS, etc. */
1790 __le32 state; /* unready for mounting,
1791 readonly, etc. */
1792 union aac_contentinfo fileinfo; /* Info specific to content
1793 manager (eg, filesystem) */
1794 __le32 altoid; /* != oid <==> snapshot or
1795 broken mirror exists */
1796 __le32 capacityhigh;
1797 };
1798
1799 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */
1800 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1801 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1802 #define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */
1803
1804 struct aac_query_mount {
1805 __le32 command;
1806 __le32 type;
1807 __le32 count;
1808 };
1809
1810 struct aac_mount {
1811 __le32 status;
1812 __le32 type; /* should be same as that requested */
1813 __le32 count;
1814 struct aac_mntent mnt[1];
1815 };
1816
1817 #define CT_READ_NAME 130
1818 struct aac_get_name {
1819 __le32 command; /* VM_ContainerConfig */
1820 __le32 type; /* CT_READ_NAME */
1821 __le32 cid;
1822 __le32 parm1;
1823 __le32 parm2;
1824 __le32 parm3;
1825 __le32 parm4;
1826 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
1827 };
1828
1829 struct aac_get_name_resp {
1830 __le32 dummy0;
1831 __le32 dummy1;
1832 __le32 status; /* CT_OK */
1833 __le32 parm1;
1834 __le32 parm2;
1835 __le32 parm3;
1836 __le32 parm4;
1837 __le32 parm5;
1838 u8 data[16];
1839 };
1840
1841 #define CT_CID_TO_32BITS_UID 165
1842 struct aac_get_serial {
1843 __le32 command; /* VM_ContainerConfig */
1844 __le32 type; /* CT_CID_TO_32BITS_UID */
1845 __le32 cid;
1846 };
1847
1848 struct aac_get_serial_resp {
1849 __le32 dummy0;
1850 __le32 dummy1;
1851 __le32 status; /* CT_OK */
1852 __le32 uid;
1853 };
1854
1855 /*
1856 * The following command is sent to shut down each container.
1857 */
1858
1859 struct aac_close {
1860 __le32 command;
1861 __le32 cid;
1862 };
1863
1864 struct aac_query_disk
1865 {
1866 s32 cnum;
1867 s32 bus;
1868 s32 id;
1869 s32 lun;
1870 u32 valid;
1871 u32 locked;
1872 u32 deleted;
1873 s32 instance;
1874 s8 name[10];
1875 u32 unmapped;
1876 };
1877
1878 struct aac_delete_disk {
1879 u32 disknum;
1880 u32 cnum;
1881 };
1882
1883 struct fib_ioctl
1884 {
1885 u32 fibctx;
1886 s32 wait;
1887 char __user *fib;
1888 };
1889
1890 struct revision
1891 {
1892 u32 compat;
1893 __le32 version;
1894 __le32 build;
1895 };
1896
1897
1898 /*
1899 * Ugly - non Linux like ioctl coding for back compat.
1900 */
1901
1902 #define CTL_CODE(function, method) ( \
1903 (4<< 16) | ((function) << 2) | (method) \
1904 )
1905
1906 /*
1907 * Define the method codes for how buffers are passed for I/O and FS
1908 * controls
1909 */
1910
1911 #define METHOD_BUFFERED 0
1912 #define METHOD_NEITHER 3
1913
1914 /*
1915 * Filesystem ioctls
1916 */
1917
1918 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1919 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1920 #define FSACTL_DELETE_DISK 0x163
1921 #define FSACTL_QUERY_DISK 0x173
1922 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1923 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1924 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1925 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1926 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1927 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1928 #define FSACTL_GET_CONTAINERS 2131
1929 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1930
1931
1932 struct aac_common
1933 {
1934 /*
1935 * If this value is set to 1 then interrupt moderation will occur
1936 * in the base commuication support.
1937 */
1938 u32 irq_mod;
1939 u32 peak_fibs;
1940 u32 zero_fibs;
1941 u32 fib_timeouts;
1942 /*
1943 * Statistical counters in debug mode
1944 */
1945 #ifdef DBG
1946 u32 FibsSent;
1947 u32 FibRecved;
1948 u32 NoResponseSent;
1949 u32 NoResponseRecved;
1950 u32 AsyncSent;
1951 u32 AsyncRecved;
1952 u32 NormalSent;
1953 u32 NormalRecved;
1954 #endif
1955 };
1956
1957 extern struct aac_common aac_config;
1958
1959
1960 /*
1961 * The following macro is used when sending and receiving FIBs. It is
1962 * only used for debugging.
1963 */
1964
1965 #ifdef DBG
1966 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1967 #else
1968 #define FIB_COUNTER_INCREMENT(counter)
1969 #endif
1970
1971 /*
1972 * Adapter direct commands
1973 * Monitor/Kernel API
1974 */
1975
1976 #define BREAKPOINT_REQUEST 0x00000004
1977 #define INIT_STRUCT_BASE_ADDRESS 0x00000005
1978 #define READ_PERMANENT_PARAMETERS 0x0000000a
1979 #define WRITE_PERMANENT_PARAMETERS 0x0000000b
1980 #define HOST_CRASHING 0x0000000d
1981 #define SEND_SYNCHRONOUS_FIB 0x0000000c
1982 #define COMMAND_POST_RESULTS 0x00000014
1983 #define GET_ADAPTER_PROPERTIES 0x00000019
1984 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1985 #define RCV_TEMP_READINGS 0x00000025
1986 #define GET_COMM_PREFERRED_SETTINGS 0x00000026
1987 #define IOP_RESET 0x00001000
1988 #define IOP_RESET_ALWAYS 0x00001001
1989 #define RE_INIT_ADAPTER 0x000000ee
1990
1991 /*
1992 * Adapter Status Register
1993 *
1994 * Phase Staus mailbox is 32bits:
1995 * <31:16> = Phase Status
1996 * <15:0> = Phase
1997 *
1998 * The adapter reports is present state through the phase. Only
1999 * a single phase should be ever be set. Each phase can have multiple
2000 * phase status bits to provide more detailed information about the
2001 * state of the board. Care should be taken to ensure that any phase
2002 * status bits that are set when changing the phase are also valid
2003 * for the new phase or be cleared out. Adapter software (monitor,
2004 * iflash, kernel) is responsible for properly maintining the phase
2005 * status mailbox when it is running.
2006 *
2007 * MONKER_API Phases
2008 *
2009 * Phases are bit oriented. It is NOT valid to have multiple bits set
2010 */
2011
2012 #define SELF_TEST_FAILED 0x00000004
2013 #define MONITOR_PANIC 0x00000020
2014 #define KERNEL_UP_AND_RUNNING 0x00000080
2015 #define KERNEL_PANIC 0x00000100
2016 #define FLASH_UPD_PENDING 0x00002000
2017 #define FLASH_UPD_SUCCESS 0x00004000
2018 #define FLASH_UPD_FAILED 0x00008000
2019 #define FWUPD_TIMEOUT (5 * 60)
2020
2021 /*
2022 * Doorbell bit defines
2023 */
2024
2025 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */
2026 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */
2027 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */
2028 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */
2029 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */
2030 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */
2031 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */
2032 #define DoorBellAifPending (1<<6) /* Adapter -> Host */
2033
2034 /* PMC specific outbound doorbell bits */
2035 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */
2036
2037 /*
2038 * For FIB communication, we need all of the following things
2039 * to send back to the user.
2040 */
2041
2042 #define AifCmdEventNotify 1 /* Notify of event */
2043 #define AifEnConfigChange 3 /* Adapter configuration change */
2044 #define AifEnContainerChange 4 /* Container configuration change */
2045 #define AifEnDeviceFailure 5 /* SCSI device failed */
2046 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */
2047 #define EM_DRIVE_INSERTION 31
2048 #define EM_DRIVE_REMOVAL 32
2049 #define EM_SES_DRIVE_INSERTION 33
2050 #define EM_SES_DRIVE_REMOVAL 26
2051 #define AifEnBatteryEvent 14 /* Change in Battery State */
2052 #define AifEnAddContainer 15 /* A new array was created */
2053 #define AifEnDeleteContainer 16 /* A container was deleted */
2054 #define AifEnExpEvent 23 /* Firmware Event Log */
2055 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */
2056 #define AifHighPriority 3 /* Highest Priority Event */
2057 #define AifEnAddJBOD 30 /* JBOD created */
2058 #define AifEnDeleteJBOD 31 /* JBOD deleted */
2059
2060 #define AifCmdJobProgress 2 /* Progress report */
2061 #define AifJobCtrZero 101 /* Array Zero progress */
2062 #define AifJobStsSuccess 1 /* Job completes */
2063 #define AifJobStsRunning 102 /* Job running */
2064 #define AifCmdAPIReport 3 /* Report from other user of API */
2065 #define AifCmdDriverNotify 4 /* Notify host driver of event */
2066 #define AifDenMorphComplete 200 /* A morph operation completed */
2067 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */
2068 #define AifReqJobList 100 /* Gets back complete job list */
2069 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
2070 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
2071 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
2072 #define AifReqTerminateJob 104 /* Terminates job */
2073 #define AifReqSuspendJob 105 /* Suspends a job */
2074 #define AifReqResumeJob 106 /* Resumes a job */
2075 #define AifReqSendAPIReport 107 /* API generic report requests */
2076 #define AifReqAPIJobStart 108 /* Start a job from the API */
2077 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
2078 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
2079
2080 /* PMC NEW COMM: Request the event data */
2081 #define AifReqEvent 200
2082
2083 /* RAW device deleted */
2084 #define AifRawDeviceRemove 203
2085
2086 /*
2087 * Adapter Initiated FIB command structures. Start with the adapter
2088 * initiated FIBs that really come from the adapter, and get responded
2089 * to by the host.
2090 */
2091
2092 struct aac_aifcmd {
2093 __le32 command; /* Tell host what type of notify this is */
2094 __le32 seqnum; /* To allow ordering of reports (if necessary) */
2095 u8 data[1]; /* Undefined length (from kernel viewpoint) */
2096 };
2097
2098 /**
2099 * Convert capacity to cylinders
2100 * accounting for the fact capacity could be a 64 bit value
2101 *
2102 */
cap_to_cyls(sector_t capacity,unsigned divisor)2103 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
2104 {
2105 sector_div(capacity, divisor);
2106 return capacity;
2107 }
2108
2109 /* SCp.phase values */
2110 #define AAC_OWNER_MIDLEVEL 0x101
2111 #define AAC_OWNER_LOWLEVEL 0x102
2112 #define AAC_OWNER_ERROR_HANDLER 0x103
2113 #define AAC_OWNER_FIRMWARE 0x106
2114
2115 int aac_acquire_irq(struct aac_dev *dev);
2116 void aac_free_irq(struct aac_dev *dev);
2117 const char *aac_driverinfo(struct Scsi_Host *);
2118 void aac_fib_vector_assign(struct aac_dev *dev);
2119 struct fib *aac_fib_alloc(struct aac_dev *dev);
2120 int aac_fib_setup(struct aac_dev *dev);
2121 void aac_fib_map_free(struct aac_dev *dev);
2122 void aac_fib_free(struct fib * context);
2123 void aac_fib_init(struct fib * context);
2124 void aac_printf(struct aac_dev *dev, u32 val);
2125 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
2126 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
2127 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
2128 int aac_fib_complete(struct fib * context);
2129 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2130 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
2131 void aac_src_access_devreg(struct aac_dev *dev, int mode);
2132 int aac_get_config_status(struct aac_dev *dev, int commit_flag);
2133 int aac_get_containers(struct aac_dev *dev);
2134 int aac_scsi_cmd(struct scsi_cmnd *cmd);
2135 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
2136 #ifndef shost_to_class
2137 #define shost_to_class(shost) &shost->shost_dev
2138 #endif
2139 ssize_t aac_get_serial_number(struct device *dev, char *buf);
2140 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
2141 int aac_rx_init(struct aac_dev *dev);
2142 int aac_rkt_init(struct aac_dev *dev);
2143 int aac_nark_init(struct aac_dev *dev);
2144 int aac_sa_init(struct aac_dev *dev);
2145 int aac_src_init(struct aac_dev *dev);
2146 int aac_srcv_init(struct aac_dev *dev);
2147 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
2148 void aac_define_int_mode(struct aac_dev *dev);
2149 unsigned int aac_response_normal(struct aac_queue * q);
2150 unsigned int aac_command_normal(struct aac_queue * q);
2151 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
2152 int isAif, int isFastResponse,
2153 struct hw_fib *aif_fib);
2154 int aac_reset_adapter(struct aac_dev * dev, int forced);
2155 int aac_check_health(struct aac_dev * dev);
2156 int aac_command_thread(void *data);
2157 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
2158 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
2159 struct aac_driver_ident* aac_get_driver_ident(int devtype);
2160 int aac_get_adapter_info(struct aac_dev* dev);
2161 int aac_send_shutdown(struct aac_dev *dev);
2162 int aac_probe_container(struct aac_dev *dev, int cid);
2163 int _aac_rx_init(struct aac_dev *dev);
2164 int aac_rx_select_comm(struct aac_dev *dev, int comm);
2165 int aac_rx_deliver_producer(struct fib * fib);
2166 char * get_container_type(unsigned type);
2167 extern int numacb;
2168 extern int acbsize;
2169 extern char aac_driver_version[];
2170 extern int startup_timeout;
2171 extern int aif_timeout;
2172 extern int expose_physicals;
2173 extern int aac_reset_devices;
2174 extern int aac_msi;
2175 extern int aac_commit;
2176 extern int update_interval;
2177 extern int check_interval;
2178 extern int aac_check_reset;
2179