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1 /*
2  * MCE grading rules.
3  * Copyright 2008, 2009 Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License
7  * as published by the Free Software Foundation; version 2
8  * of the License.
9  *
10  * Author: Andi Kleen
11  */
12 #include <linux/kernel.h>
13 #include <linux/seq_file.h>
14 #include <linux/init.h>
15 #include <linux/debugfs.h>
16 #include <asm/mce.h>
17 
18 #include "mce-internal.h"
19 
20 /*
21  * Grade an mce by severity. In general the most severe ones are processed
22  * first. Since there are quite a lot of combinations test the bits in a
23  * table-driven way. The rules are simply processed in order, first
24  * match wins.
25  *
26  * Note this is only used for machine check exceptions, the corrected
27  * errors use much simpler rules. The exceptions still check for the corrected
28  * errors, but only to leave them alone for the CMCI handler (except for
29  * panic situations)
30  */
31 
32 enum context { IN_KERNEL = 1, IN_USER = 2 };
33 enum ser { SER_REQUIRED = 1, NO_SER = 2 };
34 enum exception { EXCP_CONTEXT = 1, NO_EXCP = 2 };
35 
36 static struct severity {
37 	u64 mask;
38 	u64 result;
39 	unsigned char sev;
40 	unsigned char mcgmask;
41 	unsigned char mcgres;
42 	unsigned char ser;
43 	unsigned char context;
44 	unsigned char excp;
45 	unsigned char covered;
46 	char *msg;
47 } severities[] = {
48 #define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }
49 #define  KERNEL		.context = IN_KERNEL
50 #define  USER		.context = IN_USER
51 #define  SER		.ser = SER_REQUIRED
52 #define  NOSER		.ser = NO_SER
53 #define  EXCP		.excp = EXCP_CONTEXT
54 #define  NOEXCP		.excp = NO_EXCP
55 #define  BITCLR(x)	.mask = x, .result = 0
56 #define  BITSET(x)	.mask = x, .result = x
57 #define  MCGMASK(x, y)	.mcgmask = x, .mcgres = y
58 #define  MASK(x, y)	.mask = x, .result = y
59 #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
60 #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
61 #define	MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
62 
63 	MCESEV(
64 		NO, "Invalid",
65 		BITCLR(MCI_STATUS_VAL)
66 		),
67 	MCESEV(
68 		NO, "Not enabled",
69 		EXCP, BITCLR(MCI_STATUS_EN)
70 		),
71 	MCESEV(
72 		PANIC, "Processor context corrupt",
73 		BITSET(MCI_STATUS_PCC)
74 		),
75 	/* When MCIP is not set something is very confused */
76 	MCESEV(
77 		PANIC, "MCIP not set in MCA handler",
78 		EXCP, MCGMASK(MCG_STATUS_MCIP, 0)
79 		),
80 	/* Neither return not error IP -- no chance to recover -> PANIC */
81 	MCESEV(
82 		PANIC, "Neither restart nor error IP",
83 		EXCP, MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, 0)
84 		),
85 	MCESEV(
86 		PANIC, "In kernel and no restart IP",
87 		EXCP, KERNEL, MCGMASK(MCG_STATUS_RIPV, 0)
88 		),
89 	MCESEV(
90 		DEFERRED, "Deferred error",
91 		NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
92 		),
93 	MCESEV(
94 		KEEP, "Corrected error",
95 		NOSER, BITCLR(MCI_STATUS_UC)
96 		),
97 
98 	/* ignore OVER for UCNA */
99 	MCESEV(
100 		UCNA, "Uncorrected no action required",
101 		SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
102 		),
103 	MCESEV(
104 		PANIC, "Illegal combination (UCNA with AR=1)",
105 		SER,
106 		MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
107 		),
108 	MCESEV(
109 		KEEP, "Non signalled machine check",
110 		SER, BITCLR(MCI_STATUS_S)
111 		),
112 
113 	MCESEV(
114 		PANIC, "Action required with lost events",
115 		SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR)
116 		),
117 
118 	/* known AR MCACODs: */
119 #ifdef	CONFIG_MEMORY_FAILURE
120 	MCESEV(
121 		KEEP, "Action required but unaffected thread is continuable",
122 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
123 		MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
124 		),
125 	MCESEV(
126 		AR, "Action required: data load error in a user process",
127 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
128 		USER
129 		),
130 	MCESEV(
131 		AR, "Action required: instruction fetch error in a user process",
132 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
133 		USER
134 		),
135 	MCESEV(
136 		PANIC, "Instruction fetch error in kernel",
137 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
138 		KERNEL
139 		),
140 #endif
141 	MCESEV(
142 		PANIC, "Action required: unknown MCACOD",
143 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)
144 		),
145 
146 	/* known AO MCACODs: */
147 	MCESEV(
148 		AO, "Action optional: memory scrubbing error",
149 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB)
150 		),
151 	MCESEV(
152 		AO, "Action optional: last level cache writeback error",
153 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB)
154 		),
155 	MCESEV(
156 		SOME, "Action optional: unknown MCACOD",
157 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S)
158 		),
159 	MCESEV(
160 		SOME, "Action optional with lost events",
161 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_OVER|MCI_UC_S)
162 		),
163 
164 	MCESEV(
165 		PANIC, "Overflowed uncorrected",
166 		BITSET(MCI_STATUS_OVER|MCI_STATUS_UC)
167 		),
168 	MCESEV(
169 		UC, "Uncorrected",
170 		BITSET(MCI_STATUS_UC)
171 		),
172 	MCESEV(
173 		SOME, "No match",
174 		BITSET(0)
175 		)	/* always matches. keep at end */
176 };
177 
178 /*
179  * If mcgstatus indicated that ip/cs on the stack were
180  * no good, then "m->cs" will be zero and we will have
181  * to assume the worst case (IN_KERNEL) as we actually
182  * have no idea what we were executing when the machine
183  * check hit.
184  * If we do have a good "m->cs" (or a faked one in the
185  * case we were executing in VM86 mode) we can use it to
186  * distinguish an exception taken in user from from one
187  * taken in the kernel.
188  */
error_context(struct mce * m)189 static int error_context(struct mce *m)
190 {
191 	return ((m->cs & 3) == 3) ? IN_USER : IN_KERNEL;
192 }
193 
194 /*
195  * See AMD Error Scope Hierarchy table in a newer BKDG. For example
196  * 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
197  */
mce_severity_amd(struct mce * m,int tolerant,char ** msg,bool is_excp)198 static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_excp)
199 {
200 	enum context ctx = error_context(m);
201 
202 	/* Processor Context Corrupt, no need to fumble too much, die! */
203 	if (m->status & MCI_STATUS_PCC)
204 		return MCE_PANIC_SEVERITY;
205 
206 	if (m->status & MCI_STATUS_UC) {
207 
208 		/*
209 		 * On older systems where overflow_recov flag is not present, we
210 		 * should simply panic if an error overflow occurs. If
211 		 * overflow_recov flag is present and set, then software can try
212 		 * to at least kill process to prolong system operation.
213 		 */
214 		if (mce_flags.overflow_recov) {
215 			/* software can try to contain */
216 			if (!(m->mcgstatus & MCG_STATUS_RIPV) && (ctx == IN_KERNEL))
217 				return MCE_PANIC_SEVERITY;
218 
219 			/* kill current process */
220 			return MCE_AR_SEVERITY;
221 		} else {
222 			/* at least one error was not logged */
223 			if (m->status & MCI_STATUS_OVER)
224 				return MCE_PANIC_SEVERITY;
225 		}
226 
227 		/*
228 		 * For any other case, return MCE_UC_SEVERITY so that we log the
229 		 * error and exit #MC handler.
230 		 */
231 		return MCE_UC_SEVERITY;
232 	}
233 
234 	/*
235 	 * deferred error: poll handler catches these and adds to mce_ring so
236 	 * memory-failure can take recovery actions.
237 	 */
238 	if (m->status & MCI_STATUS_DEFERRED)
239 		return MCE_DEFERRED_SEVERITY;
240 
241 	/*
242 	 * corrected error: poll handler catches these and passes responsibility
243 	 * of decoding the error to EDAC
244 	 */
245 	return MCE_KEEP_SEVERITY;
246 }
247 
mce_severity_intel(struct mce * m,int tolerant,char ** msg,bool is_excp)248 static int mce_severity_intel(struct mce *m, int tolerant, char **msg, bool is_excp)
249 {
250 	enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP);
251 	enum context ctx = error_context(m);
252 	struct severity *s;
253 
254 	for (s = severities;; s++) {
255 		if ((m->status & s->mask) != s->result)
256 			continue;
257 		if ((m->mcgstatus & s->mcgmask) != s->mcgres)
258 			continue;
259 		if (s->ser == SER_REQUIRED && !mca_cfg.ser)
260 			continue;
261 		if (s->ser == NO_SER && mca_cfg.ser)
262 			continue;
263 		if (s->context && ctx != s->context)
264 			continue;
265 		if (s->excp && excp != s->excp)
266 			continue;
267 		if (msg)
268 			*msg = s->msg;
269 		s->covered = 1;
270 		if (s->sev >= MCE_UC_SEVERITY && ctx == IN_KERNEL) {
271 			if (panic_on_oops || tolerant < 1)
272 				return MCE_PANIC_SEVERITY;
273 		}
274 		return s->sev;
275 	}
276 }
277 
278 /* Default to mce_severity_intel */
279 int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) =
280 		    mce_severity_intel;
281 
mcheck_vendor_init_severity(void)282 void __init mcheck_vendor_init_severity(void)
283 {
284 	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
285 		mce_severity = mce_severity_amd;
286 }
287 
288 #ifdef CONFIG_DEBUG_FS
s_start(struct seq_file * f,loff_t * pos)289 static void *s_start(struct seq_file *f, loff_t *pos)
290 {
291 	if (*pos >= ARRAY_SIZE(severities))
292 		return NULL;
293 	return &severities[*pos];
294 }
295 
s_next(struct seq_file * f,void * data,loff_t * pos)296 static void *s_next(struct seq_file *f, void *data, loff_t *pos)
297 {
298 	if (++(*pos) >= ARRAY_SIZE(severities))
299 		return NULL;
300 	return &severities[*pos];
301 }
302 
s_stop(struct seq_file * f,void * data)303 static void s_stop(struct seq_file *f, void *data)
304 {
305 }
306 
s_show(struct seq_file * f,void * data)307 static int s_show(struct seq_file *f, void *data)
308 {
309 	struct severity *ser = data;
310 	seq_printf(f, "%d\t%s\n", ser->covered, ser->msg);
311 	return 0;
312 }
313 
314 static const struct seq_operations severities_seq_ops = {
315 	.start	= s_start,
316 	.next	= s_next,
317 	.stop	= s_stop,
318 	.show	= s_show,
319 };
320 
severities_coverage_open(struct inode * inode,struct file * file)321 static int severities_coverage_open(struct inode *inode, struct file *file)
322 {
323 	return seq_open(file, &severities_seq_ops);
324 }
325 
severities_coverage_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)326 static ssize_t severities_coverage_write(struct file *file,
327 					 const char __user *ubuf,
328 					 size_t count, loff_t *ppos)
329 {
330 	int i;
331 	for (i = 0; i < ARRAY_SIZE(severities); i++)
332 		severities[i].covered = 0;
333 	return count;
334 }
335 
336 static const struct file_operations severities_coverage_fops = {
337 	.open		= severities_coverage_open,
338 	.release	= seq_release,
339 	.read		= seq_read,
340 	.write		= severities_coverage_write,
341 	.llseek		= seq_lseek,
342 };
343 
severities_debugfs_init(void)344 static int __init severities_debugfs_init(void)
345 {
346 	struct dentry *dmce, *fsev;
347 
348 	dmce = mce_get_debugfs_dir();
349 	if (!dmce)
350 		goto err_out;
351 
352 	fsev = debugfs_create_file("severities-coverage", 0444, dmce, NULL,
353 				   &severities_coverage_fops);
354 	if (!fsev)
355 		goto err_out;
356 
357 	return 0;
358 
359 err_out:
360 	return -ENOMEM;
361 }
362 late_initcall(severities_debugfs_init);
363 #endif /* CONFIG_DEBUG_FS */
364