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1 /*
2  *  64-bit pSeries and RS/6000 setup code.
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Adapted from 'alpha' version by Gary Thomas
6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
7  *  Modified by PPC64 Team, IBM Corp
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License
11  * as published by the Free Software Foundation; either version
12  * 2 of the License, or (at your option) any later version.
13  */
14 
15 /*
16  * bootup setup stuff..
17  */
18 
19 #include <linux/cpu.h>
20 #include <linux/errno.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
23 #include <linux/mm.h>
24 #include <linux/stddef.h>
25 #include <linux/unistd.h>
26 #include <linux/user.h>
27 #include <linux/tty.h>
28 #include <linux/major.h>
29 #include <linux/interrupt.h>
30 #include <linux/reboot.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/console.h>
34 #include <linux/pci.h>
35 #include <linux/utsname.h>
36 #include <linux/adb.h>
37 #include <linux/export.h>
38 #include <linux/delay.h>
39 #include <linux/irq.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42 #include <linux/of.h>
43 #include <linux/of_pci.h>
44 #include <linux/kexec.h>
45 
46 #include <asm/mmu.h>
47 #include <asm/processor.h>
48 #include <asm/io.h>
49 #include <asm/pgtable.h>
50 #include <asm/prom.h>
51 #include <asm/rtas.h>
52 #include <asm/pci-bridge.h>
53 #include <asm/iommu.h>
54 #include <asm/dma.h>
55 #include <asm/machdep.h>
56 #include <asm/irq.h>
57 #include <asm/time.h>
58 #include <asm/nvram.h>
59 #include <asm/pmc.h>
60 #include <asm/mpic.h>
61 #include <asm/xics.h>
62 #include <asm/ppc-pci.h>
63 #include <asm/i8259.h>
64 #include <asm/udbg.h>
65 #include <asm/smp.h>
66 #include <asm/firmware.h>
67 #include <asm/eeh.h>
68 #include <asm/reg.h>
69 #include <asm/plpar_wrappers.h>
70 #include <asm/security_features.h>
71 
72 #include "pseries.h"
73 
74 int CMO_PrPSP = -1;
75 int CMO_SecPSP = -1;
76 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
77 EXPORT_SYMBOL(CMO_PageSize);
78 
79 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
80 
81 static struct device_node *pSeries_mpic_node;
82 
pSeries_show_cpuinfo(struct seq_file * m)83 static void pSeries_show_cpuinfo(struct seq_file *m)
84 {
85 	struct device_node *root;
86 	const char *model = "";
87 
88 	root = of_find_node_by_path("/");
89 	if (root)
90 		model = of_get_property(root, "model", NULL);
91 	seq_printf(m, "machine\t\t: CHRP %s\n", model);
92 	of_node_put(root);
93 }
94 
95 /* Initialize firmware assisted non-maskable interrupts if
96  * the firmware supports this feature.
97  */
fwnmi_init(void)98 static void __init fwnmi_init(void)
99 {
100 	unsigned long system_reset_addr, machine_check_addr;
101 
102 	int ibm_nmi_register = rtas_token("ibm,nmi-register");
103 	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
104 		return;
105 
106 	/* If the kernel's not linked at zero we point the firmware at low
107 	 * addresses anyway, and use a trampoline to get to the real code. */
108 	system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
109 	machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
110 
111 	if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
112 				machine_check_addr))
113 		fwnmi_active = 1;
114 }
115 
pseries_8259_cascade(struct irq_desc * desc)116 static void pseries_8259_cascade(struct irq_desc *desc)
117 {
118 	struct irq_chip *chip = irq_desc_get_chip(desc);
119 	unsigned int cascade_irq = i8259_irq();
120 
121 	if (cascade_irq != NO_IRQ)
122 		generic_handle_irq(cascade_irq);
123 
124 	chip->irq_eoi(&desc->irq_data);
125 }
126 
pseries_setup_i8259_cascade(void)127 static void __init pseries_setup_i8259_cascade(void)
128 {
129 	struct device_node *np, *old, *found = NULL;
130 	unsigned int cascade;
131 	const u32 *addrp;
132 	unsigned long intack = 0;
133 	int naddr;
134 
135 	for_each_node_by_type(np, "interrupt-controller") {
136 		if (of_device_is_compatible(np, "chrp,iic")) {
137 			found = np;
138 			break;
139 		}
140 	}
141 
142 	if (found == NULL) {
143 		printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
144 		return;
145 	}
146 
147 	cascade = irq_of_parse_and_map(found, 0);
148 	if (cascade == NO_IRQ) {
149 		printk(KERN_ERR "pic: failed to map cascade interrupt");
150 		return;
151 	}
152 	pr_debug("pic: cascade mapped to irq %d\n", cascade);
153 
154 	for (old = of_node_get(found); old != NULL ; old = np) {
155 		np = of_get_parent(old);
156 		of_node_put(old);
157 		if (np == NULL)
158 			break;
159 		if (strcmp(np->name, "pci") != 0)
160 			continue;
161 		addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
162 		if (addrp == NULL)
163 			continue;
164 		naddr = of_n_addr_cells(np);
165 		intack = addrp[naddr-1];
166 		if (naddr > 1)
167 			intack |= ((unsigned long)addrp[naddr-2]) << 32;
168 	}
169 	if (intack)
170 		printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
171 	i8259_init(found, intack);
172 	of_node_put(found);
173 	irq_set_chained_handler(cascade, pseries_8259_cascade);
174 }
175 
pseries_mpic_init_IRQ(void)176 static void __init pseries_mpic_init_IRQ(void)
177 {
178 	struct device_node *np;
179 	const unsigned int *opprop;
180 	unsigned long openpic_addr = 0;
181 	int naddr, n, i, opplen;
182 	struct mpic *mpic;
183 
184 	np = of_find_node_by_path("/");
185 	naddr = of_n_addr_cells(np);
186 	opprop = of_get_property(np, "platform-open-pic", &opplen);
187 	if (opprop != NULL) {
188 		openpic_addr = of_read_number(opprop, naddr);
189 		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
190 	}
191 	of_node_put(np);
192 
193 	BUG_ON(openpic_addr == 0);
194 
195 	/* Setup the openpic driver */
196 	mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
197 			MPIC_NO_RESET, 16, 0, " MPIC     ");
198 	BUG_ON(mpic == NULL);
199 
200 	/* Add ISUs */
201 	opplen /= sizeof(u32);
202 	for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
203 		unsigned long isuaddr = of_read_number(opprop + i, naddr);
204 		mpic_assign_isu(mpic, n, isuaddr);
205 	}
206 
207 	/* Setup top-level get_irq */
208 	ppc_md.get_irq = mpic_get_irq;
209 
210 	/* All ISUs are setup, complete initialization */
211 	mpic_init(mpic);
212 
213 	/* Look for cascade */
214 	pseries_setup_i8259_cascade();
215 }
216 
pseries_xics_init_IRQ(void)217 static void __init pseries_xics_init_IRQ(void)
218 {
219 	xics_init();
220 	pseries_setup_i8259_cascade();
221 }
222 
pseries_lpar_enable_pmcs(void)223 static void pseries_lpar_enable_pmcs(void)
224 {
225 	unsigned long set, reset;
226 
227 	set = 1UL << 63;
228 	reset = 0;
229 	plpar_hcall_norets(H_PERFMON, set, reset);
230 }
231 
pseries_discover_pic(void)232 static void __init pseries_discover_pic(void)
233 {
234 	struct device_node *np;
235 	const char *typep;
236 
237 	for_each_node_by_name(np, "interrupt-controller") {
238 		typep = of_get_property(np, "compatible", NULL);
239 		if (strstr(typep, "open-pic")) {
240 			pSeries_mpic_node = of_node_get(np);
241 			ppc_md.init_IRQ       = pseries_mpic_init_IRQ;
242 			setup_kexec_cpu_down_mpic();
243 			smp_init_pseries_mpic();
244 			return;
245 		} else if (strstr(typep, "ppc-xicp")) {
246 			ppc_md.init_IRQ       = pseries_xics_init_IRQ;
247 			setup_kexec_cpu_down_xics();
248 			smp_init_pseries_xics();
249 			return;
250 		}
251 	}
252 	printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
253 	       " interrupt-controller\n");
254 }
255 
pci_dn_reconfig_notifier(struct notifier_block * nb,unsigned long action,void * data)256 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
257 {
258 	struct of_reconfig_data *rd = data;
259 	struct device_node *parent, *np = rd->dn;
260 	struct pci_dn *pdn;
261 	int err = NOTIFY_OK;
262 
263 	switch (action) {
264 	case OF_RECONFIG_ATTACH_NODE:
265 		parent = of_get_parent(np);
266 		pdn = parent ? PCI_DN(parent) : NULL;
267 		if (pdn) {
268 			/* Create pdn and EEH device */
269 			update_dn_pci_info(np, pdn->phb);
270 			eeh_dev_init(PCI_DN(np), pdn->phb);
271 		}
272 
273 		of_node_put(parent);
274 		break;
275 	case OF_RECONFIG_DETACH_NODE:
276 		pdn = PCI_DN(np);
277 		if (pdn)
278 			list_del(&pdn->list);
279 		break;
280 	default:
281 		err = NOTIFY_DONE;
282 		break;
283 	}
284 	return err;
285 }
286 
287 static struct notifier_block pci_dn_reconfig_nb = {
288 	.notifier_call = pci_dn_reconfig_notifier,
289 };
290 
291 struct kmem_cache *dtl_cache;
292 
293 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
294 /*
295  * Allocate space for the dispatch trace log for all possible cpus
296  * and register the buffers with the hypervisor.  This is used for
297  * computing time stolen by the hypervisor.
298  */
alloc_dispatch_logs(void)299 static int alloc_dispatch_logs(void)
300 {
301 	int cpu, ret;
302 	struct paca_struct *pp;
303 	struct dtl_entry *dtl;
304 
305 	if (!firmware_has_feature(FW_FEATURE_SPLPAR))
306 		return 0;
307 
308 	if (!dtl_cache)
309 		return 0;
310 
311 	for_each_possible_cpu(cpu) {
312 		pp = &paca[cpu];
313 		dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
314 		if (!dtl) {
315 			pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
316 				cpu);
317 			pr_warn("Stolen time statistics will be unreliable\n");
318 			break;
319 		}
320 
321 		pp->dtl_ridx = 0;
322 		pp->dispatch_log = dtl;
323 		pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
324 		pp->dtl_curr = dtl;
325 	}
326 
327 	/* Register the DTL for the current (boot) cpu */
328 	dtl = get_paca()->dispatch_log;
329 	get_paca()->dtl_ridx = 0;
330 	get_paca()->dtl_curr = dtl;
331 	get_paca()->lppaca_ptr->dtl_idx = 0;
332 
333 	/* hypervisor reads buffer length from this field */
334 	dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
335 	ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
336 	if (ret)
337 		pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
338 		       "with %d\n", smp_processor_id(),
339 		       hard_smp_processor_id(), ret);
340 	get_paca()->lppaca_ptr->dtl_enable_mask = 2;
341 
342 	return 0;
343 }
344 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
alloc_dispatch_logs(void)345 static inline int alloc_dispatch_logs(void)
346 {
347 	return 0;
348 }
349 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
350 
alloc_dispatch_log_kmem_cache(void)351 static int alloc_dispatch_log_kmem_cache(void)
352 {
353 	dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
354 						DISPATCH_LOG_BYTES, 0, NULL);
355 	if (!dtl_cache) {
356 		pr_warn("Failed to create dispatch trace log buffer cache\n");
357 		pr_warn("Stolen time statistics will be unreliable\n");
358 		return 0;
359 	}
360 
361 	return alloc_dispatch_logs();
362 }
363 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
364 
pseries_lpar_idle(void)365 static void pseries_lpar_idle(void)
366 {
367 	/*
368 	 * Default handler to go into low thread priority and possibly
369 	 * low power mode by cedeing processor to hypervisor
370 	 */
371 
372 	if (!prep_irq_for_idle())
373 		return;
374 
375 	/* Indicate to hypervisor that we are idle. */
376 	get_lppaca()->idle = 1;
377 
378 	/*
379 	 * Yield the processor to the hypervisor.  We return if
380 	 * an external interrupt occurs (which are driven prior
381 	 * to returning here) or if a prod occurs from another
382 	 * processor. When returning here, external interrupts
383 	 * are enabled.
384 	 */
385 	cede_processor();
386 
387 	get_lppaca()->idle = 0;
388 }
389 
390 /*
391  * Enable relocation on during exceptions. This has partition wide scope and
392  * may take a while to complete, if it takes longer than one second we will
393  * just give up rather than wasting any more time on this - if that turns out
394  * to ever be a problem in practice we can move this into a kernel thread to
395  * finish off the process later in boot.
396  */
pSeries_enable_reloc_on_exc(void)397 long pSeries_enable_reloc_on_exc(void)
398 {
399 	long rc;
400 	unsigned int delay, total_delay = 0;
401 
402 	while (1) {
403 		rc = enable_reloc_on_exceptions();
404 		if (!H_IS_LONG_BUSY(rc))
405 			return rc;
406 
407 		delay = get_longbusy_msecs(rc);
408 		total_delay += delay;
409 		if (total_delay > 1000) {
410 			pr_warn("Warning: Giving up waiting to enable "
411 				"relocation on exceptions (%u msec)!\n",
412 				total_delay);
413 			return rc;
414 		}
415 
416 		mdelay(delay);
417 	}
418 }
419 EXPORT_SYMBOL(pSeries_enable_reloc_on_exc);
420 
pSeries_disable_reloc_on_exc(void)421 long pSeries_disable_reloc_on_exc(void)
422 {
423 	long rc;
424 
425 	while (1) {
426 		rc = disable_reloc_on_exceptions();
427 		if (!H_IS_LONG_BUSY(rc))
428 			return rc;
429 		mdelay(get_longbusy_msecs(rc));
430 	}
431 }
432 EXPORT_SYMBOL(pSeries_disable_reloc_on_exc);
433 
434 #ifdef CONFIG_KEXEC
pSeries_machine_kexec(struct kimage * image)435 static void pSeries_machine_kexec(struct kimage *image)
436 {
437 	long rc;
438 
439 	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
440 		rc = pSeries_disable_reloc_on_exc();
441 		if (rc != H_SUCCESS)
442 			pr_warning("Warning: Failed to disable relocation on "
443 				   "exceptions: %ld\n", rc);
444 	}
445 
446 	default_machine_kexec(image);
447 }
448 #endif
449 
450 #ifdef __LITTLE_ENDIAN__
pseries_big_endian_exceptions(void)451 long pseries_big_endian_exceptions(void)
452 {
453 	long rc;
454 
455 	while (1) {
456 		rc = enable_big_endian_exceptions();
457 		if (!H_IS_LONG_BUSY(rc))
458 			return rc;
459 		mdelay(get_longbusy_msecs(rc));
460 	}
461 }
462 
pseries_little_endian_exceptions(void)463 static long pseries_little_endian_exceptions(void)
464 {
465 	long rc;
466 
467 	while (1) {
468 		rc = enable_little_endian_exceptions();
469 		if (!H_IS_LONG_BUSY(rc))
470 			return rc;
471 		mdelay(get_longbusy_msecs(rc));
472 	}
473 }
474 #endif
475 
find_and_init_phbs(void)476 static void __init find_and_init_phbs(void)
477 {
478 	struct device_node *node;
479 	struct pci_controller *phb;
480 	struct device_node *root = of_find_node_by_path("/");
481 
482 	for_each_child_of_node(root, node) {
483 		if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
484 					   strcmp(node->type, "pciex") != 0))
485 			continue;
486 
487 		phb = pcibios_alloc_controller(node);
488 		if (!phb)
489 			continue;
490 		rtas_setup_phb(phb);
491 		pci_process_bridge_OF_ranges(phb, node, 0);
492 		isa_bridge_find_early(phb);
493 		phb->controller_ops = pseries_pci_controller_ops;
494 	}
495 
496 	of_node_put(root);
497 	pci_devs_phb_init();
498 
499 	/*
500 	 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
501 	 * in chosen.
502 	 */
503 	of_pci_check_probe_only();
504 }
505 
init_cpu_char_feature_flags(struct h_cpu_char_result * result)506 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
507 {
508 	/*
509 	 * The features below are disabled by default, so we instead look to see
510 	 * if firmware has *enabled* them, and set them if so.
511 	 */
512 	if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
513 		security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
514 
515 	if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
516 		security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
517 
518 	if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
519 		security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
520 
521 	if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
522 		security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
523 
524 	if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
525 		security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
526 
527 	if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
528 		security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
529 
530 	if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
531 		security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
532 
533 	if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
534 		security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
535 
536 	/*
537 	 * The features below are enabled by default, so we instead look to see
538 	 * if firmware has *disabled* them, and clear them if so.
539 	 */
540 	if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
541 		security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
542 
543 	if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
544 		security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
545 
546 	if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
547 		security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
548 }
549 
pseries_setup_rfi_flush(void)550 void pseries_setup_rfi_flush(void)
551 {
552 	struct h_cpu_char_result result;
553 	enum l1d_flush_type types;
554 	bool enable;
555 	long rc;
556 
557 	/*
558 	 * Set features to the defaults assumed by init_cpu_char_feature_flags()
559 	 * so it can set/clear again any features that might have changed after
560 	 * migration, and in case the hypercall fails and it is not even called.
561 	 */
562 	powerpc_security_features = SEC_FTR_DEFAULT;
563 
564 	rc = plpar_get_cpu_characteristics(&result);
565 	if (rc == H_SUCCESS)
566 		init_cpu_char_feature_flags(&result);
567 
568 	/*
569 	 * We're the guest so this doesn't apply to us, clear it to simplify
570 	 * handling of it elsewhere.
571 	 */
572 	security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
573 
574 	types = L1D_FLUSH_FALLBACK;
575 
576 	if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
577 		types |= L1D_FLUSH_MTTRIG;
578 
579 	if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
580 		types |= L1D_FLUSH_ORI;
581 
582 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
583 		 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
584 
585 	setup_rfi_flush(types, enable);
586 	setup_count_cache_flush();
587 
588 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
589 		 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
590 	setup_entry_flush(enable);
591 
592 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
593 		 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
594 	setup_uaccess_flush(enable);
595 }
596 
pSeries_setup_arch(void)597 static void __init pSeries_setup_arch(void)
598 {
599 	set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
600 
601 	/* Discover PIC type and setup ppc_md accordingly */
602 	pseries_discover_pic();
603 
604 	/* openpic global configuration register (64-bit format). */
605 	/* openpic Interrupt Source Unit pointer (64-bit format). */
606 	/* python0 facility area (mmio) (64-bit format) REAL address. */
607 
608 	/* init to some ~sane value until calibrate_delay() runs */
609 	loops_per_jiffy = 50000000;
610 
611 	fwnmi_init();
612 
613 	pseries_setup_rfi_flush();
614 	setup_stf_barrier();
615 
616 	/* By default, only probe PCI (can be overridden by rtas_pci) */
617 	pci_add_flags(PCI_PROBE_ONLY);
618 
619 	/* Find and initialize PCI host bridges */
620 	init_pci_config_tokens();
621 	find_and_init_phbs();
622 	of_reconfig_notifier_register(&pci_dn_reconfig_nb);
623 
624 	pSeries_nvram_init();
625 
626 	if (firmware_has_feature(FW_FEATURE_LPAR)) {
627 		vpa_init(boot_cpuid);
628 		ppc_md.power_save = pseries_lpar_idle;
629 		ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
630 	} else {
631 		/* No special idle routine */
632 		ppc_md.enable_pmcs = power4_enable_pmcs;
633 	}
634 
635 	ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
636 
637 	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
638 		long rc;
639 
640 		rc = pSeries_enable_reloc_on_exc();
641 		if (rc == H_P2) {
642 			pr_info("Relocation on exceptions not supported\n");
643 		} else if (rc != H_SUCCESS) {
644 			pr_warn("Unable to enable relocation on exceptions: "
645 				"%ld\n", rc);
646 		}
647 	}
648 }
649 
pSeries_init_panel(void)650 static int __init pSeries_init_panel(void)
651 {
652 	/* Manually leave the kernel version on the panel. */
653 #ifdef __BIG_ENDIAN__
654 	ppc_md.progress("Linux ppc64\n", 0);
655 #else
656 	ppc_md.progress("Linux ppc64le\n", 0);
657 #endif
658 	ppc_md.progress(init_utsname()->version, 0);
659 
660 	return 0;
661 }
662 machine_arch_initcall(pseries, pSeries_init_panel);
663 
pseries_set_dabr(unsigned long dabr,unsigned long dabrx)664 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
665 {
666 	return plpar_hcall_norets(H_SET_DABR, dabr);
667 }
668 
pseries_set_xdabr(unsigned long dabr,unsigned long dabrx)669 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
670 {
671 	/* Have to set at least one bit in the DABRX according to PAPR */
672 	if (dabrx == 0 && dabr == 0)
673 		dabrx = DABRX_USER;
674 	/* PAPR says we can only set kernel and user bits */
675 	dabrx &= DABRX_KERNEL | DABRX_USER;
676 
677 	return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
678 }
679 
pseries_set_dawr(unsigned long dawr,unsigned long dawrx)680 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
681 {
682 	/* PAPR says we can't set HYP */
683 	dawrx &= ~DAWRX_HYP;
684 
685 	return  plapr_set_watchpoint0(dawr, dawrx);
686 }
687 
688 #define CMO_CHARACTERISTICS_TOKEN 44
689 #define CMO_MAXLENGTH 1026
690 
pSeries_coalesce_init(void)691 void pSeries_coalesce_init(void)
692 {
693 	struct hvcall_mpp_x_data mpp_x_data;
694 
695 	if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
696 		powerpc_firmware_features |= FW_FEATURE_XCMO;
697 	else
698 		powerpc_firmware_features &= ~FW_FEATURE_XCMO;
699 }
700 
701 /**
702  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
703  * handle that here. (Stolen from parse_system_parameter_string)
704  */
pSeries_cmo_feature_init(void)705 static void pSeries_cmo_feature_init(void)
706 {
707 	char *ptr, *key, *value, *end;
708 	int call_status;
709 	int page_order = IOMMU_PAGE_SHIFT_4K;
710 
711 	pr_debug(" -> fw_cmo_feature_init()\n");
712 	spin_lock(&rtas_data_buf_lock);
713 	memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
714 	call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
715 				NULL,
716 				CMO_CHARACTERISTICS_TOKEN,
717 				__pa(rtas_data_buf),
718 				RTAS_DATA_BUF_SIZE);
719 
720 	if (call_status != 0) {
721 		spin_unlock(&rtas_data_buf_lock);
722 		pr_debug("CMO not available\n");
723 		pr_debug(" <- fw_cmo_feature_init()\n");
724 		return;
725 	}
726 
727 	end = rtas_data_buf + CMO_MAXLENGTH - 2;
728 	ptr = rtas_data_buf + 2;	/* step over strlen value */
729 	key = value = ptr;
730 
731 	while (*ptr && (ptr <= end)) {
732 		/* Separate the key and value by replacing '=' with '\0' and
733 		 * point the value at the string after the '='
734 		 */
735 		if (ptr[0] == '=') {
736 			ptr[0] = '\0';
737 			value = ptr + 1;
738 		} else if (ptr[0] == '\0' || ptr[0] == ',') {
739 			/* Terminate the string containing the key/value pair */
740 			ptr[0] = '\0';
741 
742 			if (key == value) {
743 				pr_debug("Malformed key/value pair\n");
744 				/* Never found a '=', end processing */
745 				break;
746 			}
747 
748 			if (0 == strcmp(key, "CMOPageSize"))
749 				page_order = simple_strtol(value, NULL, 10);
750 			else if (0 == strcmp(key, "PrPSP"))
751 				CMO_PrPSP = simple_strtol(value, NULL, 10);
752 			else if (0 == strcmp(key, "SecPSP"))
753 				CMO_SecPSP = simple_strtol(value, NULL, 10);
754 			value = key = ptr + 1;
755 		}
756 		ptr++;
757 	}
758 
759 	/* Page size is returned as the power of 2 of the page size,
760 	 * convert to the page size in bytes before returning
761 	 */
762 	CMO_PageSize = 1 << page_order;
763 	pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
764 
765 	if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
766 		pr_info("CMO enabled\n");
767 		pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
768 		         CMO_SecPSP);
769 		powerpc_firmware_features |= FW_FEATURE_CMO;
770 		pSeries_coalesce_init();
771 	} else
772 		pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
773 		         CMO_SecPSP);
774 	spin_unlock(&rtas_data_buf_lock);
775 	pr_debug(" <- fw_cmo_feature_init()\n");
776 }
777 
778 /*
779  * Early initialization.  Relocation is on but do not reference unbolted pages
780  */
pSeries_init_early(void)781 static void __init pSeries_init_early(void)
782 {
783 	pr_debug(" -> pSeries_init_early()\n");
784 
785 #ifdef CONFIG_HVC_CONSOLE
786 	if (firmware_has_feature(FW_FEATURE_LPAR))
787 		hvc_vio_init_early();
788 #endif
789 	if (firmware_has_feature(FW_FEATURE_XDABR))
790 		ppc_md.set_dabr = pseries_set_xdabr;
791 	else if (firmware_has_feature(FW_FEATURE_DABR))
792 		ppc_md.set_dabr = pseries_set_dabr;
793 
794 	if (firmware_has_feature(FW_FEATURE_SET_MODE))
795 		ppc_md.set_dawr = pseries_set_dawr;
796 
797 	pSeries_cmo_feature_init();
798 	iommu_init_early_pSeries();
799 
800 	pr_debug(" <- pSeries_init_early()\n");
801 }
802 
803 /**
804  * pseries_power_off - tell firmware about how to power off the system.
805  *
806  * This function calls either the power-off rtas token in normal cases
807  * or the ibm,power-off-ups token (if present & requested) in case of
808  * a power failure. If power-off token is used, power on will only be
809  * possible with power button press. If ibm,power-off-ups token is used
810  * it will allow auto poweron after power is restored.
811  */
pseries_power_off(void)812 static void pseries_power_off(void)
813 {
814 	int rc;
815 	int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
816 
817 	if (rtas_flash_term_hook)
818 		rtas_flash_term_hook(SYS_POWER_OFF);
819 
820 	if (rtas_poweron_auto == 0 ||
821 		rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
822 		rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
823 		printk(KERN_INFO "RTAS power-off returned %d\n", rc);
824 	} else {
825 		rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
826 		printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
827 	}
828 	for (;;);
829 }
830 
831 /*
832  * Called very early, MMU is off, device-tree isn't unflattened
833  */
834 
pseries_probe_fw_features(unsigned long node,const char * uname,int depth,void * data)835 static int __init pseries_probe_fw_features(unsigned long node,
836 					    const char *uname, int depth,
837 					    void *data)
838 {
839 	const char *prop;
840 	int len;
841 	static int hypertas_found;
842 	static int vec5_found;
843 
844 	if (depth != 1)
845 		return 0;
846 
847 	if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) {
848 		prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions",
849 					   &len);
850 		if (prop) {
851 			powerpc_firmware_features |= FW_FEATURE_LPAR;
852 			fw_hypertas_feature_init(prop, len);
853 		}
854 
855 		hypertas_found = 1;
856 	}
857 
858 	if (!strcmp(uname, "chosen")) {
859 		prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5",
860 					   &len);
861 		if (prop)
862 			fw_vec5_feature_init(prop, len);
863 
864 		vec5_found = 1;
865 	}
866 
867 	return hypertas_found && vec5_found;
868 }
869 
pSeries_probe(void)870 static int __init pSeries_probe(void)
871 {
872 	unsigned long root = of_get_flat_dt_root();
873 	const char *dtype = of_get_flat_dt_prop(root, "device_type", NULL);
874 
875  	if (dtype == NULL)
876  		return 0;
877  	if (strcmp(dtype, "chrp"))
878 		return 0;
879 
880 	/* Cell blades firmware claims to be chrp while it's not. Until this
881 	 * is fixed, we need to avoid those here.
882 	 */
883 	if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
884 	    of_flat_dt_is_compatible(root, "IBM,CBEA"))
885 		return 0;
886 
887 	pr_debug("pSeries detected, looking for LPAR capability...\n");
888 
889 	/* Now try to figure out if we are running on LPAR */
890 	of_scan_flat_dt(pseries_probe_fw_features, NULL);
891 
892 #ifdef __LITTLE_ENDIAN__
893 	if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
894 		long rc;
895 		/*
896 		 * Tell the hypervisor that we want our exceptions to
897 		 * be taken in little endian mode. If this fails we don't
898 		 * want to use BUG() because it will trigger an exception.
899 		 */
900 		rc = pseries_little_endian_exceptions();
901 		if (rc) {
902 			ppc_md.progress("H_SET_MODE LE exception fail", 0);
903 			panic("Could not enable little endian exceptions");
904 		}
905 	}
906 #endif
907 
908 	if (firmware_has_feature(FW_FEATURE_LPAR))
909 		hpte_init_lpar();
910 	else
911 		hpte_init_native();
912 
913 	pm_power_off = pseries_power_off;
914 
915 	pr_debug("Machine is%s LPAR !\n",
916 	         (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
917 
918 	return 1;
919 }
920 
pSeries_pci_probe_mode(struct pci_bus * bus)921 static int pSeries_pci_probe_mode(struct pci_bus *bus)
922 {
923 	if (firmware_has_feature(FW_FEATURE_LPAR))
924 		return PCI_PROBE_DEVTREE;
925 	return PCI_PROBE_NORMAL;
926 }
927 
928 struct pci_controller_ops pseries_pci_controller_ops = {
929 	.probe_mode		= pSeries_pci_probe_mode,
930 };
931 
define_machine(pseries)932 define_machine(pseries) {
933 	.name			= "pSeries",
934 	.probe			= pSeries_probe,
935 	.setup_arch		= pSeries_setup_arch,
936 	.init_early		= pSeries_init_early,
937 	.show_cpuinfo		= pSeries_show_cpuinfo,
938 	.log_error		= pSeries_log_error,
939 	.pcibios_fixup		= pSeries_final_fixup,
940 	.restart		= rtas_restart,
941 	.halt			= rtas_halt,
942 	.panic			= rtas_os_term,
943 	.get_boot_time		= rtas_get_boot_time,
944 	.get_rtc_time		= rtas_get_rtc_time,
945 	.set_rtc_time		= rtas_set_rtc_time,
946 	.calibrate_decr		= generic_calibrate_decr,
947 	.progress		= rtas_progress,
948 	.system_reset_exception = pSeries_system_reset_exception,
949 	.machine_check_exception = pSeries_machine_check_exception,
950 #ifdef CONFIG_KEXEC
951 	.machine_kexec          = pSeries_machine_kexec,
952 #endif
953 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
954 	.memory_block_size	= pseries_memory_block_size,
955 #endif
956 };
957