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Searched defs:EBIU_SDRRC (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h178 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h213 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h212 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h289 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h189 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h184 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro