1 /* MN10300 On-board interrupt controller registers 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11 #ifndef _ASM_INTCTL_REGS_H 12 #define _ASM_INTCTL_REGS_H 13 14 #include <asm/cpu-regs.h> 15 16 #ifdef __KERNEL__ 17 18 /* 19 * Interrupt controller registers 20 * - Registers 64-191 are at addresses offset from the main array 21 */ 22 #define GxICR(X) \ 23 __SYSREG(0xd4000000 + (X) * 4 + \ 24 (((X) >= 64) && ((X) < 192)) * 0xf00, u16) 25 26 #define GxICR_u8(X) \ 27 __SYSREG(0xd4000000 + (X) * 4 + \ 28 (((X) >= 64) && ((X) < 192)) * 0xf00, u8) 29 30 #include <proc/intctl-regs.h> 31 32 #define XIRQ_TRIGGER_LOWLEVEL 0 33 #define XIRQ_TRIGGER_HILEVEL 1 34 #define XIRQ_TRIGGER_NEGEDGE 2 35 #define XIRQ_TRIGGER_POSEDGE 3 36 37 /* non-maskable interrupt control */ 38 #define NMIIRQ 0 39 #define NMICR GxICR(NMIIRQ) /* NMI control register */ 40 #define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */ 41 #define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */ 42 #define NMICR_ABUSERR 0x0008 /* async bus error flag */ 43 44 /* maskable interrupt control */ 45 #define GxICR_DETECT 0x0001 /* interrupt detect flag */ 46 #define GxICR_REQUEST 0x0010 /* interrupt request flag */ 47 #define GxICR_ENABLE 0x0100 /* interrupt enable flag */ 48 #define GxICR_LEVEL 0x7000 /* interrupt priority level */ 49 #define GxICR_LEVEL_0 0x0000 /* - level 0 */ 50 #define GxICR_LEVEL_1 0x1000 /* - level 1 */ 51 #define GxICR_LEVEL_2 0x2000 /* - level 2 */ 52 #define GxICR_LEVEL_3 0x3000 /* - level 3 */ 53 #define GxICR_LEVEL_4 0x4000 /* - level 4 */ 54 #define GxICR_LEVEL_5 0x5000 /* - level 5 */ 55 #define GxICR_LEVEL_6 0x6000 /* - level 6 */ 56 #define GxICR_LEVEL_SHIFT 12 57 #define GxICR_NMI 0x8000 /* nmi request flag */ 58 59 #define NUM2GxICR_LEVEL(num) ((num) << GxICR_LEVEL_SHIFT) 60 61 #ifndef __ASSEMBLY__ 62 extern void set_intr_level(int irq, u16 level); 63 extern void mn10300_set_lateack_irq_type(int irq); 64 #endif 65 66 /* external interrupts */ 67 #define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */ 68 69 #endif /* __KERNEL__ */ 70 71 #endif /* _ASM_INTCTL_REGS_H */ 72