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1 #ifndef __ASM_SH_SE7724_H
2 #define __ASM_SH_SE7724_H
3 
4 /*
5  * linux/include/asm-sh/se7724.h
6  *
7  * Copyright (C) 2009 Renesas Solutions Corp.
8  *
9  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
10  *
11  * Hitachi UL SolutionEngine 7724 Support.
12  *
13  * Based on se7722.h
14  * Copyright (C) 2007  Nobuhiro Iwamatsu
15  *
16  * This file is subject to the terms and conditions of the GNU General Public
17  * License.  See the file "COPYING" in the main directory of this archive
18  * for more details.
19  *
20  */
21 #include <linux/sh_intc.h>
22 #include <asm/addrspace.h>
23 
24 /* SH Eth */
25 #define SH_ETH_ADDR	(0xA4600000)
26 #define SH_ETH_MAHR	(SH_ETH_ADDR + 0x1C0)
27 #define SH_ETH_MALR	(SH_ETH_ADDR + 0x1C8)
28 
29 #define PA_LED		(0xba203000)	/* 8bit LED */
30 #define IRQ_MODE	(0xba200010)
31 #define IRQ0_SR		(0xba200014)
32 #define IRQ1_SR		(0xba200018)
33 #define IRQ2_SR		(0xba20001c)
34 #define IRQ0_MR		(0xba200020)
35 #define IRQ1_MR		(0xba200024)
36 #define IRQ2_MR		(0xba200028)
37 
38 /* IRQ */
39 #define IRQ0_IRQ        evt2irq(0x600)
40 #define IRQ1_IRQ        evt2irq(0x620)
41 #define IRQ2_IRQ        evt2irq(0x640)
42 
43 /* Bits in IRQ012 registers */
44 #define SE7724_FPGA_IRQ_BASE	220
45 
46 /* IRQ0 */
47 #define IRQ0_BASE	SE7724_FPGA_IRQ_BASE
48 #define IRQ0_KEY	(IRQ0_BASE + 12)
49 #define IRQ0_RMII	(IRQ0_BASE + 13)
50 #define IRQ0_SMC	(IRQ0_BASE + 14)
51 #define IRQ0_MASK	0x7fff
52 #define IRQ0_END	IRQ0_SMC
53 /* IRQ1 */
54 #define IRQ1_BASE	(IRQ0_END + 1)
55 #define IRQ1_TS		(IRQ1_BASE + 0)
56 #define IRQ1_MASK	0x0001
57 #define IRQ1_END	IRQ1_TS
58 /* IRQ2 */
59 #define IRQ2_BASE	(IRQ1_END + 1)
60 #define IRQ2_USB0	(IRQ1_BASE + 0)
61 #define IRQ2_USB1	(IRQ1_BASE + 1)
62 #define IRQ2_MASK	0x0003
63 #define IRQ2_END	IRQ2_USB1
64 
65 #define SE7724_FPGA_IRQ_NR	(IRQ2_END - IRQ0_BASE)
66 
67 /* arch/sh/boards/se/7724/irq.c */
68 void init_se7724_IRQ(void);
69 
70 #define __IO_PREFIX		se7724
71 #include <asm/io_generic.h>
72 
73 #endif  /* __ASM_SH_SE7724_H */
74