| /arch/frv/include/asm/ |
| D | serial-regs.h | 24 #define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0) argument
25 #define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0) argument
30 #define __set_UART0_IER(V) __set_UART0(UART_IER,(V)) argument
31 #define __set_UART1_IER(V) __set_UART1(UART_IER,(V)) argument
35 #define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0) argument
41 #define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0) argument
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| D | busctl-regs.h | 24 #define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0) argument
25 #define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0) argument
26 #define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0) argument
27 #define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0) argument
28 #define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0) argument
29 #define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0) argument
30 #define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0) argument
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| D | timer-regs.h | 51 #define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0) argument
52 #define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0) argument
53 #define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0) argument
54 #define __set_TCSR(T,V) \ argument
57 #define __set_TxCKSL(T,V) \ argument
60 #define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24) argument
61 #define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V))) argument
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| D | irc-regs.h | 19 #define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0) argument
21 #define __set_TM1x(XI,V) \ argument
47 #define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0) argument
50 #define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0) argument
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| D | gpio-regs.h | 18 #define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0) argument
21 #define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0) argument
24 #define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0) argument
27 #define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0) argument
29 #define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0) argument
31 #define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0) argument
34 #define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0) argument
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| D | mb93493-regs.h | 21 #define __set_MB93493(X,V) \ argument
27 #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) argument
32 #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) argument
35 #define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V)) argument
38 #define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V)) argument
50 #define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V)) argument
56 #define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V)) argument
94 #define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V)) argument
179 #define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V)) argument
187 #define __set_MB93493_I2S(X,V) __set_MB93493(MB93493_I2S_##X, (V)) argument
[all …]
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| D | mb-regs.h | 183 #define __set_FPGATR_AUDIO_CLK(V) \ argument
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| D | spr-regs.h | 59 #define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0) argument
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| /arch/frv/mb93090-mb00/ |
| D | pci-vdk.c | 66 #define __set_PciCfgDataB(A,V) \ argument
69 #define __set_PciCfgDataW(A,V) \ argument
72 #define __set_PciCfgDataL(A,V) \ argument
79 #define __set_PciBridgeDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
80 #define __set_PciBridgeDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
81 #define __set_PciBridgeDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A)) argument
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| /arch/powerpc/lib/ |
| D | xor_vmx.c | 29 #define DEFINE(V) \ argument
33 #define LOAD(V) \ argument
41 #define STORE(V) \ argument
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| /arch/m68k/fpsp040/ |
| D | stanh.S | 67 .set V,FP_SCR6 define
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| /arch/mips/cavium-octeon/executive/ |
| D | cvmx-l2c.c | 524 uint64_t V:1; /* Line valid */ member
541 uint64_t V:1; /* Line valid */ member
558 uint64_t V:1; /* Line valid */ member
575 uint64_t V:1; /* Line valid */ member
592 uint64_t V:1; /* Line valid */ member
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| /arch/frv/kernel/ |
| D | dma.c | 41 #define __set_DMAC(IO,X,V) \ argument
47 #define ___set_DMAC(IO,X,V) \ argument
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-l2c.h | 58 uint64_t V:1; /* Line valid */ member
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| /arch/mips/kernel/ |
| D | perf_event_mipsxx.c | 70 V = 1, enumerator
75 #define V macro
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| /arch/s390/crypto/ |
| D | prng.c | 87 u8 V[112]; member
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| /arch/x86/include/asm/ |
| D | compat.h | 269 #define SET_PR_FPVALID(S,V) \ argument
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