• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1/* ld script for sparc32/sparc64 kernel */
2
3#include <asm-generic/vmlinux.lds.h>
4
5#include <asm/page.h>
6#include <asm/thread_info.h>
7
8#ifdef CONFIG_SPARC32
9#define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
10#define TEXTSTART	0xf0004000
11
12#define SMP_CACHE_BYTES_SHIFT 5
13
14#else
15#define SMP_CACHE_BYTES_SHIFT 6
16#define INITIAL_ADDRESS 0x4000
17#define TEXTSTART      0x0000000000404000
18
19#endif
20
21#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
22
23#ifdef CONFIG_SPARC32
24OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
25OUTPUT_ARCH(sparc)
26ENTRY(_start)
27jiffies = jiffies_64 + 4;
28#else
29/* sparc64 */
30OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
31OUTPUT_ARCH(sparc:v9a)
32ENTRY(_start)
33jiffies = jiffies_64;
34#endif
35
36#ifdef CONFIG_SPARC64
37ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
38#endif
39
40SECTIONS
41{
42#ifdef CONFIG_SPARC64
43	swapper_pg_dir = 0x0000000000402000;
44#endif
45	. = INITIAL_ADDRESS;
46	.text TEXTSTART :
47	{
48		_text = .;
49		HEAD_TEXT
50		TEXT_TEXT
51		SCHED_TEXT
52		LOCK_TEXT
53		KPROBES_TEXT
54		IRQENTRY_TEXT
55		SOFTIRQENTRY_TEXT
56		*(.gnu.warning)
57	} = 0
58	_etext = .;
59
60	RO_DATA(PAGE_SIZE)
61
62	/* Start of data section */
63	_sdata = .;
64
65	.data1 : {
66		*(.data1)
67	}
68	RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
69
70	/* End of data section */
71	_edata = .;
72
73	.fixup : {
74		__start___fixup = .;
75		*(.fixup)
76		__stop___fixup = .;
77	}
78	EXCEPTION_TABLE(16)
79	NOTES
80
81	. = ALIGN(PAGE_SIZE);
82	__init_begin = ALIGN(PAGE_SIZE);
83	INIT_TEXT_SECTION(PAGE_SIZE)
84	__init_text_end = .;
85	INIT_DATA_SECTION(16)
86
87	. = ALIGN(4);
88	.tsb_ldquad_phys_patch : {
89		__tsb_ldquad_phys_patch = .;
90		*(.tsb_ldquad_phys_patch)
91		__tsb_ldquad_phys_patch_end = .;
92	}
93
94	.tsb_phys_patch : {
95		__tsb_phys_patch = .;
96		*(.tsb_phys_patch)
97		__tsb_phys_patch_end = .;
98	}
99
100	.cpuid_patch : {
101		__cpuid_patch = .;
102		*(.cpuid_patch)
103		__cpuid_patch_end = .;
104	}
105
106	.sun4v_1insn_patch : {
107		__sun4v_1insn_patch = .;
108		*(.sun4v_1insn_patch)
109		__sun4v_1insn_patch_end = .;
110	}
111	.sun4v_2insn_patch : {
112		__sun4v_2insn_patch = .;
113		*(.sun4v_2insn_patch)
114		__sun4v_2insn_patch_end = .;
115	}
116	.leon_1insn_patch : {
117		__leon_1insn_patch = .;
118		*(.leon_1insn_patch)
119		__leon_1insn_patch_end = .;
120	}
121	.swapper_tsb_phys_patch : {
122		__swapper_tsb_phys_patch = .;
123		*(.swapper_tsb_phys_patch)
124		__swapper_tsb_phys_patch_end = .;
125	}
126	.swapper_4m_tsb_phys_patch : {
127		__swapper_4m_tsb_phys_patch = .;
128		*(.swapper_4m_tsb_phys_patch)
129		__swapper_4m_tsb_phys_patch_end = .;
130	}
131	.popc_3insn_patch : {
132		__popc_3insn_patch = .;
133		*(.popc_3insn_patch)
134		__popc_3insn_patch_end = .;
135	}
136	.popc_6insn_patch : {
137		__popc_6insn_patch = .;
138		*(.popc_6insn_patch)
139		__popc_6insn_patch_end = .;
140	}
141	.pause_3insn_patch : {
142		__pause_3insn_patch = .;
143		*(.pause_3insn_patch)
144		__pause_3insn_patch_end = .;
145	}
146	.sun_m7_2insn_patch : {
147		__sun_m7_2insn_patch = .;
148		*(.sun_m7_2insn_patch)
149		__sun_m7_2insn_patch_end = .;
150	}
151	PERCPU_SECTION(SMP_CACHE_BYTES)
152
153	. = ALIGN(PAGE_SIZE);
154	__init_end = .;
155	BSS_SECTION(0, 0, 0)
156	_end = . ;
157
158	STABS_DEBUG
159	DWARF_DEBUG
160
161	DISCARDS
162}
163