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Searched defs:_offset (Results 1 – 25 of 37) sorted by relevance

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/drivers/clk/bcm/
Dclk-kona.h99 #define POLICY(_offset, _bit) \ argument
159 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
171 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
182 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
193 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument
203 #define HW_ONLY_GATE(_offset, _status_bit) \ argument
219 #define HYST(_offset, _en_bit, _val_bit) \ argument
299 #define DIVIDER(_offset, _shift, _width) \ argument
309 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
350 #define SELECTOR(_offset, _shift, _width) \ argument
[all …]
/drivers/clk/tegra/
Dclk-tegra-periph.c130 #define MUX(_name, _parents, _offset, \ argument
137 #define MUX_FLAGS(_name, _parents, _offset,\ argument
144 #define MUX8(_name, _parents, _offset, \ argument
151 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument
157 #define INT(_name, _parents, _offset, \ argument
164 #define INT_FLAGS(_name, _parents, _offset,\ argument
171 #define INT8(_name, _parents, _offset,\ argument
178 #define UART(_name, _parents, _offset,\ argument
185 #define I2C(_name, _parents, _offset,\ argument
191 #define XUSB(_name, _parents, _offset, \ argument
[all …]
Dclk-tegra-audio.c62 #define AUDIO(_name, _offset) \ argument
81 #define AUDIO2X(_name, _num, _offset) \ argument
Dclk-tegra30.c181 #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ argument
187 #define TEGRA_INIT_DATA_MUX8(_name, _parents, _offset, \ argument
193 #define TEGRA_INIT_DATA_INT(_name, _parents, _offset, \ argument
200 #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ argument
Dclk-tegra20.c144 #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ argument
151 #define TEGRA_INIT_DATA_DIV16(_name, _parents, _offset, \ argument
158 #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ argument
Dclk.h511 #define TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\ argument
532 #define TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parent_names, _offset,\ argument
/drivers/net/ethernet/mellanox/mlxsw/
Ditem.h250 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
266 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
291 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
307 #define MLXSW_ITEM32_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ argument
332 #define MLXSW_ITEM64(_type, _cname, _iname, _offset, _shift, _sizebits) \ argument
348 #define MLXSW_ITEM64_INDEXED(_type, _cname, _iname, _offset, _shift, \ argument
373 #define MLXSW_ITEM_BUF(_type, _cname, _iname, _offset, _sizebytes) \ argument
392 #define MLXSW_ITEM_BUF_INDEXED(_type, _cname, _iname, _offset, _sizebytes, \ argument
418 #define MLXSW_ITEM_BIT_ARRAY(_type, _cname, _iname, _offset, _sizebytes, \ argument
/drivers/staging/fsl-mc/include/
Dmc-cmd.h106 #define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \ argument
109 #define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument
112 #define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument
/drivers/bcma/
Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/drivers/ssb/
Dpci.c172 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
174 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
177 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
180 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/drivers/usb/musb/
Dmusbhsdma.h42 #define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \ argument
72 #define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \ argument
Dmusb_regs.h493 #define MUSB_INDEXED_OFFSET(_epnum, _offset) \ argument
497 #define MUSB_FLAT_OFFSET(_epnum, _offset) \ argument
/drivers/clk/st/
Dclkgen.h37 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.h115 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
140 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ argument
163 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ argument
/drivers/pinctrl/berlin/
Dberlin.h40 #define BERLIN_PINCTRL_GROUP(_name, _offset, _width, _lsb, ...) \ argument
/drivers/video/fbdev/vermilion/
Dvermilion.h254 #define VML_READ32(_par, _offset) \ argument
256 #define VML_WRITE32(_par, _offset, _value) \ argument
/drivers/net/ethernet/qlogic/qed/
Dqed_mcp.c27 #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ argument
31 #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ argument
/drivers/staging/rtl8723au/hal/
Drtl8723a_hal_init.c384 u16 _offset, u16 _size_byte, u8 *pbuf) in hal_ReadEFuse_WiFi()
475 u16 _offset, u16 _size_byte, u8 *pbuf) in hal_ReadEFuse_BT()
592 u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf) in rtl8723a_readefuse()
/drivers/regulator/
Dpalmas-regulator.c318 #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ argument
354 #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ argument
/drivers/staging/rtl8188eu/core/
Drtw_efuse.c95 efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) in efuse_phymap_to_logical()
316 void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf) in efuse_ReadEFuse()
/drivers/net/wireless/realtek/rtlwifi/
Defuse.c195 void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf) in read_efuse_byte()
227 void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf) in read_efuse()
/drivers/staging/rtl8723au/core/
Drtw_efuse.c114 void ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf) in ReadEFuseByte23a()
/drivers/gpu/drm/msm/adreno/
Dadreno_gpu.h30 #define REG_ADRENO_DEFINE(_offset, _reg) [_offset] = (_reg) + 1 argument
/drivers/infiniband/core/
Dsysfs.c314 #define PORT_PMA_ATTR(_name, _counter, _width, _offset) \ argument
/drivers/net/ethernet/brocade/bna/
Dbna_hw_defs.h293 #define BNA_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ argument

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