1 /*
2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
4
5 GPL LICENSE SUMMARY
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
10
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
15
16 Contact Information:
17 qat-linux@intel.com
18
19 BSD LICENSE
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
23 are met:
24
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
30 distribution.
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
34
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 */
47 #ifndef ADF_DRV_H
48 #define ADF_DRV_H
49
50 #include <linux/list.h>
51 #include <linux/pci.h>
52 #include "adf_accel_devices.h"
53 #include "icp_qat_fw_loader_handle.h"
54 #include "icp_qat_hal.h"
55
56 #define ADF_MAJOR_VERSION 0
57 #define ADF_MINOR_VERSION 2
58 #define ADF_BUILD_VERSION 0
59 #define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \
60 __stringify(ADF_MINOR_VERSION) "." \
61 __stringify(ADF_BUILD_VERSION)
62
63 #define ADF_STATUS_RESTARTING 0
64 #define ADF_STATUS_STARTING 1
65 #define ADF_STATUS_CONFIGURED 2
66 #define ADF_STATUS_STARTED 3
67 #define ADF_STATUS_AE_INITIALISED 4
68 #define ADF_STATUS_AE_UCODE_LOADED 5
69 #define ADF_STATUS_AE_STARTED 6
70 #define ADF_STATUS_ORPHAN_TH_RUNNING 7
71 #define ADF_STATUS_IRQ_ALLOCATED 8
72
73 enum adf_dev_reset_mode {
74 ADF_DEV_RESET_ASYNC = 0,
75 ADF_DEV_RESET_SYNC
76 };
77
78 enum adf_event {
79 ADF_EVENT_INIT = 0,
80 ADF_EVENT_START,
81 ADF_EVENT_STOP,
82 ADF_EVENT_SHUTDOWN,
83 ADF_EVENT_RESTARTING,
84 ADF_EVENT_RESTARTED,
85 };
86
87 struct service_hndl {
88 int (*event_hld)(struct adf_accel_dev *accel_dev,
89 enum adf_event event);
90 unsigned long init_status;
91 unsigned long start_status;
92 char *name;
93 struct list_head list;
94 };
95
get_current_node(void)96 static inline int get_current_node(void)
97 {
98 return topology_physical_package_id(raw_smp_processor_id());
99 }
100
101 int adf_service_register(struct service_hndl *service);
102 int adf_service_unregister(struct service_hndl *service);
103
104 int adf_dev_init(struct adf_accel_dev *accel_dev);
105 int adf_dev_start(struct adf_accel_dev *accel_dev);
106 int adf_dev_stop(struct adf_accel_dev *accel_dev);
107 void adf_dev_shutdown(struct adf_accel_dev *accel_dev);
108
109 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
110 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
111 int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
112 void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev);
113 int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev);
114 void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info);
115 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
116 void adf_clean_vf_map(bool);
117
118 int adf_ctl_dev_register(void);
119 void adf_ctl_dev_unregister(void);
120 int adf_processes_dev_register(void);
121 void adf_processes_dev_unregister(void);
122
123 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
124 struct adf_accel_dev *pf);
125 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
126 struct adf_accel_dev *pf);
127 struct list_head *adf_devmgr_get_head(void);
128 struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id);
129 struct adf_accel_dev *adf_devmgr_get_first(void);
130 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
131 int adf_devmgr_verify_id(uint32_t id);
132 void adf_devmgr_get_num_dev(uint32_t *num);
133 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
134 int adf_dev_started(struct adf_accel_dev *accel_dev);
135 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
136 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
137 int adf_ae_init(struct adf_accel_dev *accel_dev);
138 int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
139 int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
140 void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
141 int adf_ae_start(struct adf_accel_dev *accel_dev);
142 int adf_ae_stop(struct adf_accel_dev *accel_dev);
143
144 int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf);
145 void adf_disable_aer(struct adf_accel_dev *accel_dev);
146 int adf_init_aer(void);
147 void adf_exit_aer(void);
148 int adf_init_admin_comms(struct adf_accel_dev *accel_dev);
149 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);
150 int adf_send_admin_init(struct adf_accel_dev *accel_dev);
151 int adf_init_arb(struct adf_accel_dev *accel_dev);
152 void adf_exit_arb(struct adf_accel_dev *accel_dev);
153 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
154
155 int adf_dev_get(struct adf_accel_dev *accel_dev);
156 void adf_dev_put(struct adf_accel_dev *accel_dev);
157 int adf_dev_in_use(struct adf_accel_dev *accel_dev);
158 int adf_init_etr_data(struct adf_accel_dev *accel_dev);
159 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
160 int qat_crypto_register(void);
161 int qat_crypto_unregister(void);
162 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
163 void qat_crypto_put_instance(struct qat_crypto_instance *inst);
164 void qat_alg_callback(void *resp);
165 void qat_alg_asym_callback(void *resp);
166 int qat_algs_register(void);
167 void qat_algs_unregister(void);
168 int qat_asym_algs_register(void);
169 void qat_asym_algs_unregister(void);
170
171 int qat_hal_init(struct adf_accel_dev *accel_dev);
172 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
173 void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
174 unsigned int ctx_mask);
175 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
176 unsigned int ctx_mask);
177 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
178 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
179 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
180 unsigned char ae, unsigned int ctx_mask);
181 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
182 unsigned char ae, enum icp_qat_uof_regtype lm_type,
183 unsigned char mode);
184 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
185 unsigned char ae, unsigned char mode);
186 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
187 unsigned char ae, unsigned char mode);
188 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
189 unsigned char ae, unsigned int ctx_mask, unsigned int upc);
190 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
191 unsigned char ae, unsigned int uaddr,
192 unsigned int words_num, uint64_t *uword);
193 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
194 unsigned int uword_addr, unsigned int words_num,
195 unsigned int *data);
196 int qat_hal_get_ins_num(void);
197 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
198 unsigned char ae,
199 struct icp_qat_uof_batch_init *lm_init_header);
200 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
201 unsigned char ae, unsigned char ctx_mask,
202 enum icp_qat_uof_regtype reg_type,
203 unsigned short reg_num, unsigned int regdata);
204 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
205 unsigned char ae, unsigned char ctx_mask,
206 enum icp_qat_uof_regtype reg_type,
207 unsigned short reg_num, unsigned int regdata);
208 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
209 unsigned char ae, unsigned char ctx_mask,
210 enum icp_qat_uof_regtype reg_type,
211 unsigned short reg_num, unsigned int regdata);
212 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
213 unsigned char ae, unsigned char ctx_mask,
214 unsigned short reg_num, unsigned int regdata);
215 int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle,
216 unsigned char ae, unsigned short lm_addr, unsigned int value);
217 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
218 void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle);
219 int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
220 void *addr_ptr, int mem_size);
221 void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
222 void *addr_ptr, int mem_size);
223 #if defined(CONFIG_PCI_IOV)
224 int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
225 void adf_disable_sriov(struct adf_accel_dev *accel_dev);
226 void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
227 uint32_t vf_mask);
228 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
229 uint32_t vf_mask);
230 int adf_init_pf_wq(void);
231 void adf_exit_pf_wq(void);
232 #else
adf_sriov_configure(struct pci_dev * pdev,int numvfs)233 static inline int adf_sriov_configure(struct pci_dev *pdev, int numvfs)
234 {
235 return 0;
236 }
237
adf_disable_sriov(struct adf_accel_dev * accel_dev)238 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
239 {
240 }
241
adf_init_pf_wq(void)242 static inline int adf_init_pf_wq(void)
243 {
244 return 0;
245 }
246
adf_exit_pf_wq(void)247 static inline void adf_exit_pf_wq(void)
248 {
249 }
250 #endif
251 #endif
252