1 /*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
43 #include <linux/fs.h>
44 #include <linux/pagemap.h>
45 #include <linux/seq_file.h>
46 #include <linux/debugfs.h>
47
48 /* Default simulator parameters values */
49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
57 #endif
58
59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
61 #endif
62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
64 #endif
65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
66 #define CONFIG_NANDSIM_ERASE_DELAY 2
67 #endif
68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
70 #endif
71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
72 #define CONFIG_NANDSIM_INPUT_CYCLE 50
73 #endif
74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
75 #define CONFIG_NANDSIM_BUS_WIDTH 8
76 #endif
77 #ifndef CONFIG_NANDSIM_DO_DELAYS
78 #define CONFIG_NANDSIM_DO_DELAYS 0
79 #endif
80 #ifndef CONFIG_NANDSIM_LOG
81 #define CONFIG_NANDSIM_LOG 0
82 #endif
83 #ifndef CONFIG_NANDSIM_DBG
84 #define CONFIG_NANDSIM_DBG 0
85 #endif
86 #ifndef CONFIG_NANDSIM_MAX_PARTS
87 #define CONFIG_NANDSIM_MAX_PARTS 32
88 #endif
89
90 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
91 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
92 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
93 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
94 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
95 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
96 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
97 static uint log = CONFIG_NANDSIM_LOG;
98 static uint dbg = CONFIG_NANDSIM_DBG;
99 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
100 static unsigned int parts_num;
101 static char *badblocks = NULL;
102 static char *weakblocks = NULL;
103 static char *weakpages = NULL;
104 static unsigned int bitflips = 0;
105 static char *gravepages = NULL;
106 static unsigned int overridesize = 0;
107 static char *cache_file = NULL;
108 static unsigned int bbt;
109 static unsigned int bch;
110 static u_char id_bytes[8] = {
111 [0] = CONFIG_NANDSIM_FIRST_ID_BYTE,
112 [1] = CONFIG_NANDSIM_SECOND_ID_BYTE,
113 [2] = CONFIG_NANDSIM_THIRD_ID_BYTE,
114 [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE,
115 [4 ... 7] = 0xFF,
116 };
117
118 module_param_array(id_bytes, byte, NULL, 0400);
119 module_param_named(first_id_byte, id_bytes[0], byte, 0400);
120 module_param_named(second_id_byte, id_bytes[1], byte, 0400);
121 module_param_named(third_id_byte, id_bytes[2], byte, 0400);
122 module_param_named(fourth_id_byte, id_bytes[3], byte, 0400);
123 module_param(access_delay, uint, 0400);
124 module_param(programm_delay, uint, 0400);
125 module_param(erase_delay, uint, 0400);
126 module_param(output_cycle, uint, 0400);
127 module_param(input_cycle, uint, 0400);
128 module_param(bus_width, uint, 0400);
129 module_param(do_delays, uint, 0400);
130 module_param(log, uint, 0400);
131 module_param(dbg, uint, 0400);
132 module_param_array(parts, ulong, &parts_num, 0400);
133 module_param(badblocks, charp, 0400);
134 module_param(weakblocks, charp, 0400);
135 module_param(weakpages, charp, 0400);
136 module_param(bitflips, uint, 0400);
137 module_param(gravepages, charp, 0400);
138 module_param(overridesize, uint, 0400);
139 module_param(cache_file, charp, 0400);
140 module_param(bbt, uint, 0400);
141 module_param(bch, uint, 0400);
142
143 MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command");
144 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)");
145 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)");
146 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete)");
147 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)");
148 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
149 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
150 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
151 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
152 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
153 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
154 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
155 MODULE_PARM_DESC(log, "Perform logging if not zero");
156 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
157 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
158 /* Page and erase block positions for the following parameters are independent of any partitions */
159 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
160 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
161 " separated by commas e.g. 113:2 means eb 113"
162 " can be erased only twice before failing");
163 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
164 " separated by commas e.g. 1401:2 means page 1401"
165 " can be written only twice before failing");
166 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
167 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
168 " separated by commas e.g. 1401:2 means page 1401"
169 " can be read only twice before failing");
170 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
171 "The size is specified in erase blocks and as the exponent of a power of two"
172 " e.g. 5 means a size of 32 erase blocks");
173 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
174 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
175 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
176 "be correctable in 512-byte blocks");
177
178 /* The largest possible page size */
179 #define NS_LARGEST_PAGE_SIZE 4096
180
181 /* The prefix for simulator output */
182 #define NS_OUTPUT_PREFIX "[nandsim]"
183
184 /* Simulator's output macros (logging, debugging, warning, error) */
185 #define NS_LOG(args...) \
186 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
187 #define NS_DBG(args...) \
188 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
189 #define NS_WARN(args...) \
190 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
191 #define NS_ERR(args...) \
192 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
193 #define NS_INFO(args...) \
194 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
195
196 /* Busy-wait delay macros (microseconds, milliseconds) */
197 #define NS_UDELAY(us) \
198 do { if (do_delays) udelay(us); } while(0)
199 #define NS_MDELAY(us) \
200 do { if (do_delays) mdelay(us); } while(0)
201
202 /* Is the nandsim structure initialized ? */
203 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
204
205 /* Good operation completion status */
206 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
207
208 /* Operation failed completion status */
209 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
210
211 /* Calculate the page offset in flash RAM image by (row, column) address */
212 #define NS_RAW_OFFSET(ns) \
213 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
214
215 /* Calculate the OOB offset in flash RAM image by (row, column) address */
216 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
217
218 /* After a command is input, the simulator goes to one of the following states */
219 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
220 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
221 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
222 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
223 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
224 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
225 #define STATE_CMD_STATUS 0x00000007 /* read status */
226 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
227 #define STATE_CMD_READID 0x0000000A /* read ID */
228 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
229 #define STATE_CMD_RESET 0x0000000C /* reset */
230 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
231 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
232 #define STATE_CMD_MASK 0x0000000F /* command states mask */
233
234 /* After an address is input, the simulator goes to one of these states */
235 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
236 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
237 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
238 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
239 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
240
241 /* During data input/output the simulator is in these states */
242 #define STATE_DATAIN 0x00000100 /* waiting for data input */
243 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
244
245 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
246 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
247 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
248 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
249
250 /* Previous operation is done, ready to accept new requests */
251 #define STATE_READY 0x00000000
252
253 /* This state is used to mark that the next state isn't known yet */
254 #define STATE_UNKNOWN 0x10000000
255
256 /* Simulator's actions bit masks */
257 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
258 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
259 #define ACTION_SECERASE 0x00300000 /* erase sector */
260 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
261 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
262 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
263 #define ACTION_MASK 0x00700000 /* action mask */
264
265 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
266 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
267
268 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
269 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
270 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
271 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
272 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
273 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
274 #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
275
276 /* Remove action bits from state */
277 #define NS_STATE(x) ((x) & ~ACTION_MASK)
278
279 /*
280 * Maximum previous states which need to be saved. Currently saving is
281 * only needed for page program operation with preceded read command
282 * (which is only valid for 512-byte pages).
283 */
284 #define NS_MAX_PREVSTATES 1
285
286 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
287 #define NS_MAX_HELD_PAGES 16
288
289 struct nandsim_debug_info {
290 struct dentry *dfs_root;
291 struct dentry *dfs_wear_report;
292 };
293
294 /*
295 * A union to represent flash memory contents and flash buffer.
296 */
297 union ns_mem {
298 u_char *byte; /* for byte access */
299 uint16_t *word; /* for 16-bit word access */
300 };
301
302 /*
303 * The structure which describes all the internal simulator data.
304 */
305 struct nandsim {
306 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
307 unsigned int nbparts;
308
309 uint busw; /* flash chip bus width (8 or 16) */
310 u_char ids[8]; /* chip's ID bytes */
311 uint32_t options; /* chip's characteristic bits */
312 uint32_t state; /* current chip state */
313 uint32_t nxstate; /* next expected state */
314
315 uint32_t *op; /* current operation, NULL operations isn't known yet */
316 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
317 uint16_t npstates; /* number of previous states saved */
318 uint16_t stateidx; /* current state index */
319
320 /* The simulated NAND flash pages array */
321 union ns_mem *pages;
322
323 /* Slab allocator for nand pages */
324 struct kmem_cache *nand_pages_slab;
325
326 /* Internal buffer of page + OOB size bytes */
327 union ns_mem buf;
328
329 /* NAND flash "geometry" */
330 struct {
331 uint64_t totsz; /* total flash size, bytes */
332 uint32_t secsz; /* flash sector (erase block) size, bytes */
333 uint pgsz; /* NAND flash page size, bytes */
334 uint oobsz; /* page OOB area size, bytes */
335 uint64_t totszoob; /* total flash size including OOB, bytes */
336 uint pgszoob; /* page size including OOB , bytes*/
337 uint secszoob; /* sector size including OOB, bytes */
338 uint pgnum; /* total number of pages */
339 uint pgsec; /* number of pages per sector */
340 uint secshift; /* bits number in sector size */
341 uint pgshift; /* bits number in page size */
342 uint pgaddrbytes; /* bytes per page address */
343 uint secaddrbytes; /* bytes per sector address */
344 uint idbytes; /* the number ID bytes that this chip outputs */
345 } geom;
346
347 /* NAND flash internal registers */
348 struct {
349 unsigned command; /* the command register */
350 u_char status; /* the status register */
351 uint row; /* the page number */
352 uint column; /* the offset within page */
353 uint count; /* internal counter */
354 uint num; /* number of bytes which must be processed */
355 uint off; /* fixed page offset */
356 } regs;
357
358 /* NAND flash lines state */
359 struct {
360 int ce; /* chip Enable */
361 int cle; /* command Latch Enable */
362 int ale; /* address Latch Enable */
363 int wp; /* write Protect */
364 } lines;
365
366 /* Fields needed when using a cache file */
367 struct file *cfile; /* Open file */
368 unsigned long *pages_written; /* Which pages have been written */
369 void *file_buf;
370 struct page *held_pages[NS_MAX_HELD_PAGES];
371 int held_cnt;
372
373 struct nandsim_debug_info dbg;
374 };
375
376 /*
377 * Operations array. To perform any operation the simulator must pass
378 * through the correspondent states chain.
379 */
380 static struct nandsim_operations {
381 uint32_t reqopts; /* options which are required to perform the operation */
382 uint32_t states[NS_OPER_STATES]; /* operation's states */
383 } ops[NS_OPER_NUM] = {
384 /* Read page + OOB from the beginning */
385 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
386 STATE_DATAOUT, STATE_READY}},
387 /* Read page + OOB from the second half */
388 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
389 STATE_DATAOUT, STATE_READY}},
390 /* Read OOB */
391 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
392 STATE_DATAOUT, STATE_READY}},
393 /* Program page starting from the beginning */
394 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
395 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
396 /* Program page starting from the beginning */
397 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
398 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
399 /* Program page starting from the second half */
400 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
401 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
402 /* Program OOB */
403 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
404 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
405 /* Erase sector */
406 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
407 /* Read status */
408 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
409 /* Read ID */
410 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
411 /* Large page devices read page */
412 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
413 STATE_DATAOUT, STATE_READY}},
414 /* Large page devices random page read */
415 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
416 STATE_DATAOUT, STATE_READY}},
417 };
418
419 struct weak_block {
420 struct list_head list;
421 unsigned int erase_block_no;
422 unsigned int max_erases;
423 unsigned int erases_done;
424 };
425
426 static LIST_HEAD(weak_blocks);
427
428 struct weak_page {
429 struct list_head list;
430 unsigned int page_no;
431 unsigned int max_writes;
432 unsigned int writes_done;
433 };
434
435 static LIST_HEAD(weak_pages);
436
437 struct grave_page {
438 struct list_head list;
439 unsigned int page_no;
440 unsigned int max_reads;
441 unsigned int reads_done;
442 };
443
444 static LIST_HEAD(grave_pages);
445
446 static unsigned long *erase_block_wear = NULL;
447 static unsigned int wear_eb_count = 0;
448 static unsigned long total_wear = 0;
449
450 /* MTD structure for NAND controller */
451 static struct mtd_info *nsmtd;
452
nandsim_debugfs_show(struct seq_file * m,void * private)453 static int nandsim_debugfs_show(struct seq_file *m, void *private)
454 {
455 unsigned long wmin = -1, wmax = 0, avg;
456 unsigned long deciles[10], decile_max[10], tot = 0;
457 unsigned int i;
458
459 /* Calc wear stats */
460 for (i = 0; i < wear_eb_count; ++i) {
461 unsigned long wear = erase_block_wear[i];
462 if (wear < wmin)
463 wmin = wear;
464 if (wear > wmax)
465 wmax = wear;
466 tot += wear;
467 }
468
469 for (i = 0; i < 9; ++i) {
470 deciles[i] = 0;
471 decile_max[i] = (wmax * (i + 1) + 5) / 10;
472 }
473 deciles[9] = 0;
474 decile_max[9] = wmax;
475 for (i = 0; i < wear_eb_count; ++i) {
476 int d;
477 unsigned long wear = erase_block_wear[i];
478 for (d = 0; d < 10; ++d)
479 if (wear <= decile_max[d]) {
480 deciles[d] += 1;
481 break;
482 }
483 }
484 avg = tot / wear_eb_count;
485
486 /* Output wear report */
487 seq_printf(m, "Total numbers of erases: %lu\n", tot);
488 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
489 seq_printf(m, "Average number of erases: %lu\n", avg);
490 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
491 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
492 for (i = 0; i < 10; ++i) {
493 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
494 if (from > decile_max[i])
495 continue;
496 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
497 from,
498 decile_max[i],
499 deciles[i]);
500 }
501
502 return 0;
503 }
504
nandsim_debugfs_open(struct inode * inode,struct file * file)505 static int nandsim_debugfs_open(struct inode *inode, struct file *file)
506 {
507 return single_open(file, nandsim_debugfs_show, inode->i_private);
508 }
509
510 static const struct file_operations dfs_fops = {
511 .open = nandsim_debugfs_open,
512 .read = seq_read,
513 .llseek = seq_lseek,
514 .release = single_release,
515 };
516
517 /**
518 * nandsim_debugfs_create - initialize debugfs
519 * @dev: nandsim device description object
520 *
521 * This function creates all debugfs files for UBI device @ubi. Returns zero in
522 * case of success and a negative error code in case of failure.
523 */
nandsim_debugfs_create(struct nandsim * dev)524 static int nandsim_debugfs_create(struct nandsim *dev)
525 {
526 struct nandsim_debug_info *dbg = &dev->dbg;
527 struct dentry *dent;
528 int err;
529
530 if (!IS_ENABLED(CONFIG_DEBUG_FS))
531 return 0;
532
533 dent = debugfs_create_dir("nandsim", NULL);
534 if (IS_ERR_OR_NULL(dent)) {
535 int err = dent ? -ENODEV : PTR_ERR(dent);
536
537 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
538 err);
539 return err;
540 }
541 dbg->dfs_root = dent;
542
543 dent = debugfs_create_file("wear_report", S_IRUSR,
544 dbg->dfs_root, dev, &dfs_fops);
545 if (IS_ERR_OR_NULL(dent))
546 goto out_remove;
547 dbg->dfs_wear_report = dent;
548
549 return 0;
550
551 out_remove:
552 debugfs_remove_recursive(dbg->dfs_root);
553 err = dent ? PTR_ERR(dent) : -ENODEV;
554 return err;
555 }
556
557 /**
558 * nandsim_debugfs_remove - destroy all debugfs files
559 */
nandsim_debugfs_remove(struct nandsim * ns)560 static void nandsim_debugfs_remove(struct nandsim *ns)
561 {
562 if (IS_ENABLED(CONFIG_DEBUG_FS))
563 debugfs_remove_recursive(ns->dbg.dfs_root);
564 }
565
566 /*
567 * Allocate array of page pointers, create slab allocation for an array
568 * and initialize the array by NULL pointers.
569 *
570 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
571 */
alloc_device(struct nandsim * ns)572 static int alloc_device(struct nandsim *ns)
573 {
574 struct file *cfile;
575 int i, err;
576
577 if (cache_file) {
578 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
579 if (IS_ERR(cfile))
580 return PTR_ERR(cfile);
581 if (!(cfile->f_mode & FMODE_CAN_READ)) {
582 NS_ERR("alloc_device: cache file not readable\n");
583 err = -EINVAL;
584 goto err_close;
585 }
586 if (!(cfile->f_mode & FMODE_CAN_WRITE)) {
587 NS_ERR("alloc_device: cache file not writeable\n");
588 err = -EINVAL;
589 goto err_close;
590 }
591 ns->pages_written = vzalloc(BITS_TO_LONGS(ns->geom.pgnum) *
592 sizeof(unsigned long));
593 if (!ns->pages_written) {
594 NS_ERR("alloc_device: unable to allocate pages written array\n");
595 err = -ENOMEM;
596 goto err_close;
597 }
598 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
599 if (!ns->file_buf) {
600 NS_ERR("alloc_device: unable to allocate file buf\n");
601 err = -ENOMEM;
602 goto err_free;
603 }
604 ns->cfile = cfile;
605 return 0;
606 }
607
608 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
609 if (!ns->pages) {
610 NS_ERR("alloc_device: unable to allocate page array\n");
611 return -ENOMEM;
612 }
613 for (i = 0; i < ns->geom.pgnum; i++) {
614 ns->pages[i].byte = NULL;
615 }
616 ns->nand_pages_slab = kmem_cache_create("nandsim",
617 ns->geom.pgszoob, 0, 0, NULL);
618 if (!ns->nand_pages_slab) {
619 NS_ERR("cache_create: unable to create kmem_cache\n");
620 return -ENOMEM;
621 }
622
623 return 0;
624
625 err_free:
626 vfree(ns->pages_written);
627 err_close:
628 filp_close(cfile, NULL);
629 return err;
630 }
631
632 /*
633 * Free any allocated pages, and free the array of page pointers.
634 */
free_device(struct nandsim * ns)635 static void free_device(struct nandsim *ns)
636 {
637 int i;
638
639 if (ns->cfile) {
640 kfree(ns->file_buf);
641 vfree(ns->pages_written);
642 filp_close(ns->cfile, NULL);
643 return;
644 }
645
646 if (ns->pages) {
647 for (i = 0; i < ns->geom.pgnum; i++) {
648 if (ns->pages[i].byte)
649 kmem_cache_free(ns->nand_pages_slab,
650 ns->pages[i].byte);
651 }
652 kmem_cache_destroy(ns->nand_pages_slab);
653 vfree(ns->pages);
654 }
655 }
656
get_partition_name(int i)657 static char *get_partition_name(int i)
658 {
659 return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i);
660 }
661
662 /*
663 * Initialize the nandsim structure.
664 *
665 * RETURNS: 0 if success, -ERRNO if failure.
666 */
init_nandsim(struct mtd_info * mtd)667 static int init_nandsim(struct mtd_info *mtd)
668 {
669 struct nand_chip *chip = mtd->priv;
670 struct nandsim *ns = chip->priv;
671 int i, ret = 0;
672 uint64_t remains;
673 uint64_t next_offset;
674
675 if (NS_IS_INITIALIZED(ns)) {
676 NS_ERR("init_nandsim: nandsim is already initialized\n");
677 return -EIO;
678 }
679
680 /* Force mtd to not do delays */
681 chip->chip_delay = 0;
682
683 /* Initialize the NAND flash parameters */
684 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
685 ns->geom.totsz = mtd->size;
686 ns->geom.pgsz = mtd->writesize;
687 ns->geom.oobsz = mtd->oobsize;
688 ns->geom.secsz = mtd->erasesize;
689 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
690 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
691 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
692 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
693 ns->geom.pgshift = chip->page_shift;
694 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
695 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
696 ns->options = 0;
697
698 if (ns->geom.pgsz == 512) {
699 ns->options |= OPT_PAGE512;
700 if (ns->busw == 8)
701 ns->options |= OPT_PAGE512_8BIT;
702 } else if (ns->geom.pgsz == 2048) {
703 ns->options |= OPT_PAGE2048;
704 } else if (ns->geom.pgsz == 4096) {
705 ns->options |= OPT_PAGE4096;
706 } else {
707 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
708 return -EIO;
709 }
710
711 if (ns->options & OPT_SMALLPAGE) {
712 if (ns->geom.totsz <= (32 << 20)) {
713 ns->geom.pgaddrbytes = 3;
714 ns->geom.secaddrbytes = 2;
715 } else {
716 ns->geom.pgaddrbytes = 4;
717 ns->geom.secaddrbytes = 3;
718 }
719 } else {
720 if (ns->geom.totsz <= (128 << 20)) {
721 ns->geom.pgaddrbytes = 4;
722 ns->geom.secaddrbytes = 2;
723 } else {
724 ns->geom.pgaddrbytes = 5;
725 ns->geom.secaddrbytes = 3;
726 }
727 }
728
729 /* Fill the partition_info structure */
730 if (parts_num > ARRAY_SIZE(ns->partitions)) {
731 NS_ERR("too many partitions.\n");
732 return -EINVAL;
733 }
734 remains = ns->geom.totsz;
735 next_offset = 0;
736 for (i = 0; i < parts_num; ++i) {
737 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
738
739 if (!part_sz || part_sz > remains) {
740 NS_ERR("bad partition size.\n");
741 return -EINVAL;
742 }
743 ns->partitions[i].name = get_partition_name(i);
744 if (!ns->partitions[i].name) {
745 NS_ERR("unable to allocate memory.\n");
746 return -ENOMEM;
747 }
748 ns->partitions[i].offset = next_offset;
749 ns->partitions[i].size = part_sz;
750 next_offset += ns->partitions[i].size;
751 remains -= ns->partitions[i].size;
752 }
753 ns->nbparts = parts_num;
754 if (remains) {
755 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
756 NS_ERR("too many partitions.\n");
757 return -EINVAL;
758 }
759 ns->partitions[i].name = get_partition_name(i);
760 if (!ns->partitions[i].name) {
761 NS_ERR("unable to allocate memory.\n");
762 return -ENOMEM;
763 }
764 ns->partitions[i].offset = next_offset;
765 ns->partitions[i].size = remains;
766 ns->nbparts += 1;
767 }
768
769 if (ns->busw == 16)
770 NS_WARN("16-bit flashes support wasn't tested\n");
771
772 printk("flash size: %llu MiB\n",
773 (unsigned long long)ns->geom.totsz >> 20);
774 printk("page size: %u bytes\n", ns->geom.pgsz);
775 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
776 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
777 printk("pages number: %u\n", ns->geom.pgnum);
778 printk("pages per sector: %u\n", ns->geom.pgsec);
779 printk("bus width: %u\n", ns->busw);
780 printk("bits in sector size: %u\n", ns->geom.secshift);
781 printk("bits in page size: %u\n", ns->geom.pgshift);
782 printk("bits in OOB size: %u\n", ffs(ns->geom.oobsz) - 1);
783 printk("flash size with OOB: %llu KiB\n",
784 (unsigned long long)ns->geom.totszoob >> 10);
785 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
786 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
787 printk("options: %#x\n", ns->options);
788
789 if ((ret = alloc_device(ns)) != 0)
790 return ret;
791
792 /* Allocate / initialize the internal buffer */
793 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
794 if (!ns->buf.byte) {
795 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
796 ns->geom.pgszoob);
797 return -ENOMEM;
798 }
799 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
800
801 return 0;
802 }
803
804 /*
805 * Free the nandsim structure.
806 */
free_nandsim(struct nandsim * ns)807 static void free_nandsim(struct nandsim *ns)
808 {
809 kfree(ns->buf.byte);
810 free_device(ns);
811
812 return;
813 }
814
parse_badblocks(struct nandsim * ns,struct mtd_info * mtd)815 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
816 {
817 char *w;
818 int zero_ok;
819 unsigned int erase_block_no;
820 loff_t offset;
821
822 if (!badblocks)
823 return 0;
824 w = badblocks;
825 do {
826 zero_ok = (*w == '0' ? 1 : 0);
827 erase_block_no = simple_strtoul(w, &w, 0);
828 if (!zero_ok && !erase_block_no) {
829 NS_ERR("invalid badblocks.\n");
830 return -EINVAL;
831 }
832 offset = (loff_t)erase_block_no * ns->geom.secsz;
833 if (mtd_block_markbad(mtd, offset)) {
834 NS_ERR("invalid badblocks.\n");
835 return -EINVAL;
836 }
837 if (*w == ',')
838 w += 1;
839 } while (*w);
840 return 0;
841 }
842
parse_weakblocks(void)843 static int parse_weakblocks(void)
844 {
845 char *w;
846 int zero_ok;
847 unsigned int erase_block_no;
848 unsigned int max_erases;
849 struct weak_block *wb;
850
851 if (!weakblocks)
852 return 0;
853 w = weakblocks;
854 do {
855 zero_ok = (*w == '0' ? 1 : 0);
856 erase_block_no = simple_strtoul(w, &w, 0);
857 if (!zero_ok && !erase_block_no) {
858 NS_ERR("invalid weakblocks.\n");
859 return -EINVAL;
860 }
861 max_erases = 3;
862 if (*w == ':') {
863 w += 1;
864 max_erases = simple_strtoul(w, &w, 0);
865 }
866 if (*w == ',')
867 w += 1;
868 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
869 if (!wb) {
870 NS_ERR("unable to allocate memory.\n");
871 return -ENOMEM;
872 }
873 wb->erase_block_no = erase_block_no;
874 wb->max_erases = max_erases;
875 list_add(&wb->list, &weak_blocks);
876 } while (*w);
877 return 0;
878 }
879
erase_error(unsigned int erase_block_no)880 static int erase_error(unsigned int erase_block_no)
881 {
882 struct weak_block *wb;
883
884 list_for_each_entry(wb, &weak_blocks, list)
885 if (wb->erase_block_no == erase_block_no) {
886 if (wb->erases_done >= wb->max_erases)
887 return 1;
888 wb->erases_done += 1;
889 return 0;
890 }
891 return 0;
892 }
893
parse_weakpages(void)894 static int parse_weakpages(void)
895 {
896 char *w;
897 int zero_ok;
898 unsigned int page_no;
899 unsigned int max_writes;
900 struct weak_page *wp;
901
902 if (!weakpages)
903 return 0;
904 w = weakpages;
905 do {
906 zero_ok = (*w == '0' ? 1 : 0);
907 page_no = simple_strtoul(w, &w, 0);
908 if (!zero_ok && !page_no) {
909 NS_ERR("invalid weakpagess.\n");
910 return -EINVAL;
911 }
912 max_writes = 3;
913 if (*w == ':') {
914 w += 1;
915 max_writes = simple_strtoul(w, &w, 0);
916 }
917 if (*w == ',')
918 w += 1;
919 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
920 if (!wp) {
921 NS_ERR("unable to allocate memory.\n");
922 return -ENOMEM;
923 }
924 wp->page_no = page_no;
925 wp->max_writes = max_writes;
926 list_add(&wp->list, &weak_pages);
927 } while (*w);
928 return 0;
929 }
930
write_error(unsigned int page_no)931 static int write_error(unsigned int page_no)
932 {
933 struct weak_page *wp;
934
935 list_for_each_entry(wp, &weak_pages, list)
936 if (wp->page_no == page_no) {
937 if (wp->writes_done >= wp->max_writes)
938 return 1;
939 wp->writes_done += 1;
940 return 0;
941 }
942 return 0;
943 }
944
parse_gravepages(void)945 static int parse_gravepages(void)
946 {
947 char *g;
948 int zero_ok;
949 unsigned int page_no;
950 unsigned int max_reads;
951 struct grave_page *gp;
952
953 if (!gravepages)
954 return 0;
955 g = gravepages;
956 do {
957 zero_ok = (*g == '0' ? 1 : 0);
958 page_no = simple_strtoul(g, &g, 0);
959 if (!zero_ok && !page_no) {
960 NS_ERR("invalid gravepagess.\n");
961 return -EINVAL;
962 }
963 max_reads = 3;
964 if (*g == ':') {
965 g += 1;
966 max_reads = simple_strtoul(g, &g, 0);
967 }
968 if (*g == ',')
969 g += 1;
970 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
971 if (!gp) {
972 NS_ERR("unable to allocate memory.\n");
973 return -ENOMEM;
974 }
975 gp->page_no = page_no;
976 gp->max_reads = max_reads;
977 list_add(&gp->list, &grave_pages);
978 } while (*g);
979 return 0;
980 }
981
read_error(unsigned int page_no)982 static int read_error(unsigned int page_no)
983 {
984 struct grave_page *gp;
985
986 list_for_each_entry(gp, &grave_pages, list)
987 if (gp->page_no == page_no) {
988 if (gp->reads_done >= gp->max_reads)
989 return 1;
990 gp->reads_done += 1;
991 return 0;
992 }
993 return 0;
994 }
995
free_lists(void)996 static void free_lists(void)
997 {
998 struct list_head *pos, *n;
999 list_for_each_safe(pos, n, &weak_blocks) {
1000 list_del(pos);
1001 kfree(list_entry(pos, struct weak_block, list));
1002 }
1003 list_for_each_safe(pos, n, &weak_pages) {
1004 list_del(pos);
1005 kfree(list_entry(pos, struct weak_page, list));
1006 }
1007 list_for_each_safe(pos, n, &grave_pages) {
1008 list_del(pos);
1009 kfree(list_entry(pos, struct grave_page, list));
1010 }
1011 kfree(erase_block_wear);
1012 }
1013
setup_wear_reporting(struct mtd_info * mtd)1014 static int setup_wear_reporting(struct mtd_info *mtd)
1015 {
1016 size_t mem;
1017
1018 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
1019 mem = wear_eb_count * sizeof(unsigned long);
1020 if (mem / sizeof(unsigned long) != wear_eb_count) {
1021 NS_ERR("Too many erase blocks for wear reporting\n");
1022 return -ENOMEM;
1023 }
1024 erase_block_wear = kzalloc(mem, GFP_KERNEL);
1025 if (!erase_block_wear) {
1026 NS_ERR("Too many erase blocks for wear reporting\n");
1027 return -ENOMEM;
1028 }
1029 return 0;
1030 }
1031
update_wear(unsigned int erase_block_no)1032 static void update_wear(unsigned int erase_block_no)
1033 {
1034 if (!erase_block_wear)
1035 return;
1036 total_wear += 1;
1037 /*
1038 * TODO: Notify this through a debugfs entry,
1039 * instead of showing an error message.
1040 */
1041 if (total_wear == 0)
1042 NS_ERR("Erase counter total overflow\n");
1043 erase_block_wear[erase_block_no] += 1;
1044 if (erase_block_wear[erase_block_no] == 0)
1045 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1046 }
1047
1048 /*
1049 * Returns the string representation of 'state' state.
1050 */
get_state_name(uint32_t state)1051 static char *get_state_name(uint32_t state)
1052 {
1053 switch (NS_STATE(state)) {
1054 case STATE_CMD_READ0:
1055 return "STATE_CMD_READ0";
1056 case STATE_CMD_READ1:
1057 return "STATE_CMD_READ1";
1058 case STATE_CMD_PAGEPROG:
1059 return "STATE_CMD_PAGEPROG";
1060 case STATE_CMD_READOOB:
1061 return "STATE_CMD_READOOB";
1062 case STATE_CMD_READSTART:
1063 return "STATE_CMD_READSTART";
1064 case STATE_CMD_ERASE1:
1065 return "STATE_CMD_ERASE1";
1066 case STATE_CMD_STATUS:
1067 return "STATE_CMD_STATUS";
1068 case STATE_CMD_SEQIN:
1069 return "STATE_CMD_SEQIN";
1070 case STATE_CMD_READID:
1071 return "STATE_CMD_READID";
1072 case STATE_CMD_ERASE2:
1073 return "STATE_CMD_ERASE2";
1074 case STATE_CMD_RESET:
1075 return "STATE_CMD_RESET";
1076 case STATE_CMD_RNDOUT:
1077 return "STATE_CMD_RNDOUT";
1078 case STATE_CMD_RNDOUTSTART:
1079 return "STATE_CMD_RNDOUTSTART";
1080 case STATE_ADDR_PAGE:
1081 return "STATE_ADDR_PAGE";
1082 case STATE_ADDR_SEC:
1083 return "STATE_ADDR_SEC";
1084 case STATE_ADDR_ZERO:
1085 return "STATE_ADDR_ZERO";
1086 case STATE_ADDR_COLUMN:
1087 return "STATE_ADDR_COLUMN";
1088 case STATE_DATAIN:
1089 return "STATE_DATAIN";
1090 case STATE_DATAOUT:
1091 return "STATE_DATAOUT";
1092 case STATE_DATAOUT_ID:
1093 return "STATE_DATAOUT_ID";
1094 case STATE_DATAOUT_STATUS:
1095 return "STATE_DATAOUT_STATUS";
1096 case STATE_READY:
1097 return "STATE_READY";
1098 case STATE_UNKNOWN:
1099 return "STATE_UNKNOWN";
1100 }
1101
1102 NS_ERR("get_state_name: unknown state, BUG\n");
1103 return NULL;
1104 }
1105
1106 /*
1107 * Check if command is valid.
1108 *
1109 * RETURNS: 1 if wrong command, 0 if right.
1110 */
check_command(int cmd)1111 static int check_command(int cmd)
1112 {
1113 switch (cmd) {
1114
1115 case NAND_CMD_READ0:
1116 case NAND_CMD_READ1:
1117 case NAND_CMD_READSTART:
1118 case NAND_CMD_PAGEPROG:
1119 case NAND_CMD_READOOB:
1120 case NAND_CMD_ERASE1:
1121 case NAND_CMD_STATUS:
1122 case NAND_CMD_SEQIN:
1123 case NAND_CMD_READID:
1124 case NAND_CMD_ERASE2:
1125 case NAND_CMD_RESET:
1126 case NAND_CMD_RNDOUT:
1127 case NAND_CMD_RNDOUTSTART:
1128 return 0;
1129
1130 default:
1131 return 1;
1132 }
1133 }
1134
1135 /*
1136 * Returns state after command is accepted by command number.
1137 */
get_state_by_command(unsigned command)1138 static uint32_t get_state_by_command(unsigned command)
1139 {
1140 switch (command) {
1141 case NAND_CMD_READ0:
1142 return STATE_CMD_READ0;
1143 case NAND_CMD_READ1:
1144 return STATE_CMD_READ1;
1145 case NAND_CMD_PAGEPROG:
1146 return STATE_CMD_PAGEPROG;
1147 case NAND_CMD_READSTART:
1148 return STATE_CMD_READSTART;
1149 case NAND_CMD_READOOB:
1150 return STATE_CMD_READOOB;
1151 case NAND_CMD_ERASE1:
1152 return STATE_CMD_ERASE1;
1153 case NAND_CMD_STATUS:
1154 return STATE_CMD_STATUS;
1155 case NAND_CMD_SEQIN:
1156 return STATE_CMD_SEQIN;
1157 case NAND_CMD_READID:
1158 return STATE_CMD_READID;
1159 case NAND_CMD_ERASE2:
1160 return STATE_CMD_ERASE2;
1161 case NAND_CMD_RESET:
1162 return STATE_CMD_RESET;
1163 case NAND_CMD_RNDOUT:
1164 return STATE_CMD_RNDOUT;
1165 case NAND_CMD_RNDOUTSTART:
1166 return STATE_CMD_RNDOUTSTART;
1167 }
1168
1169 NS_ERR("get_state_by_command: unknown command, BUG\n");
1170 return 0;
1171 }
1172
1173 /*
1174 * Move an address byte to the correspondent internal register.
1175 */
accept_addr_byte(struct nandsim * ns,u_char bt)1176 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1177 {
1178 uint byte = (uint)bt;
1179
1180 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1181 ns->regs.column |= (byte << 8 * ns->regs.count);
1182 else {
1183 ns->regs.row |= (byte << 8 * (ns->regs.count -
1184 ns->geom.pgaddrbytes +
1185 ns->geom.secaddrbytes));
1186 }
1187
1188 return;
1189 }
1190
1191 /*
1192 * Switch to STATE_READY state.
1193 */
switch_to_ready_state(struct nandsim * ns,u_char status)1194 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1195 {
1196 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1197
1198 ns->state = STATE_READY;
1199 ns->nxstate = STATE_UNKNOWN;
1200 ns->op = NULL;
1201 ns->npstates = 0;
1202 ns->stateidx = 0;
1203 ns->regs.num = 0;
1204 ns->regs.count = 0;
1205 ns->regs.off = 0;
1206 ns->regs.row = 0;
1207 ns->regs.column = 0;
1208 ns->regs.status = status;
1209 }
1210
1211 /*
1212 * If the operation isn't known yet, try to find it in the global array
1213 * of supported operations.
1214 *
1215 * Operation can be unknown because of the following.
1216 * 1. New command was accepted and this is the first call to find the
1217 * correspondent states chain. In this case ns->npstates = 0;
1218 * 2. There are several operations which begin with the same command(s)
1219 * (for example program from the second half and read from the
1220 * second half operations both begin with the READ1 command). In this
1221 * case the ns->pstates[] array contains previous states.
1222 *
1223 * Thus, the function tries to find operation containing the following
1224 * states (if the 'flag' parameter is 0):
1225 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1226 *
1227 * If (one and only one) matching operation is found, it is accepted (
1228 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1229 * zeroed).
1230 *
1231 * If there are several matches, the current state is pushed to the
1232 * ns->pstates.
1233 *
1234 * The operation can be unknown only while commands are input to the chip.
1235 * As soon as address command is accepted, the operation must be known.
1236 * In such situation the function is called with 'flag' != 0, and the
1237 * operation is searched using the following pattern:
1238 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1239 *
1240 * It is supposed that this pattern must either match one operation or
1241 * none. There can't be ambiguity in that case.
1242 *
1243 * If no matches found, the function does the following:
1244 * 1. if there are saved states present, try to ignore them and search
1245 * again only using the last command. If nothing was found, switch
1246 * to the STATE_READY state.
1247 * 2. if there are no saved states, switch to the STATE_READY state.
1248 *
1249 * RETURNS: -2 - no matched operations found.
1250 * -1 - several matches.
1251 * 0 - operation is found.
1252 */
find_operation(struct nandsim * ns,uint32_t flag)1253 static int find_operation(struct nandsim *ns, uint32_t flag)
1254 {
1255 int opsfound = 0;
1256 int i, j, idx = 0;
1257
1258 for (i = 0; i < NS_OPER_NUM; i++) {
1259
1260 int found = 1;
1261
1262 if (!(ns->options & ops[i].reqopts))
1263 /* Ignore operations we can't perform */
1264 continue;
1265
1266 if (flag) {
1267 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1268 continue;
1269 } else {
1270 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1271 continue;
1272 }
1273
1274 for (j = 0; j < ns->npstates; j++)
1275 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1276 && (ns->options & ops[idx].reqopts)) {
1277 found = 0;
1278 break;
1279 }
1280
1281 if (found) {
1282 idx = i;
1283 opsfound += 1;
1284 }
1285 }
1286
1287 if (opsfound == 1) {
1288 /* Exact match */
1289 ns->op = &ops[idx].states[0];
1290 if (flag) {
1291 /*
1292 * In this case the find_operation function was
1293 * called when address has just began input. But it isn't
1294 * yet fully input and the current state must
1295 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1296 * state must be the next state (ns->nxstate).
1297 */
1298 ns->stateidx = ns->npstates - 1;
1299 } else {
1300 ns->stateidx = ns->npstates;
1301 }
1302 ns->npstates = 0;
1303 ns->state = ns->op[ns->stateidx];
1304 ns->nxstate = ns->op[ns->stateidx + 1];
1305 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1306 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1307 return 0;
1308 }
1309
1310 if (opsfound == 0) {
1311 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1312 if (ns->npstates != 0) {
1313 NS_DBG("find_operation: no operation found, try again with state %s\n",
1314 get_state_name(ns->state));
1315 ns->npstates = 0;
1316 return find_operation(ns, 0);
1317
1318 }
1319 NS_DBG("find_operation: no operations found\n");
1320 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1321 return -2;
1322 }
1323
1324 if (flag) {
1325 /* This shouldn't happen */
1326 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1327 return -2;
1328 }
1329
1330 NS_DBG("find_operation: there is still ambiguity\n");
1331
1332 ns->pstates[ns->npstates++] = ns->state;
1333
1334 return -1;
1335 }
1336
put_pages(struct nandsim * ns)1337 static void put_pages(struct nandsim *ns)
1338 {
1339 int i;
1340
1341 for (i = 0; i < ns->held_cnt; i++)
1342 page_cache_release(ns->held_pages[i]);
1343 }
1344
1345 /* Get page cache pages in advance to provide NOFS memory allocation */
get_pages(struct nandsim * ns,struct file * file,size_t count,loff_t pos)1346 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1347 {
1348 pgoff_t index, start_index, end_index;
1349 struct page *page;
1350 struct address_space *mapping = file->f_mapping;
1351
1352 start_index = pos >> PAGE_CACHE_SHIFT;
1353 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1354 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1355 return -EINVAL;
1356 ns->held_cnt = 0;
1357 for (index = start_index; index <= end_index; index++) {
1358 page = find_get_page(mapping, index);
1359 if (page == NULL) {
1360 page = find_or_create_page(mapping, index, GFP_NOFS);
1361 if (page == NULL) {
1362 write_inode_now(mapping->host, 1);
1363 page = find_or_create_page(mapping, index, GFP_NOFS);
1364 }
1365 if (page == NULL) {
1366 put_pages(ns);
1367 return -ENOMEM;
1368 }
1369 unlock_page(page);
1370 }
1371 ns->held_pages[ns->held_cnt++] = page;
1372 }
1373 return 0;
1374 }
1375
set_memalloc(void)1376 static int set_memalloc(void)
1377 {
1378 if (current->flags & PF_MEMALLOC)
1379 return 0;
1380 current->flags |= PF_MEMALLOC;
1381 return 1;
1382 }
1383
clear_memalloc(int memalloc)1384 static void clear_memalloc(int memalloc)
1385 {
1386 if (memalloc)
1387 current->flags &= ~PF_MEMALLOC;
1388 }
1389
read_file(struct nandsim * ns,struct file * file,void * buf,size_t count,loff_t pos)1390 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1391 {
1392 ssize_t tx;
1393 int err, memalloc;
1394
1395 err = get_pages(ns, file, count, pos);
1396 if (err)
1397 return err;
1398 memalloc = set_memalloc();
1399 tx = kernel_read(file, pos, buf, count);
1400 clear_memalloc(memalloc);
1401 put_pages(ns);
1402 return tx;
1403 }
1404
write_file(struct nandsim * ns,struct file * file,void * buf,size_t count,loff_t pos)1405 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1406 {
1407 ssize_t tx;
1408 int err, memalloc;
1409
1410 err = get_pages(ns, file, count, pos);
1411 if (err)
1412 return err;
1413 memalloc = set_memalloc();
1414 tx = kernel_write(file, buf, count, pos);
1415 clear_memalloc(memalloc);
1416 put_pages(ns);
1417 return tx;
1418 }
1419
1420 /*
1421 * Returns a pointer to the current page.
1422 */
NS_GET_PAGE(struct nandsim * ns)1423 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1424 {
1425 return &(ns->pages[ns->regs.row]);
1426 }
1427
1428 /*
1429 * Retuns a pointer to the current byte, within the current page.
1430 */
NS_PAGE_BYTE_OFF(struct nandsim * ns)1431 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1432 {
1433 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1434 }
1435
do_read_error(struct nandsim * ns,int num)1436 static int do_read_error(struct nandsim *ns, int num)
1437 {
1438 unsigned int page_no = ns->regs.row;
1439
1440 if (read_error(page_no)) {
1441 prandom_bytes(ns->buf.byte, num);
1442 NS_WARN("simulating read error in page %u\n", page_no);
1443 return 1;
1444 }
1445 return 0;
1446 }
1447
do_bit_flips(struct nandsim * ns,int num)1448 static void do_bit_flips(struct nandsim *ns, int num)
1449 {
1450 if (bitflips && prandom_u32() < (1 << 22)) {
1451 int flips = 1;
1452 if (bitflips > 1)
1453 flips = (prandom_u32() % (int) bitflips) + 1;
1454 while (flips--) {
1455 int pos = prandom_u32() % (num * 8);
1456 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1457 NS_WARN("read_page: flipping bit %d in page %d "
1458 "reading from %d ecc: corrected=%u failed=%u\n",
1459 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1460 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1461 }
1462 }
1463 }
1464
1465 /*
1466 * Fill the NAND buffer with data read from the specified page.
1467 */
read_page(struct nandsim * ns,int num)1468 static void read_page(struct nandsim *ns, int num)
1469 {
1470 union ns_mem *mypage;
1471
1472 if (ns->cfile) {
1473 if (!test_bit(ns->regs.row, ns->pages_written)) {
1474 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1475 memset(ns->buf.byte, 0xFF, num);
1476 } else {
1477 loff_t pos;
1478 ssize_t tx;
1479
1480 NS_DBG("read_page: page %d written, reading from %d\n",
1481 ns->regs.row, ns->regs.column + ns->regs.off);
1482 if (do_read_error(ns, num))
1483 return;
1484 pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1485 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1486 if (tx != num) {
1487 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1488 return;
1489 }
1490 do_bit_flips(ns, num);
1491 }
1492 return;
1493 }
1494
1495 mypage = NS_GET_PAGE(ns);
1496 if (mypage->byte == NULL) {
1497 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1498 memset(ns->buf.byte, 0xFF, num);
1499 } else {
1500 NS_DBG("read_page: page %d allocated, reading from %d\n",
1501 ns->regs.row, ns->regs.column + ns->regs.off);
1502 if (do_read_error(ns, num))
1503 return;
1504 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1505 do_bit_flips(ns, num);
1506 }
1507 }
1508
1509 /*
1510 * Erase all pages in the specified sector.
1511 */
erase_sector(struct nandsim * ns)1512 static void erase_sector(struct nandsim *ns)
1513 {
1514 union ns_mem *mypage;
1515 int i;
1516
1517 if (ns->cfile) {
1518 for (i = 0; i < ns->geom.pgsec; i++)
1519 if (__test_and_clear_bit(ns->regs.row + i,
1520 ns->pages_written)) {
1521 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1522 }
1523 return;
1524 }
1525
1526 mypage = NS_GET_PAGE(ns);
1527 for (i = 0; i < ns->geom.pgsec; i++) {
1528 if (mypage->byte != NULL) {
1529 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1530 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1531 mypage->byte = NULL;
1532 }
1533 mypage++;
1534 }
1535 }
1536
1537 /*
1538 * Program the specified page with the contents from the NAND buffer.
1539 */
prog_page(struct nandsim * ns,int num)1540 static int prog_page(struct nandsim *ns, int num)
1541 {
1542 int i;
1543 union ns_mem *mypage;
1544 u_char *pg_off;
1545
1546 if (ns->cfile) {
1547 loff_t off;
1548 ssize_t tx;
1549 int all;
1550
1551 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1552 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1553 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1554 if (!test_bit(ns->regs.row, ns->pages_written)) {
1555 all = 1;
1556 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1557 } else {
1558 all = 0;
1559 tx = read_file(ns, ns->cfile, pg_off, num, off);
1560 if (tx != num) {
1561 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1562 return -1;
1563 }
1564 }
1565 for (i = 0; i < num; i++)
1566 pg_off[i] &= ns->buf.byte[i];
1567 if (all) {
1568 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1569 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1570 if (tx != ns->geom.pgszoob) {
1571 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1572 return -1;
1573 }
1574 __set_bit(ns->regs.row, ns->pages_written);
1575 } else {
1576 tx = write_file(ns, ns->cfile, pg_off, num, off);
1577 if (tx != num) {
1578 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1579 return -1;
1580 }
1581 }
1582 return 0;
1583 }
1584
1585 mypage = NS_GET_PAGE(ns);
1586 if (mypage->byte == NULL) {
1587 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1588 /*
1589 * We allocate memory with GFP_NOFS because a flash FS may
1590 * utilize this. If it is holding an FS lock, then gets here,
1591 * then kernel memory alloc runs writeback which goes to the FS
1592 * again and deadlocks. This was seen in practice.
1593 */
1594 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1595 if (mypage->byte == NULL) {
1596 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1597 return -1;
1598 }
1599 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1600 }
1601
1602 pg_off = NS_PAGE_BYTE_OFF(ns);
1603 for (i = 0; i < num; i++)
1604 pg_off[i] &= ns->buf.byte[i];
1605
1606 return 0;
1607 }
1608
1609 /*
1610 * If state has any action bit, perform this action.
1611 *
1612 * RETURNS: 0 if success, -1 if error.
1613 */
do_state_action(struct nandsim * ns,uint32_t action)1614 static int do_state_action(struct nandsim *ns, uint32_t action)
1615 {
1616 int num;
1617 int busdiv = ns->busw == 8 ? 1 : 2;
1618 unsigned int erase_block_no, page_no;
1619
1620 action &= ACTION_MASK;
1621
1622 /* Check that page address input is correct */
1623 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1624 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1625 return -1;
1626 }
1627
1628 switch (action) {
1629
1630 case ACTION_CPY:
1631 /*
1632 * Copy page data to the internal buffer.
1633 */
1634
1635 /* Column shouldn't be very large */
1636 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1637 NS_ERR("do_state_action: column number is too large\n");
1638 break;
1639 }
1640 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1641 read_page(ns, num);
1642
1643 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1644 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1645
1646 if (ns->regs.off == 0)
1647 NS_LOG("read page %d\n", ns->regs.row);
1648 else if (ns->regs.off < ns->geom.pgsz)
1649 NS_LOG("read page %d (second half)\n", ns->regs.row);
1650 else
1651 NS_LOG("read OOB of page %d\n", ns->regs.row);
1652
1653 NS_UDELAY(access_delay);
1654 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1655
1656 break;
1657
1658 case ACTION_SECERASE:
1659 /*
1660 * Erase sector.
1661 */
1662
1663 if (ns->lines.wp) {
1664 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1665 return -1;
1666 }
1667
1668 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1669 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1670 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1671 return -1;
1672 }
1673
1674 ns->regs.row = (ns->regs.row <<
1675 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1676 ns->regs.column = 0;
1677
1678 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1679
1680 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1681 ns->regs.row, NS_RAW_OFFSET(ns));
1682 NS_LOG("erase sector %u\n", erase_block_no);
1683
1684 erase_sector(ns);
1685
1686 NS_MDELAY(erase_delay);
1687
1688 if (erase_block_wear)
1689 update_wear(erase_block_no);
1690
1691 if (erase_error(erase_block_no)) {
1692 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1693 return -1;
1694 }
1695
1696 break;
1697
1698 case ACTION_PRGPAGE:
1699 /*
1700 * Program page - move internal buffer data to the page.
1701 */
1702
1703 if (ns->lines.wp) {
1704 NS_WARN("do_state_action: device is write-protected, programm\n");
1705 return -1;
1706 }
1707
1708 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1709 if (num != ns->regs.count) {
1710 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1711 ns->regs.count, num);
1712 return -1;
1713 }
1714
1715 if (prog_page(ns, num) == -1)
1716 return -1;
1717
1718 page_no = ns->regs.row;
1719
1720 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1721 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1722 NS_LOG("programm page %d\n", ns->regs.row);
1723
1724 NS_UDELAY(programm_delay);
1725 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1726
1727 if (write_error(page_no)) {
1728 NS_WARN("simulating write failure in page %u\n", page_no);
1729 return -1;
1730 }
1731
1732 break;
1733
1734 case ACTION_ZEROOFF:
1735 NS_DBG("do_state_action: set internal offset to 0\n");
1736 ns->regs.off = 0;
1737 break;
1738
1739 case ACTION_HALFOFF:
1740 if (!(ns->options & OPT_PAGE512_8BIT)) {
1741 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1742 "byte page size 8x chips\n");
1743 return -1;
1744 }
1745 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1746 ns->regs.off = ns->geom.pgsz/2;
1747 break;
1748
1749 case ACTION_OOBOFF:
1750 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1751 ns->regs.off = ns->geom.pgsz;
1752 break;
1753
1754 default:
1755 NS_DBG("do_state_action: BUG! unknown action\n");
1756 }
1757
1758 return 0;
1759 }
1760
1761 /*
1762 * Switch simulator's state.
1763 */
switch_state(struct nandsim * ns)1764 static void switch_state(struct nandsim *ns)
1765 {
1766 if (ns->op) {
1767 /*
1768 * The current operation have already been identified.
1769 * Just follow the states chain.
1770 */
1771
1772 ns->stateidx += 1;
1773 ns->state = ns->nxstate;
1774 ns->nxstate = ns->op[ns->stateidx + 1];
1775
1776 NS_DBG("switch_state: operation is known, switch to the next state, "
1777 "state: %s, nxstate: %s\n",
1778 get_state_name(ns->state), get_state_name(ns->nxstate));
1779
1780 /* See, whether we need to do some action */
1781 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1782 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1783 return;
1784 }
1785
1786 } else {
1787 /*
1788 * We don't yet know which operation we perform.
1789 * Try to identify it.
1790 */
1791
1792 /*
1793 * The only event causing the switch_state function to
1794 * be called with yet unknown operation is new command.
1795 */
1796 ns->state = get_state_by_command(ns->regs.command);
1797
1798 NS_DBG("switch_state: operation is unknown, try to find it\n");
1799
1800 if (find_operation(ns, 0) != 0)
1801 return;
1802
1803 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1804 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1805 return;
1806 }
1807 }
1808
1809 /* For 16x devices column means the page offset in words */
1810 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1811 NS_DBG("switch_state: double the column number for 16x device\n");
1812 ns->regs.column <<= 1;
1813 }
1814
1815 if (NS_STATE(ns->nxstate) == STATE_READY) {
1816 /*
1817 * The current state is the last. Return to STATE_READY
1818 */
1819
1820 u_char status = NS_STATUS_OK(ns);
1821
1822 /* In case of data states, see if all bytes were input/output */
1823 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1824 && ns->regs.count != ns->regs.num) {
1825 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1826 ns->regs.num - ns->regs.count);
1827 status = NS_STATUS_FAILED(ns);
1828 }
1829
1830 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1831
1832 switch_to_ready_state(ns, status);
1833
1834 return;
1835 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1836 /*
1837 * If the next state is data input/output, switch to it now
1838 */
1839
1840 ns->state = ns->nxstate;
1841 ns->nxstate = ns->op[++ns->stateidx + 1];
1842 ns->regs.num = ns->regs.count = 0;
1843
1844 NS_DBG("switch_state: the next state is data I/O, switch, "
1845 "state: %s, nxstate: %s\n",
1846 get_state_name(ns->state), get_state_name(ns->nxstate));
1847
1848 /*
1849 * Set the internal register to the count of bytes which
1850 * are expected to be input or output
1851 */
1852 switch (NS_STATE(ns->state)) {
1853 case STATE_DATAIN:
1854 case STATE_DATAOUT:
1855 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1856 break;
1857
1858 case STATE_DATAOUT_ID:
1859 ns->regs.num = ns->geom.idbytes;
1860 break;
1861
1862 case STATE_DATAOUT_STATUS:
1863 ns->regs.count = ns->regs.num = 0;
1864 break;
1865
1866 default:
1867 NS_ERR("switch_state: BUG! unknown data state\n");
1868 }
1869
1870 } else if (ns->nxstate & STATE_ADDR_MASK) {
1871 /*
1872 * If the next state is address input, set the internal
1873 * register to the number of expected address bytes
1874 */
1875
1876 ns->regs.count = 0;
1877
1878 switch (NS_STATE(ns->nxstate)) {
1879 case STATE_ADDR_PAGE:
1880 ns->regs.num = ns->geom.pgaddrbytes;
1881
1882 break;
1883 case STATE_ADDR_SEC:
1884 ns->regs.num = ns->geom.secaddrbytes;
1885 break;
1886
1887 case STATE_ADDR_ZERO:
1888 ns->regs.num = 1;
1889 break;
1890
1891 case STATE_ADDR_COLUMN:
1892 /* Column address is always 2 bytes */
1893 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1894 break;
1895
1896 default:
1897 NS_ERR("switch_state: BUG! unknown address state\n");
1898 }
1899 } else {
1900 /*
1901 * Just reset internal counters.
1902 */
1903
1904 ns->regs.num = 0;
1905 ns->regs.count = 0;
1906 }
1907 }
1908
ns_nand_read_byte(struct mtd_info * mtd)1909 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1910 {
1911 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1912 u_char outb = 0x00;
1913
1914 /* Sanity and correctness checks */
1915 if (!ns->lines.ce) {
1916 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1917 return outb;
1918 }
1919 if (ns->lines.ale || ns->lines.cle) {
1920 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1921 return outb;
1922 }
1923 if (!(ns->state & STATE_DATAOUT_MASK)) {
1924 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1925 "return %#x\n", get_state_name(ns->state), (uint)outb);
1926 return outb;
1927 }
1928
1929 /* Status register may be read as many times as it is wanted */
1930 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1931 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1932 return ns->regs.status;
1933 }
1934
1935 /* Check if there is any data in the internal buffer which may be read */
1936 if (ns->regs.count == ns->regs.num) {
1937 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1938 return outb;
1939 }
1940
1941 switch (NS_STATE(ns->state)) {
1942 case STATE_DATAOUT:
1943 if (ns->busw == 8) {
1944 outb = ns->buf.byte[ns->regs.count];
1945 ns->regs.count += 1;
1946 } else {
1947 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1948 ns->regs.count += 2;
1949 }
1950 break;
1951 case STATE_DATAOUT_ID:
1952 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1953 outb = ns->ids[ns->regs.count];
1954 ns->regs.count += 1;
1955 break;
1956 default:
1957 BUG();
1958 }
1959
1960 if (ns->regs.count == ns->regs.num) {
1961 NS_DBG("read_byte: all bytes were read\n");
1962
1963 if (NS_STATE(ns->nxstate) == STATE_READY)
1964 switch_state(ns);
1965 }
1966
1967 return outb;
1968 }
1969
ns_nand_write_byte(struct mtd_info * mtd,u_char byte)1970 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1971 {
1972 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1973
1974 /* Sanity and correctness checks */
1975 if (!ns->lines.ce) {
1976 NS_ERR("write_byte: chip is disabled, ignore write\n");
1977 return;
1978 }
1979 if (ns->lines.ale && ns->lines.cle) {
1980 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1981 return;
1982 }
1983
1984 if (ns->lines.cle == 1) {
1985 /*
1986 * The byte written is a command.
1987 */
1988
1989 if (byte == NAND_CMD_RESET) {
1990 NS_LOG("reset chip\n");
1991 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1992 return;
1993 }
1994
1995 /* Check that the command byte is correct */
1996 if (check_command(byte)) {
1997 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1998 return;
1999 }
2000
2001 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
2002 || NS_STATE(ns->state) == STATE_DATAOUT) {
2003 int row = ns->regs.row;
2004
2005 switch_state(ns);
2006 if (byte == NAND_CMD_RNDOUT)
2007 ns->regs.row = row;
2008 }
2009
2010 /* Check if chip is expecting command */
2011 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
2012 /* Do not warn if only 2 id bytes are read */
2013 if (!(ns->regs.command == NAND_CMD_READID &&
2014 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2015 /*
2016 * We are in situation when something else (not command)
2017 * was expected but command was input. In this case ignore
2018 * previous command(s)/state(s) and accept the last one.
2019 */
2020 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2021 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2022 }
2023 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2024 }
2025
2026 NS_DBG("command byte corresponding to %s state accepted\n",
2027 get_state_name(get_state_by_command(byte)));
2028 ns->regs.command = byte;
2029 switch_state(ns);
2030
2031 } else if (ns->lines.ale == 1) {
2032 /*
2033 * The byte written is an address.
2034 */
2035
2036 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2037
2038 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2039
2040 if (find_operation(ns, 1) < 0)
2041 return;
2042
2043 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2044 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2045 return;
2046 }
2047
2048 ns->regs.count = 0;
2049 switch (NS_STATE(ns->nxstate)) {
2050 case STATE_ADDR_PAGE:
2051 ns->regs.num = ns->geom.pgaddrbytes;
2052 break;
2053 case STATE_ADDR_SEC:
2054 ns->regs.num = ns->geom.secaddrbytes;
2055 break;
2056 case STATE_ADDR_ZERO:
2057 ns->regs.num = 1;
2058 break;
2059 default:
2060 BUG();
2061 }
2062 }
2063
2064 /* Check that chip is expecting address */
2065 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2066 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2067 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2068 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2069 return;
2070 }
2071
2072 /* Check if this is expected byte */
2073 if (ns->regs.count == ns->regs.num) {
2074 NS_ERR("write_byte: no more address bytes expected\n");
2075 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2076 return;
2077 }
2078
2079 accept_addr_byte(ns, byte);
2080
2081 ns->regs.count += 1;
2082
2083 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2084 (uint)byte, ns->regs.count, ns->regs.num);
2085
2086 if (ns->regs.count == ns->regs.num) {
2087 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2088 switch_state(ns);
2089 }
2090
2091 } else {
2092 /*
2093 * The byte written is an input data.
2094 */
2095
2096 /* Check that chip is expecting data input */
2097 if (!(ns->state & STATE_DATAIN_MASK)) {
2098 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2099 "switch to %s\n", (uint)byte,
2100 get_state_name(ns->state), get_state_name(STATE_READY));
2101 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2102 return;
2103 }
2104
2105 /* Check if this is expected byte */
2106 if (ns->regs.count == ns->regs.num) {
2107 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2108 ns->regs.num);
2109 return;
2110 }
2111
2112 if (ns->busw == 8) {
2113 ns->buf.byte[ns->regs.count] = byte;
2114 ns->regs.count += 1;
2115 } else {
2116 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2117 ns->regs.count += 2;
2118 }
2119 }
2120
2121 return;
2122 }
2123
ns_hwcontrol(struct mtd_info * mtd,int cmd,unsigned int bitmask)2124 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2125 {
2126 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2127
2128 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2129 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2130 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2131
2132 if (cmd != NAND_CMD_NONE)
2133 ns_nand_write_byte(mtd, cmd);
2134 }
2135
ns_device_ready(struct mtd_info * mtd)2136 static int ns_device_ready(struct mtd_info *mtd)
2137 {
2138 NS_DBG("device_ready\n");
2139 return 1;
2140 }
2141
ns_nand_read_word(struct mtd_info * mtd)2142 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2143 {
2144 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2145
2146 NS_DBG("read_word\n");
2147
2148 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2149 }
2150
ns_nand_write_buf(struct mtd_info * mtd,const u_char * buf,int len)2151 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2152 {
2153 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2154
2155 /* Check that chip is expecting data input */
2156 if (!(ns->state & STATE_DATAIN_MASK)) {
2157 NS_ERR("write_buf: data input isn't expected, state is %s, "
2158 "switch to STATE_READY\n", get_state_name(ns->state));
2159 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2160 return;
2161 }
2162
2163 /* Check if these are expected bytes */
2164 if (ns->regs.count + len > ns->regs.num) {
2165 NS_ERR("write_buf: too many input bytes\n");
2166 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2167 return;
2168 }
2169
2170 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2171 ns->regs.count += len;
2172
2173 if (ns->regs.count == ns->regs.num) {
2174 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2175 }
2176 }
2177
ns_nand_read_buf(struct mtd_info * mtd,u_char * buf,int len)2178 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2179 {
2180 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2181
2182 /* Sanity and correctness checks */
2183 if (!ns->lines.ce) {
2184 NS_ERR("read_buf: chip is disabled\n");
2185 return;
2186 }
2187 if (ns->lines.ale || ns->lines.cle) {
2188 NS_ERR("read_buf: ALE or CLE pin is high\n");
2189 return;
2190 }
2191 if (!(ns->state & STATE_DATAOUT_MASK)) {
2192 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2193 get_state_name(ns->state));
2194 return;
2195 }
2196
2197 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2198 int i;
2199
2200 for (i = 0; i < len; i++)
2201 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2202
2203 return;
2204 }
2205
2206 /* Check if these are expected bytes */
2207 if (ns->regs.count + len > ns->regs.num) {
2208 NS_ERR("read_buf: too many bytes to read\n");
2209 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2210 return;
2211 }
2212
2213 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2214 ns->regs.count += len;
2215
2216 if (ns->regs.count == ns->regs.num) {
2217 if (NS_STATE(ns->nxstate) == STATE_READY)
2218 switch_state(ns);
2219 }
2220
2221 return;
2222 }
2223
2224 /*
2225 * Module initialization function
2226 */
ns_init_module(void)2227 static int __init ns_init_module(void)
2228 {
2229 struct nand_chip *chip;
2230 struct nandsim *nand;
2231 int retval = -ENOMEM, i;
2232
2233 if (bus_width != 8 && bus_width != 16) {
2234 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2235 return -EINVAL;
2236 }
2237
2238 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2239 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2240 + sizeof(struct nandsim), GFP_KERNEL);
2241 if (!nsmtd) {
2242 NS_ERR("unable to allocate core structures.\n");
2243 return -ENOMEM;
2244 }
2245 chip = (struct nand_chip *)(nsmtd + 1);
2246 nsmtd->priv = (void *)chip;
2247 nand = (struct nandsim *)(chip + 1);
2248 chip->priv = (void *)nand;
2249
2250 /*
2251 * Register simulator's callbacks.
2252 */
2253 chip->cmd_ctrl = ns_hwcontrol;
2254 chip->read_byte = ns_nand_read_byte;
2255 chip->dev_ready = ns_device_ready;
2256 chip->write_buf = ns_nand_write_buf;
2257 chip->read_buf = ns_nand_read_buf;
2258 chip->read_word = ns_nand_read_word;
2259 chip->ecc.mode = NAND_ECC_SOFT;
2260 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2261 /* and 'badblocks' parameters to work */
2262 chip->options |= NAND_SKIP_BBTSCAN;
2263
2264 switch (bbt) {
2265 case 2:
2266 chip->bbt_options |= NAND_BBT_NO_OOB;
2267 case 1:
2268 chip->bbt_options |= NAND_BBT_USE_FLASH;
2269 case 0:
2270 break;
2271 default:
2272 NS_ERR("bbt has to be 0..2\n");
2273 retval = -EINVAL;
2274 goto error;
2275 }
2276 /*
2277 * Perform minimum nandsim structure initialization to handle
2278 * the initial ID read command correctly
2279 */
2280 if (id_bytes[6] != 0xFF || id_bytes[7] != 0xFF)
2281 nand->geom.idbytes = 8;
2282 else if (id_bytes[4] != 0xFF || id_bytes[5] != 0xFF)
2283 nand->geom.idbytes = 6;
2284 else if (id_bytes[2] != 0xFF || id_bytes[3] != 0xFF)
2285 nand->geom.idbytes = 4;
2286 else
2287 nand->geom.idbytes = 2;
2288 nand->regs.status = NS_STATUS_OK(nand);
2289 nand->nxstate = STATE_UNKNOWN;
2290 nand->options |= OPT_PAGE512; /* temporary value */
2291 memcpy(nand->ids, id_bytes, sizeof(nand->ids));
2292 if (bus_width == 16) {
2293 nand->busw = 16;
2294 chip->options |= NAND_BUSWIDTH_16;
2295 }
2296
2297 nsmtd->owner = THIS_MODULE;
2298
2299 if ((retval = parse_weakblocks()) != 0)
2300 goto error;
2301
2302 if ((retval = parse_weakpages()) != 0)
2303 goto error;
2304
2305 if ((retval = parse_gravepages()) != 0)
2306 goto error;
2307
2308 retval = nand_scan_ident(nsmtd, 1, NULL);
2309 if (retval) {
2310 NS_ERR("cannot scan NAND Simulator device\n");
2311 if (retval > 0)
2312 retval = -ENXIO;
2313 goto error;
2314 }
2315
2316 if (bch) {
2317 unsigned int eccsteps, eccbytes;
2318 if (!mtd_nand_has_bch()) {
2319 NS_ERR("BCH ECC support is disabled\n");
2320 retval = -EINVAL;
2321 goto error;
2322 }
2323 /* use 512-byte ecc blocks */
2324 eccsteps = nsmtd->writesize/512;
2325 eccbytes = (bch*13+7)/8;
2326 /* do not bother supporting small page devices */
2327 if ((nsmtd->oobsize < 64) || !eccsteps) {
2328 NS_ERR("bch not available on small page devices\n");
2329 retval = -EINVAL;
2330 goto error;
2331 }
2332 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2333 NS_ERR("invalid bch value %u\n", bch);
2334 retval = -EINVAL;
2335 goto error;
2336 }
2337 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2338 chip->ecc.size = 512;
2339 chip->ecc.strength = bch;
2340 chip->ecc.bytes = eccbytes;
2341 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2342 }
2343
2344 retval = nand_scan_tail(nsmtd);
2345 if (retval) {
2346 NS_ERR("can't register NAND Simulator\n");
2347 if (retval > 0)
2348 retval = -ENXIO;
2349 goto error;
2350 }
2351
2352 if (overridesize) {
2353 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2354 if (new_size >> overridesize != nsmtd->erasesize) {
2355 NS_ERR("overridesize is too big\n");
2356 retval = -EINVAL;
2357 goto err_exit;
2358 }
2359 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2360 nsmtd->size = new_size;
2361 chip->chipsize = new_size;
2362 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2363 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2364 }
2365
2366 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2367 goto err_exit;
2368
2369 if ((retval = nandsim_debugfs_create(nand)) != 0)
2370 goto err_exit;
2371
2372 if ((retval = init_nandsim(nsmtd)) != 0)
2373 goto err_exit;
2374
2375 if ((retval = chip->scan_bbt(nsmtd)) != 0)
2376 goto err_exit;
2377
2378 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2379 goto err_exit;
2380
2381 /* Register NAND partitions */
2382 retval = mtd_device_register(nsmtd, &nand->partitions[0],
2383 nand->nbparts);
2384 if (retval != 0)
2385 goto err_exit;
2386
2387 return 0;
2388
2389 err_exit:
2390 free_nandsim(nand);
2391 nand_release(nsmtd);
2392 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2393 kfree(nand->partitions[i].name);
2394 error:
2395 kfree(nsmtd);
2396 free_lists();
2397
2398 return retval;
2399 }
2400
2401 module_init(ns_init_module);
2402
2403 /*
2404 * Module clean-up function
2405 */
ns_cleanup_module(void)2406 static void __exit ns_cleanup_module(void)
2407 {
2408 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2409 int i;
2410
2411 nandsim_debugfs_remove(ns);
2412 free_nandsim(ns); /* Free nandsim private resources */
2413 nand_release(nsmtd); /* Unregister driver */
2414 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2415 kfree(ns->partitions[i].name);
2416 kfree(nsmtd); /* Free other structures */
2417 free_lists();
2418 }
2419
2420 module_exit(ns_cleanup_module);
2421
2422 MODULE_LICENSE ("GPL");
2423 MODULE_AUTHOR ("Artem B. Bityuckiy");
2424 MODULE_DESCRIPTION ("The NAND flash simulator");
2425