1 /*
2 *
3 * Broadcom B43legacy wireless driver
4 *
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11 *
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
29 *
30 */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/module.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/workqueue.h>
39 #include <linux/sched.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/slab.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 MODULE_FIRMWARE("b43legacy/ucode2.fw");
64 MODULE_FIRMWARE("b43legacy/ucode4.fw");
65
66 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
67 static int modparam_pio;
68 module_param_named(pio, modparam_pio, int, 0444);
69 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
70 #elif defined(CONFIG_B43LEGACY_DMA)
71 # define modparam_pio 0
72 #elif defined(CONFIG_B43LEGACY_PIO)
73 # define modparam_pio 1
74 #endif
75
76 static int modparam_bad_frames_preempt;
77 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
78 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
79 " Preemption");
80
81 static char modparam_fwpostfix[16];
82 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
83 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
84
85 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
86 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
88 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
89 {},
90 };
91 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
92
93
94 /* Channel and ratetables are shared for all devices.
95 * They can't be const, because ieee80211 puts some precalculated
96 * data in there. This data is the same for all devices, so we don't
97 * get concurrency issues */
98 #define RATETAB_ENT(_rateid, _flags) \
99 { \
100 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
101 .hw_value = (_rateid), \
102 .flags = (_flags), \
103 }
104 /*
105 * NOTE: When changing this, sync with xmit.c's
106 * b43legacy_plcp_get_bitrate_idx_* functions!
107 */
108 static struct ieee80211_rate __b43legacy_ratetable[] = {
109 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
110 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
111 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
112 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
113 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
119 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
120 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
121 };
122 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_b_ratetable_size 4
124 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
125 #define b43legacy_g_ratetable_size 12
126
127 #define CHANTAB_ENT(_chanid, _freq) \
128 { \
129 .center_freq = (_freq), \
130 .hw_value = (_chanid), \
131 }
132 static struct ieee80211_channel b43legacy_bg_chantable[] = {
133 CHANTAB_ENT(1, 2412),
134 CHANTAB_ENT(2, 2417),
135 CHANTAB_ENT(3, 2422),
136 CHANTAB_ENT(4, 2427),
137 CHANTAB_ENT(5, 2432),
138 CHANTAB_ENT(6, 2437),
139 CHANTAB_ENT(7, 2442),
140 CHANTAB_ENT(8, 2447),
141 CHANTAB_ENT(9, 2452),
142 CHANTAB_ENT(10, 2457),
143 CHANTAB_ENT(11, 2462),
144 CHANTAB_ENT(12, 2467),
145 CHANTAB_ENT(13, 2472),
146 CHANTAB_ENT(14, 2484),
147 };
148
149 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
150 .channels = b43legacy_bg_chantable,
151 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
152 .bitrates = b43legacy_b_ratetable,
153 .n_bitrates = b43legacy_b_ratetable_size,
154 };
155
156 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
157 .channels = b43legacy_bg_chantable,
158 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
159 .bitrates = b43legacy_g_ratetable,
160 .n_bitrates = b43legacy_g_ratetable_size,
161 };
162
163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
164 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
166 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
167
168
b43legacy_ratelimit(struct b43legacy_wl * wl)169 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
170 {
171 if (!wl || !wl->current_dev)
172 return 1;
173 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
174 return 1;
175 /* We are up and running.
176 * Ratelimit the messages to avoid DoS over the net. */
177 return net_ratelimit();
178 }
179
b43legacyinfo(struct b43legacy_wl * wl,const char * fmt,...)180 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
181 {
182 struct va_format vaf;
183 va_list args;
184
185 if (!b43legacy_ratelimit(wl))
186 return;
187
188 va_start(args, fmt);
189
190 vaf.fmt = fmt;
191 vaf.va = &args;
192
193 printk(KERN_INFO "b43legacy-%s: %pV",
194 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
195
196 va_end(args);
197 }
198
b43legacyerr(struct b43legacy_wl * wl,const char * fmt,...)199 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
200 {
201 struct va_format vaf;
202 va_list args;
203
204 if (!b43legacy_ratelimit(wl))
205 return;
206
207 va_start(args, fmt);
208
209 vaf.fmt = fmt;
210 vaf.va = &args;
211
212 printk(KERN_ERR "b43legacy-%s ERROR: %pV",
213 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
214
215 va_end(args);
216 }
217
b43legacywarn(struct b43legacy_wl * wl,const char * fmt,...)218 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
219 {
220 struct va_format vaf;
221 va_list args;
222
223 if (!b43legacy_ratelimit(wl))
224 return;
225
226 va_start(args, fmt);
227
228 vaf.fmt = fmt;
229 vaf.va = &args;
230
231 printk(KERN_WARNING "b43legacy-%s warning: %pV",
232 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
233
234 va_end(args);
235 }
236
237 #if B43legacy_DEBUG
b43legacydbg(struct b43legacy_wl * wl,const char * fmt,...)238 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
239 {
240 struct va_format vaf;
241 va_list args;
242
243 va_start(args, fmt);
244
245 vaf.fmt = fmt;
246 vaf.va = &args;
247
248 printk(KERN_DEBUG "b43legacy-%s debug: %pV",
249 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
250
251 va_end(args);
252 }
253 #endif /* DEBUG */
254
b43legacy_ram_write(struct b43legacy_wldev * dev,u16 offset,u32 val)255 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
256 u32 val)
257 {
258 u32 status;
259
260 B43legacy_WARN_ON(offset % 4 != 0);
261
262 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
263 if (status & B43legacy_MACCTL_BE)
264 val = swab32(val);
265
266 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
267 mmiowb();
268 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
269 }
270
271 static inline
b43legacy_shm_control_word(struct b43legacy_wldev * dev,u16 routing,u16 offset)272 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
273 u16 routing, u16 offset)
274 {
275 u32 control;
276
277 /* "offset" is the WORD offset. */
278
279 control = routing;
280 control <<= 16;
281 control |= offset;
282 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
283 }
284
b43legacy_shm_read32(struct b43legacy_wldev * dev,u16 routing,u16 offset)285 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
286 u16 routing, u16 offset)
287 {
288 u32 ret;
289
290 if (routing == B43legacy_SHM_SHARED) {
291 B43legacy_WARN_ON((offset & 0x0001) != 0);
292 if (offset & 0x0003) {
293 /* Unaligned access */
294 b43legacy_shm_control_word(dev, routing, offset >> 2);
295 ret = b43legacy_read16(dev,
296 B43legacy_MMIO_SHM_DATA_UNALIGNED);
297 ret <<= 16;
298 b43legacy_shm_control_word(dev, routing,
299 (offset >> 2) + 1);
300 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
301
302 return ret;
303 }
304 offset >>= 2;
305 }
306 b43legacy_shm_control_word(dev, routing, offset);
307 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
308
309 return ret;
310 }
311
b43legacy_shm_read16(struct b43legacy_wldev * dev,u16 routing,u16 offset)312 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
313 u16 routing, u16 offset)
314 {
315 u16 ret;
316
317 if (routing == B43legacy_SHM_SHARED) {
318 B43legacy_WARN_ON((offset & 0x0001) != 0);
319 if (offset & 0x0003) {
320 /* Unaligned access */
321 b43legacy_shm_control_word(dev, routing, offset >> 2);
322 ret = b43legacy_read16(dev,
323 B43legacy_MMIO_SHM_DATA_UNALIGNED);
324
325 return ret;
326 }
327 offset >>= 2;
328 }
329 b43legacy_shm_control_word(dev, routing, offset);
330 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
331
332 return ret;
333 }
334
b43legacy_shm_write32(struct b43legacy_wldev * dev,u16 routing,u16 offset,u32 value)335 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
336 u16 routing, u16 offset,
337 u32 value)
338 {
339 if (routing == B43legacy_SHM_SHARED) {
340 B43legacy_WARN_ON((offset & 0x0001) != 0);
341 if (offset & 0x0003) {
342 /* Unaligned access */
343 b43legacy_shm_control_word(dev, routing, offset >> 2);
344 mmiowb();
345 b43legacy_write16(dev,
346 B43legacy_MMIO_SHM_DATA_UNALIGNED,
347 (value >> 16) & 0xffff);
348 mmiowb();
349 b43legacy_shm_control_word(dev, routing,
350 (offset >> 2) + 1);
351 mmiowb();
352 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
353 value & 0xffff);
354 return;
355 }
356 offset >>= 2;
357 }
358 b43legacy_shm_control_word(dev, routing, offset);
359 mmiowb();
360 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
361 }
362
b43legacy_shm_write16(struct b43legacy_wldev * dev,u16 routing,u16 offset,u16 value)363 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
364 u16 value)
365 {
366 if (routing == B43legacy_SHM_SHARED) {
367 B43legacy_WARN_ON((offset & 0x0001) != 0);
368 if (offset & 0x0003) {
369 /* Unaligned access */
370 b43legacy_shm_control_word(dev, routing, offset >> 2);
371 mmiowb();
372 b43legacy_write16(dev,
373 B43legacy_MMIO_SHM_DATA_UNALIGNED,
374 value);
375 return;
376 }
377 offset >>= 2;
378 }
379 b43legacy_shm_control_word(dev, routing, offset);
380 mmiowb();
381 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
382 }
383
384 /* Read HostFlags */
b43legacy_hf_read(struct b43legacy_wldev * dev)385 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
386 {
387 u32 ret;
388
389 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
390 B43legacy_SHM_SH_HOSTFHI);
391 ret <<= 16;
392 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
393 B43legacy_SHM_SH_HOSTFLO);
394
395 return ret;
396 }
397
398 /* Write HostFlags */
b43legacy_hf_write(struct b43legacy_wldev * dev,u32 value)399 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
400 {
401 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
402 B43legacy_SHM_SH_HOSTFLO,
403 (value & 0x0000FFFF));
404 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
405 B43legacy_SHM_SH_HOSTFHI,
406 ((value & 0xFFFF0000) >> 16));
407 }
408
b43legacy_tsf_read(struct b43legacy_wldev * dev,u64 * tsf)409 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
410 {
411 /* We need to be careful. As we read the TSF from multiple
412 * registers, we should take care of register overflows.
413 * In theory, the whole tsf read process should be atomic.
414 * We try to be atomic here, by restaring the read process,
415 * if any of the high registers changed (overflew).
416 */
417 if (dev->dev->id.revision >= 3) {
418 u32 low;
419 u32 high;
420 u32 high2;
421
422 do {
423 high = b43legacy_read32(dev,
424 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
425 low = b43legacy_read32(dev,
426 B43legacy_MMIO_REV3PLUS_TSF_LOW);
427 high2 = b43legacy_read32(dev,
428 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
429 } while (unlikely(high != high2));
430
431 *tsf = high;
432 *tsf <<= 32;
433 *tsf |= low;
434 } else {
435 u64 tmp;
436 u16 v0;
437 u16 v1;
438 u16 v2;
439 u16 v3;
440 u16 test1;
441 u16 test2;
442 u16 test3;
443
444 do {
445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
446 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
447 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
448 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
449
450 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
451 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
452 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
453 } while (v3 != test3 || v2 != test2 || v1 != test1);
454
455 *tsf = v3;
456 *tsf <<= 48;
457 tmp = v2;
458 tmp <<= 32;
459 *tsf |= tmp;
460 tmp = v1;
461 tmp <<= 16;
462 *tsf |= tmp;
463 *tsf |= v0;
464 }
465 }
466
b43legacy_time_lock(struct b43legacy_wldev * dev)467 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
468 {
469 u32 status;
470
471 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
472 status |= B43legacy_MACCTL_TBTTHOLD;
473 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
474 mmiowb();
475 }
476
b43legacy_time_unlock(struct b43legacy_wldev * dev)477 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
478 {
479 u32 status;
480
481 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
482 status &= ~B43legacy_MACCTL_TBTTHOLD;
483 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
484 }
485
b43legacy_tsf_write_locked(struct b43legacy_wldev * dev,u64 tsf)486 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
487 {
488 /* Be careful with the in-progress timer.
489 * First zero out the low register, so we have a full
490 * register-overflow duration to complete the operation.
491 */
492 if (dev->dev->id.revision >= 3) {
493 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
494 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
495
496 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
497 mmiowb();
498 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
499 hi);
500 mmiowb();
501 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
502 lo);
503 } else {
504 u16 v0 = (tsf & 0x000000000000FFFFULL);
505 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
506 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
508
509 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
510 mmiowb();
511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
512 mmiowb();
513 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
514 mmiowb();
515 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
516 mmiowb();
517 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
518 }
519 }
520
b43legacy_tsf_write(struct b43legacy_wldev * dev,u64 tsf)521 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
522 {
523 b43legacy_time_lock(dev);
524 b43legacy_tsf_write_locked(dev, tsf);
525 b43legacy_time_unlock(dev);
526 }
527
528 static
b43legacy_macfilter_set(struct b43legacy_wldev * dev,u16 offset,const u8 * mac)529 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
530 u16 offset, const u8 *mac)
531 {
532 static const u8 zero_addr[ETH_ALEN] = { 0 };
533 u16 data;
534
535 if (!mac)
536 mac = zero_addr;
537
538 offset |= 0x0020;
539 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
540
541 data = mac[0];
542 data |= mac[1] << 8;
543 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
544 data = mac[2];
545 data |= mac[3] << 8;
546 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
547 data = mac[4];
548 data |= mac[5] << 8;
549 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
550 }
551
b43legacy_write_mac_bssid_templates(struct b43legacy_wldev * dev)552 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
553 {
554 static const u8 zero_addr[ETH_ALEN] = { 0 };
555 const u8 *mac = dev->wl->mac_addr;
556 const u8 *bssid = dev->wl->bssid;
557 u8 mac_bssid[ETH_ALEN * 2];
558 int i;
559 u32 tmp;
560
561 if (!bssid)
562 bssid = zero_addr;
563 if (!mac)
564 mac = zero_addr;
565
566 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
567
568 memcpy(mac_bssid, mac, ETH_ALEN);
569 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
570
571 /* Write our MAC address and BSSID to template ram */
572 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
573 tmp = (u32)(mac_bssid[i + 0]);
574 tmp |= (u32)(mac_bssid[i + 1]) << 8;
575 tmp |= (u32)(mac_bssid[i + 2]) << 16;
576 tmp |= (u32)(mac_bssid[i + 3]) << 24;
577 b43legacy_ram_write(dev, 0x20 + i, tmp);
578 b43legacy_ram_write(dev, 0x78 + i, tmp);
579 b43legacy_ram_write(dev, 0x478 + i, tmp);
580 }
581 }
582
b43legacy_upload_card_macaddress(struct b43legacy_wldev * dev)583 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
584 {
585 b43legacy_write_mac_bssid_templates(dev);
586 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
587 dev->wl->mac_addr);
588 }
589
b43legacy_set_slot_time(struct b43legacy_wldev * dev,u16 slot_time)590 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
591 u16 slot_time)
592 {
593 /* slot_time is in usec. */
594 if (dev->phy.type != B43legacy_PHYTYPE_G)
595 return;
596 b43legacy_write16(dev, 0x684, 510 + slot_time);
597 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
598 slot_time);
599 }
600
b43legacy_short_slot_timing_enable(struct b43legacy_wldev * dev)601 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
602 {
603 b43legacy_set_slot_time(dev, 9);
604 }
605
b43legacy_short_slot_timing_disable(struct b43legacy_wldev * dev)606 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
607 {
608 b43legacy_set_slot_time(dev, 20);
609 }
610
611 /* Synchronize IRQ top- and bottom-half.
612 * IRQs must be masked before calling this.
613 * This must not be called with the irq_lock held.
614 */
b43legacy_synchronize_irq(struct b43legacy_wldev * dev)615 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
616 {
617 synchronize_irq(dev->dev->irq);
618 tasklet_kill(&dev->isr_tasklet);
619 }
620
621 /* DummyTransmission function, as documented on
622 * http://bcm-specs.sipsolutions.net/DummyTransmission
623 */
b43legacy_dummy_transmission(struct b43legacy_wldev * dev)624 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
625 {
626 struct b43legacy_phy *phy = &dev->phy;
627 unsigned int i;
628 unsigned int max_loop;
629 u16 value;
630 u32 buffer[5] = {
631 0x00000000,
632 0x00D40000,
633 0x00000000,
634 0x01000000,
635 0x00000000,
636 };
637
638 switch (phy->type) {
639 case B43legacy_PHYTYPE_B:
640 case B43legacy_PHYTYPE_G:
641 max_loop = 0xFA;
642 buffer[0] = 0x000B846E;
643 break;
644 default:
645 B43legacy_BUG_ON(1);
646 return;
647 }
648
649 for (i = 0; i < 5; i++)
650 b43legacy_ram_write(dev, i * 4, buffer[i]);
651
652 /* dummy read follows */
653 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
654
655 b43legacy_write16(dev, 0x0568, 0x0000);
656 b43legacy_write16(dev, 0x07C0, 0x0000);
657 b43legacy_write16(dev, 0x050C, 0x0000);
658 b43legacy_write16(dev, 0x0508, 0x0000);
659 b43legacy_write16(dev, 0x050A, 0x0000);
660 b43legacy_write16(dev, 0x054C, 0x0000);
661 b43legacy_write16(dev, 0x056A, 0x0014);
662 b43legacy_write16(dev, 0x0568, 0x0826);
663 b43legacy_write16(dev, 0x0500, 0x0000);
664 b43legacy_write16(dev, 0x0502, 0x0030);
665
666 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
667 b43legacy_radio_write16(dev, 0x0051, 0x0017);
668 for (i = 0x00; i < max_loop; i++) {
669 value = b43legacy_read16(dev, 0x050E);
670 if (value & 0x0080)
671 break;
672 udelay(10);
673 }
674 for (i = 0x00; i < 0x0A; i++) {
675 value = b43legacy_read16(dev, 0x050E);
676 if (value & 0x0400)
677 break;
678 udelay(10);
679 }
680 for (i = 0x00; i < 0x0A; i++) {
681 value = b43legacy_read16(dev, 0x0690);
682 if (!(value & 0x0100))
683 break;
684 udelay(10);
685 }
686 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
687 b43legacy_radio_write16(dev, 0x0051, 0x0037);
688 }
689
690 /* Turn the Analog ON/OFF */
b43legacy_switch_analog(struct b43legacy_wldev * dev,int on)691 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
692 {
693 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
694 }
695
b43legacy_wireless_core_reset(struct b43legacy_wldev * dev,u32 flags)696 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
697 {
698 u32 tmslow;
699 u32 macctl;
700
701 flags |= B43legacy_TMSLOW_PHYCLKEN;
702 flags |= B43legacy_TMSLOW_PHYRESET;
703 ssb_device_enable(dev->dev, flags);
704 msleep(2); /* Wait for the PLL to turn on. */
705
706 /* Now take the PHY out of Reset again */
707 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
708 tmslow |= SSB_TMSLOW_FGC;
709 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
710 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
711 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
712 msleep(1);
713 tmslow &= ~SSB_TMSLOW_FGC;
714 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
715 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
716 msleep(1);
717
718 /* Turn Analog ON */
719 b43legacy_switch_analog(dev, 1);
720
721 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
722 macctl &= ~B43legacy_MACCTL_GMODE;
723 if (flags & B43legacy_TMSLOW_GMODE) {
724 macctl |= B43legacy_MACCTL_GMODE;
725 dev->phy.gmode = true;
726 } else
727 dev->phy.gmode = false;
728 macctl |= B43legacy_MACCTL_IHR_ENABLED;
729 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
730 }
731
handle_irq_transmit_status(struct b43legacy_wldev * dev)732 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
733 {
734 u32 v0;
735 u32 v1;
736 u16 tmp;
737 struct b43legacy_txstatus stat;
738
739 while (1) {
740 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
741 if (!(v0 & 0x00000001))
742 break;
743 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
744
745 stat.cookie = (v0 >> 16);
746 stat.seq = (v1 & 0x0000FFFF);
747 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
748 tmp = (v0 & 0x0000FFFF);
749 stat.frame_count = ((tmp & 0xF000) >> 12);
750 stat.rts_count = ((tmp & 0x0F00) >> 8);
751 stat.supp_reason = ((tmp & 0x001C) >> 2);
752 stat.pm_indicated = !!(tmp & 0x0080);
753 stat.intermediate = !!(tmp & 0x0040);
754 stat.for_ampdu = !!(tmp & 0x0020);
755 stat.acked = !!(tmp & 0x0002);
756
757 b43legacy_handle_txstatus(dev, &stat);
758 }
759 }
760
drain_txstatus_queue(struct b43legacy_wldev * dev)761 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
762 {
763 u32 dummy;
764
765 if (dev->dev->id.revision < 5)
766 return;
767 /* Read all entries from the microcode TXstatus FIFO
768 * and throw them away.
769 */
770 while (1) {
771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
772 if (!(dummy & 0x00000001))
773 break;
774 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
775 }
776 }
777
b43legacy_jssi_read(struct b43legacy_wldev * dev)778 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
779 {
780 u32 val = 0;
781
782 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
783 val <<= 16;
784 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
785
786 return val;
787 }
788
b43legacy_jssi_write(struct b43legacy_wldev * dev,u32 jssi)789 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
790 {
791 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
792 (jssi & 0x0000FFFF));
793 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
794 (jssi & 0xFFFF0000) >> 16);
795 }
796
b43legacy_generate_noise_sample(struct b43legacy_wldev * dev)797 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
798 {
799 b43legacy_jssi_write(dev, 0x7F7F7F7F);
800 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
801 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
802 | B43legacy_MACCMD_BGNOISE);
803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
804 dev->phy.channel);
805 }
806
b43legacy_calculate_link_quality(struct b43legacy_wldev * dev)807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
808 {
809 /* Top half of Link Quality calculation. */
810
811 if (dev->noisecalc.calculation_running)
812 return;
813 dev->noisecalc.channel_at_start = dev->phy.channel;
814 dev->noisecalc.calculation_running = true;
815 dev->noisecalc.nr_samples = 0;
816
817 b43legacy_generate_noise_sample(dev);
818 }
819
handle_irq_noise(struct b43legacy_wldev * dev)820 static void handle_irq_noise(struct b43legacy_wldev *dev)
821 {
822 struct b43legacy_phy *phy = &dev->phy;
823 u16 tmp;
824 u8 noise[4];
825 u8 i;
826 u8 j;
827 s32 average;
828
829 /* Bottom half of Link Quality calculation. */
830
831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
832 if (dev->noisecalc.channel_at_start != phy->channel)
833 goto drop_calculation;
834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
835 if (noise[0] == 0x7F || noise[1] == 0x7F ||
836 noise[2] == 0x7F || noise[3] == 0x7F)
837 goto generate_new;
838
839 /* Get the noise samples. */
840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
841 i = dev->noisecalc.nr_samples;
842 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
850 dev->noisecalc.nr_samples++;
851 if (dev->noisecalc.nr_samples == 8) {
852 /* Calculate the Link Quality by the noise samples. */
853 average = 0;
854 for (i = 0; i < 8; i++) {
855 for (j = 0; j < 4; j++)
856 average += dev->noisecalc.samples[i][j];
857 }
858 average /= (8 * 4);
859 average *= 125;
860 average += 64;
861 average /= 128;
862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
863 0x40C);
864 tmp = (tmp / 128) & 0x1F;
865 if (tmp >= 8)
866 average += 2;
867 else
868 average -= 25;
869 if (tmp == 8)
870 average -= 72;
871 else
872 average -= 48;
873
874 dev->stats.link_noise = average;
875 drop_calculation:
876 dev->noisecalc.calculation_running = false;
877 return;
878 }
879 generate_new:
880 b43legacy_generate_noise_sample(dev);
881 }
882
handle_irq_tbtt_indication(struct b43legacy_wldev * dev)883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
884 {
885 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
886 /* TODO: PS TBTT */
887 } else {
888 if (1/*FIXME: the last PSpoll frame was sent successfully */)
889 b43legacy_power_saving_ctl_bits(dev, -1, -1);
890 }
891 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
892 dev->dfq_valid = true;
893 }
894
handle_irq_atim_end(struct b43legacy_wldev * dev)895 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
896 {
897 if (dev->dfq_valid) {
898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
900 | B43legacy_MACCMD_DFQ_VALID);
901 dev->dfq_valid = false;
902 }
903 }
904
handle_irq_pmq(struct b43legacy_wldev * dev)905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
906 {
907 u32 tmp;
908
909 /* TODO: AP mode. */
910
911 while (1) {
912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
913 if (!(tmp & 0x00000008))
914 break;
915 }
916 /* 16bit write is odd, but correct. */
917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
918 }
919
b43legacy_write_template_common(struct b43legacy_wldev * dev,const u8 * data,u16 size,u16 ram_offset,u16 shm_size_offset,u8 rate)920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
921 const u8 *data, u16 size,
922 u16 ram_offset,
923 u16 shm_size_offset, u8 rate)
924 {
925 u32 i;
926 u32 tmp;
927 struct b43legacy_plcp_hdr4 plcp;
928
929 plcp.data = 0;
930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
932 ram_offset += sizeof(u32);
933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
934 * So leave the first two bytes of the next write blank.
935 */
936 tmp = (u32)(data[0]) << 16;
937 tmp |= (u32)(data[1]) << 24;
938 b43legacy_ram_write(dev, ram_offset, tmp);
939 ram_offset += sizeof(u32);
940 for (i = 2; i < size; i += sizeof(u32)) {
941 tmp = (u32)(data[i + 0]);
942 if (i + 1 < size)
943 tmp |= (u32)(data[i + 1]) << 8;
944 if (i + 2 < size)
945 tmp |= (u32)(data[i + 2]) << 16;
946 if (i + 3 < size)
947 tmp |= (u32)(data[i + 3]) << 24;
948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
949 }
950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
951 size + sizeof(struct b43legacy_plcp_hdr6));
952 }
953
954 /* Convert a b43legacy antenna number value to the PHY TX control value. */
b43legacy_antenna_to_phyctl(int antenna)955 static u16 b43legacy_antenna_to_phyctl(int antenna)
956 {
957 switch (antenna) {
958 case B43legacy_ANTENNA0:
959 return B43legacy_TX4_PHY_ANT0;
960 case B43legacy_ANTENNA1:
961 return B43legacy_TX4_PHY_ANT1;
962 }
963 return B43legacy_TX4_PHY_ANTLAST;
964 }
965
b43legacy_write_beacon_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset)966 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
967 u16 ram_offset,
968 u16 shm_size_offset)
969 {
970
971 unsigned int i, len, variable_len;
972 const struct ieee80211_mgmt *bcn;
973 const u8 *ie;
974 bool tim_found = false;
975 unsigned int rate;
976 u16 ctl;
977 int antenna;
978 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
979
980 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
981 len = min_t(size_t, dev->wl->current_beacon->len,
982 0x200 - sizeof(struct b43legacy_plcp_hdr6));
983 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
984
985 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
986 shm_size_offset, rate);
987
988 /* Write the PHY TX control parameters. */
989 antenna = B43legacy_ANTENNA_DEFAULT;
990 antenna = b43legacy_antenna_to_phyctl(antenna);
991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
992 B43legacy_SHM_SH_BEACPHYCTL);
993 /* We can't send beacons with short preamble. Would get PHY errors. */
994 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
995 ctl &= ~B43legacy_TX4_PHY_ANT;
996 ctl &= ~B43legacy_TX4_PHY_ENC;
997 ctl |= antenna;
998 ctl |= B43legacy_TX4_PHY_ENC_CCK;
999 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1000 B43legacy_SHM_SH_BEACPHYCTL, ctl);
1001
1002 /* Find the position of the TIM and the DTIM_period value
1003 * and write them to SHM. */
1004 ie = bcn->u.beacon.variable;
1005 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1006 for (i = 0; i < variable_len - 2; ) {
1007 uint8_t ie_id, ie_len;
1008
1009 ie_id = ie[i];
1010 ie_len = ie[i + 1];
1011 if (ie_id == 5) {
1012 u16 tim_position;
1013 u16 dtim_period;
1014 /* This is the TIM Information Element */
1015
1016 /* Check whether the ie_len is in the beacon data range. */
1017 if (variable_len < ie_len + 2 + i)
1018 break;
1019 /* A valid TIM is at least 4 bytes long. */
1020 if (ie_len < 4)
1021 break;
1022 tim_found = true;
1023
1024 tim_position = sizeof(struct b43legacy_plcp_hdr6);
1025 tim_position += offsetof(struct ieee80211_mgmt,
1026 u.beacon.variable);
1027 tim_position += i;
1028
1029 dtim_period = ie[i + 3];
1030
1031 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1032 B43legacy_SHM_SH_TIMPOS, tim_position);
1033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1034 B43legacy_SHM_SH_DTIMP, dtim_period);
1035 break;
1036 }
1037 i += ie_len + 2;
1038 }
1039 if (!tim_found) {
1040 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1041 "beacon template packet. AP or IBSS operation "
1042 "may be broken.\n");
1043 } else
1044 b43legacydbg(dev->wl, "Updated beacon template\n");
1045 }
1046
b43legacy_write_probe_resp_plcp(struct b43legacy_wldev * dev,u16 shm_offset,u16 size,struct ieee80211_rate * rate)1047 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1048 u16 shm_offset, u16 size,
1049 struct ieee80211_rate *rate)
1050 {
1051 struct b43legacy_plcp_hdr4 plcp;
1052 u32 tmp;
1053 __le16 dur;
1054
1055 plcp.data = 0;
1056 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1057 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1058 dev->wl->vif,
1059 IEEE80211_BAND_2GHZ,
1060 size,
1061 rate);
1062 /* Write PLCP in two parts and timing for packet transfer */
1063 tmp = le32_to_cpu(plcp.data);
1064 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1065 tmp & 0xFFFF);
1066 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1067 tmp >> 16);
1068 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1069 le16_to_cpu(dur));
1070 }
1071
1072 /* Instead of using custom probe response template, this function
1073 * just patches custom beacon template by:
1074 * 1) Changing packet type
1075 * 2) Patching duration field
1076 * 3) Stripping TIM
1077 */
b43legacy_generate_probe_resp(struct b43legacy_wldev * dev,u16 * dest_size,struct ieee80211_rate * rate)1078 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1079 u16 *dest_size,
1080 struct ieee80211_rate *rate)
1081 {
1082 const u8 *src_data;
1083 u8 *dest_data;
1084 u16 src_size, elem_size, src_pos, dest_pos;
1085 __le16 dur;
1086 struct ieee80211_hdr *hdr;
1087 size_t ie_start;
1088
1089 src_size = dev->wl->current_beacon->len;
1090 src_data = (const u8 *)dev->wl->current_beacon->data;
1091
1092 /* Get the start offset of the variable IEs in the packet. */
1093 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1094 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1095 u.beacon.variable));
1096
1097 if (B43legacy_WARN_ON(src_size < ie_start))
1098 return NULL;
1099
1100 dest_data = kmalloc(src_size, GFP_ATOMIC);
1101 if (unlikely(!dest_data))
1102 return NULL;
1103
1104 /* Copy the static data and all Information Elements, except the TIM. */
1105 memcpy(dest_data, src_data, ie_start);
1106 src_pos = ie_start;
1107 dest_pos = ie_start;
1108 for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1109 elem_size = src_data[src_pos + 1] + 2;
1110 if (src_data[src_pos] == 5) {
1111 /* This is the TIM. */
1112 continue;
1113 }
1114 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1115 dest_pos += elem_size;
1116 }
1117 *dest_size = dest_pos;
1118 hdr = (struct ieee80211_hdr *)dest_data;
1119
1120 /* Set the frame control. */
1121 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1122 IEEE80211_STYPE_PROBE_RESP);
1123 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1124 dev->wl->vif,
1125 IEEE80211_BAND_2GHZ,
1126 *dest_size,
1127 rate);
1128 hdr->duration_id = dur;
1129
1130 return dest_data;
1131 }
1132
b43legacy_write_probe_resp_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset,struct ieee80211_rate * rate)1133 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1134 u16 ram_offset,
1135 u16 shm_size_offset,
1136 struct ieee80211_rate *rate)
1137 {
1138 const u8 *probe_resp_data;
1139 u16 size;
1140
1141 size = dev->wl->current_beacon->len;
1142 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1143 if (unlikely(!probe_resp_data))
1144 return;
1145
1146 /* Looks like PLCP headers plus packet timings are stored for
1147 * all possible basic rates
1148 */
1149 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1150 &b43legacy_b_ratetable[0]);
1151 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1152 &b43legacy_b_ratetable[1]);
1153 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1154 &b43legacy_b_ratetable[2]);
1155 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1156 &b43legacy_b_ratetable[3]);
1157
1158 size = min_t(size_t, size,
1159 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1160 b43legacy_write_template_common(dev, probe_resp_data,
1161 size, ram_offset,
1162 shm_size_offset, rate->hw_value);
1163 kfree(probe_resp_data);
1164 }
1165
b43legacy_upload_beacon0(struct b43legacy_wldev * dev)1166 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1167 {
1168 struct b43legacy_wl *wl = dev->wl;
1169
1170 if (wl->beacon0_uploaded)
1171 return;
1172 b43legacy_write_beacon_template(dev, 0x68, 0x18);
1173 /* FIXME: Probe resp upload doesn't really belong here,
1174 * but we don't use that feature anyway. */
1175 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1176 &__b43legacy_ratetable[3]);
1177 wl->beacon0_uploaded = true;
1178 }
1179
b43legacy_upload_beacon1(struct b43legacy_wldev * dev)1180 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1181 {
1182 struct b43legacy_wl *wl = dev->wl;
1183
1184 if (wl->beacon1_uploaded)
1185 return;
1186 b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1187 wl->beacon1_uploaded = true;
1188 }
1189
handle_irq_beacon(struct b43legacy_wldev * dev)1190 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1191 {
1192 struct b43legacy_wl *wl = dev->wl;
1193 u32 cmd, beacon0_valid, beacon1_valid;
1194
1195 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1196 return;
1197
1198 /* This is the bottom half of the asynchronous beacon update. */
1199
1200 /* Ignore interrupt in the future. */
1201 dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1202
1203 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1205 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1206
1207 /* Schedule interrupt manually, if busy. */
1208 if (beacon0_valid && beacon1_valid) {
1209 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1210 dev->irq_mask |= B43legacy_IRQ_BEACON;
1211 return;
1212 }
1213
1214 if (unlikely(wl->beacon_templates_virgin)) {
1215 /* We never uploaded a beacon before.
1216 * Upload both templates now, but only mark one valid. */
1217 wl->beacon_templates_virgin = false;
1218 b43legacy_upload_beacon0(dev);
1219 b43legacy_upload_beacon1(dev);
1220 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1221 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1222 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1223 } else {
1224 if (!beacon0_valid) {
1225 b43legacy_upload_beacon0(dev);
1226 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1227 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1228 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1229 } else if (!beacon1_valid) {
1230 b43legacy_upload_beacon1(dev);
1231 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1232 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1233 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1234 }
1235 }
1236 }
1237
b43legacy_beacon_update_trigger_work(struct work_struct * work)1238 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1239 {
1240 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1241 beacon_update_trigger);
1242 struct b43legacy_wldev *dev;
1243
1244 mutex_lock(&wl->mutex);
1245 dev = wl->current_dev;
1246 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1247 spin_lock_irq(&wl->irq_lock);
1248 /* Update beacon right away or defer to IRQ. */
1249 handle_irq_beacon(dev);
1250 /* The handler might have updated the IRQ mask. */
1251 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1252 dev->irq_mask);
1253 mmiowb();
1254 spin_unlock_irq(&wl->irq_lock);
1255 }
1256 mutex_unlock(&wl->mutex);
1257 }
1258
1259 /* Asynchronously update the packet templates in template RAM.
1260 * Locking: Requires wl->irq_lock to be locked. */
b43legacy_update_templates(struct b43legacy_wl * wl)1261 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1262 {
1263 struct sk_buff *beacon;
1264 /* This is the top half of the ansynchronous beacon update. The bottom
1265 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1266 * sending an invalid beacon. This can happen for example, if the
1267 * firmware transmits a beacon while we are updating it. */
1268
1269 /* We could modify the existing beacon and set the aid bit in the TIM
1270 * field, but that would probably require resizing and moving of data
1271 * within the beacon template. Simply request a new beacon and let
1272 * mac80211 do the hard work. */
1273 beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1274 if (unlikely(!beacon))
1275 return;
1276
1277 if (wl->current_beacon)
1278 dev_kfree_skb_any(wl->current_beacon);
1279 wl->current_beacon = beacon;
1280 wl->beacon0_uploaded = false;
1281 wl->beacon1_uploaded = false;
1282 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1283 }
1284
b43legacy_set_beacon_int(struct b43legacy_wldev * dev,u16 beacon_int)1285 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1286 u16 beacon_int)
1287 {
1288 b43legacy_time_lock(dev);
1289 if (dev->dev->id.revision >= 3) {
1290 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1291 (beacon_int << 16));
1292 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1293 (beacon_int << 10));
1294 } else {
1295 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1296 b43legacy_write16(dev, 0x610, beacon_int);
1297 }
1298 b43legacy_time_unlock(dev);
1299 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1300 }
1301
handle_irq_ucode_debug(struct b43legacy_wldev * dev)1302 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1303 {
1304 }
1305
1306 /* Interrupt handler bottom-half */
b43legacy_interrupt_tasklet(unsigned long data)1307 static void b43legacy_interrupt_tasklet(unsigned long data)
1308 {
1309 struct b43legacy_wldev *dev = (struct b43legacy_wldev *)data;
1310 u32 reason;
1311 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1312 u32 merged_dma_reason = 0;
1313 int i;
1314 unsigned long flags;
1315
1316 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1317
1318 B43legacy_WARN_ON(b43legacy_status(dev) <
1319 B43legacy_STAT_INITIALIZED);
1320
1321 reason = dev->irq_reason;
1322 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1323 dma_reason[i] = dev->dma_reason[i];
1324 merged_dma_reason |= dma_reason[i];
1325 }
1326
1327 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1328 b43legacyerr(dev->wl, "MAC transmission error\n");
1329
1330 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1331 b43legacyerr(dev->wl, "PHY transmission error\n");
1332 rmb();
1333 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1334 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1335 "restarting the controller\n");
1336 b43legacy_controller_restart(dev, "PHY TX errors");
1337 }
1338 }
1339
1340 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1341 B43legacy_DMAIRQ_NONFATALMASK))) {
1342 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1343 b43legacyerr(dev->wl, "Fatal DMA error: "
1344 "0x%08X, 0x%08X, 0x%08X, "
1345 "0x%08X, 0x%08X, 0x%08X\n",
1346 dma_reason[0], dma_reason[1],
1347 dma_reason[2], dma_reason[3],
1348 dma_reason[4], dma_reason[5]);
1349 b43legacy_controller_restart(dev, "DMA error");
1350 mmiowb();
1351 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1352 return;
1353 }
1354 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1355 b43legacyerr(dev->wl, "DMA error: "
1356 "0x%08X, 0x%08X, 0x%08X, "
1357 "0x%08X, 0x%08X, 0x%08X\n",
1358 dma_reason[0], dma_reason[1],
1359 dma_reason[2], dma_reason[3],
1360 dma_reason[4], dma_reason[5]);
1361 }
1362
1363 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1364 handle_irq_ucode_debug(dev);
1365 if (reason & B43legacy_IRQ_TBTT_INDI)
1366 handle_irq_tbtt_indication(dev);
1367 if (reason & B43legacy_IRQ_ATIM_END)
1368 handle_irq_atim_end(dev);
1369 if (reason & B43legacy_IRQ_BEACON)
1370 handle_irq_beacon(dev);
1371 if (reason & B43legacy_IRQ_PMQ)
1372 handle_irq_pmq(dev);
1373 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1374 ;/*TODO*/
1375 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1376 handle_irq_noise(dev);
1377
1378 /* Check the DMA reason registers for received data. */
1379 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1380 if (b43legacy_using_pio(dev))
1381 b43legacy_pio_rx(dev->pio.queue0);
1382 else
1383 b43legacy_dma_rx(dev->dma.rx_ring0);
1384 }
1385 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1386 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1387 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1388 if (b43legacy_using_pio(dev))
1389 b43legacy_pio_rx(dev->pio.queue3);
1390 else
1391 b43legacy_dma_rx(dev->dma.rx_ring3);
1392 }
1393 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1394 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1395
1396 if (reason & B43legacy_IRQ_TX_OK)
1397 handle_irq_transmit_status(dev);
1398
1399 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1400 mmiowb();
1401 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1402 }
1403
pio_irq_workaround(struct b43legacy_wldev * dev,u16 base,int queueidx)1404 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1405 u16 base, int queueidx)
1406 {
1407 u16 rxctl;
1408
1409 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1410 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1411 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1412 else
1413 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1414 }
1415
b43legacy_interrupt_ack(struct b43legacy_wldev * dev,u32 reason)1416 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1417 {
1418 if (b43legacy_using_pio(dev) &&
1419 (dev->dev->id.revision < 3) &&
1420 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1421 /* Apply a PIO specific workaround to the dma_reasons */
1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1423 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1424 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1425 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1426 }
1427
1428 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1429
1430 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1431 dev->dma_reason[0]);
1432 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1433 dev->dma_reason[1]);
1434 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1435 dev->dma_reason[2]);
1436 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1437 dev->dma_reason[3]);
1438 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1439 dev->dma_reason[4]);
1440 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1441 dev->dma_reason[5]);
1442 }
1443
1444 /* Interrupt handler top-half */
b43legacy_interrupt_handler(int irq,void * dev_id)1445 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1446 {
1447 irqreturn_t ret = IRQ_NONE;
1448 struct b43legacy_wldev *dev = dev_id;
1449 u32 reason;
1450
1451 B43legacy_WARN_ON(!dev);
1452
1453 spin_lock(&dev->wl->irq_lock);
1454
1455 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1456 /* This can only happen on shared IRQ lines. */
1457 goto out;
1458 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1459 if (reason == 0xffffffff) /* shared IRQ */
1460 goto out;
1461 ret = IRQ_HANDLED;
1462 reason &= dev->irq_mask;
1463 if (!reason)
1464 goto out;
1465
1466 dev->dma_reason[0] = b43legacy_read32(dev,
1467 B43legacy_MMIO_DMA0_REASON)
1468 & 0x0001DC00;
1469 dev->dma_reason[1] = b43legacy_read32(dev,
1470 B43legacy_MMIO_DMA1_REASON)
1471 & 0x0000DC00;
1472 dev->dma_reason[2] = b43legacy_read32(dev,
1473 B43legacy_MMIO_DMA2_REASON)
1474 & 0x0000DC00;
1475 dev->dma_reason[3] = b43legacy_read32(dev,
1476 B43legacy_MMIO_DMA3_REASON)
1477 & 0x0001DC00;
1478 dev->dma_reason[4] = b43legacy_read32(dev,
1479 B43legacy_MMIO_DMA4_REASON)
1480 & 0x0000DC00;
1481 dev->dma_reason[5] = b43legacy_read32(dev,
1482 B43legacy_MMIO_DMA5_REASON)
1483 & 0x0000DC00;
1484
1485 b43legacy_interrupt_ack(dev, reason);
1486 /* Disable all IRQs. They are enabled again in the bottom half. */
1487 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1488 /* Save the reason code and call our bottom half. */
1489 dev->irq_reason = reason;
1490 tasklet_schedule(&dev->isr_tasklet);
1491 out:
1492 mmiowb();
1493 spin_unlock(&dev->wl->irq_lock);
1494
1495 return ret;
1496 }
1497
b43legacy_release_firmware(struct b43legacy_wldev * dev)1498 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1499 {
1500 release_firmware(dev->fw.ucode);
1501 dev->fw.ucode = NULL;
1502 release_firmware(dev->fw.pcm);
1503 dev->fw.pcm = NULL;
1504 release_firmware(dev->fw.initvals);
1505 dev->fw.initvals = NULL;
1506 release_firmware(dev->fw.initvals_band);
1507 dev->fw.initvals_band = NULL;
1508 }
1509
b43legacy_print_fw_helptext(struct b43legacy_wl * wl)1510 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1511 {
1512 b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/"
1513 "Drivers/b43#devicefirmware "
1514 "and download the correct firmware (version 3).\n");
1515 }
1516
b43legacy_fw_cb(const struct firmware * firmware,void * context)1517 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1518 {
1519 struct b43legacy_wldev *dev = context;
1520
1521 dev->fwp = firmware;
1522 complete(&dev->fw_load_complete);
1523 }
1524
do_request_fw(struct b43legacy_wldev * dev,const char * name,const struct firmware ** fw,bool async)1525 static int do_request_fw(struct b43legacy_wldev *dev,
1526 const char *name,
1527 const struct firmware **fw, bool async)
1528 {
1529 char path[sizeof(modparam_fwpostfix) + 32];
1530 struct b43legacy_fw_header *hdr;
1531 u32 size;
1532 int err;
1533
1534 if (!name)
1535 return 0;
1536
1537 snprintf(path, ARRAY_SIZE(path),
1538 "b43legacy%s/%s.fw",
1539 modparam_fwpostfix, name);
1540 b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1541 if (async) {
1542 init_completion(&dev->fw_load_complete);
1543 err = request_firmware_nowait(THIS_MODULE, 1, path,
1544 dev->dev->dev, GFP_KERNEL,
1545 dev, b43legacy_fw_cb);
1546 if (err) {
1547 b43legacyerr(dev->wl, "Unable to load firmware\n");
1548 return err;
1549 }
1550 /* stall here until fw ready */
1551 wait_for_completion(&dev->fw_load_complete);
1552 if (!dev->fwp)
1553 err = -EINVAL;
1554 *fw = dev->fwp;
1555 } else {
1556 err = request_firmware(fw, path, dev->dev->dev);
1557 }
1558 if (err) {
1559 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1560 "or load failed.\n", path);
1561 return err;
1562 }
1563 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1564 goto err_format;
1565 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1566 switch (hdr->type) {
1567 case B43legacy_FW_TYPE_UCODE:
1568 case B43legacy_FW_TYPE_PCM:
1569 size = be32_to_cpu(hdr->size);
1570 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1571 goto err_format;
1572 /* fallthrough */
1573 case B43legacy_FW_TYPE_IV:
1574 if (hdr->ver != 1)
1575 goto err_format;
1576 break;
1577 default:
1578 goto err_format;
1579 }
1580
1581 return err;
1582
1583 err_format:
1584 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1585 return -EPROTO;
1586 }
1587
1588 static int b43legacy_one_core_attach(struct ssb_device *dev,
1589 struct b43legacy_wl *wl);
1590 static void b43legacy_one_core_detach(struct ssb_device *dev);
1591
b43legacy_request_firmware(struct work_struct * work)1592 static void b43legacy_request_firmware(struct work_struct *work)
1593 {
1594 struct b43legacy_wl *wl = container_of(work,
1595 struct b43legacy_wl, firmware_load);
1596 struct b43legacy_wldev *dev = wl->current_dev;
1597 struct b43legacy_firmware *fw = &dev->fw;
1598 const u8 rev = dev->dev->id.revision;
1599 const char *filename;
1600 int err;
1601
1602 if (!fw->ucode) {
1603 if (rev == 2)
1604 filename = "ucode2";
1605 else if (rev == 4)
1606 filename = "ucode4";
1607 else
1608 filename = "ucode5";
1609 err = do_request_fw(dev, filename, &fw->ucode, true);
1610 if (err)
1611 goto err_load;
1612 }
1613 if (!fw->pcm) {
1614 if (rev < 5)
1615 filename = "pcm4";
1616 else
1617 filename = "pcm5";
1618 err = do_request_fw(dev, filename, &fw->pcm, false);
1619 if (err)
1620 goto err_load;
1621 }
1622 if (!fw->initvals) {
1623 switch (dev->phy.type) {
1624 case B43legacy_PHYTYPE_B:
1625 case B43legacy_PHYTYPE_G:
1626 if ((rev >= 5) && (rev <= 10))
1627 filename = "b0g0initvals5";
1628 else if (rev == 2 || rev == 4)
1629 filename = "b0g0initvals2";
1630 else
1631 goto err_no_initvals;
1632 break;
1633 default:
1634 goto err_no_initvals;
1635 }
1636 err = do_request_fw(dev, filename, &fw->initvals, false);
1637 if (err)
1638 goto err_load;
1639 }
1640 if (!fw->initvals_band) {
1641 switch (dev->phy.type) {
1642 case B43legacy_PHYTYPE_B:
1643 case B43legacy_PHYTYPE_G:
1644 if ((rev >= 5) && (rev <= 10))
1645 filename = "b0g0bsinitvals5";
1646 else if (rev >= 11)
1647 filename = NULL;
1648 else if (rev == 2 || rev == 4)
1649 filename = NULL;
1650 else
1651 goto err_no_initvals;
1652 break;
1653 default:
1654 goto err_no_initvals;
1655 }
1656 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1657 if (err)
1658 goto err_load;
1659 }
1660 err = ieee80211_register_hw(wl->hw);
1661 if (err)
1662 goto err_one_core_detach;
1663 return;
1664
1665 err_one_core_detach:
1666 b43legacy_one_core_detach(dev->dev);
1667 goto error;
1668
1669 err_load:
1670 b43legacy_print_fw_helptext(dev->wl);
1671 goto error;
1672
1673 err_no_initvals:
1674 err = -ENODEV;
1675 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1676 "core rev %u\n", dev->phy.type, rev);
1677 goto error;
1678
1679 error:
1680 b43legacy_release_firmware(dev);
1681 return;
1682 }
1683
b43legacy_upload_microcode(struct b43legacy_wldev * dev)1684 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1685 {
1686 struct wiphy *wiphy = dev->wl->hw->wiphy;
1687 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1688 const __be32 *data;
1689 unsigned int i;
1690 unsigned int len;
1691 u16 fwrev;
1692 u16 fwpatch;
1693 u16 fwdate;
1694 u16 fwtime;
1695 u32 tmp, macctl;
1696 int err = 0;
1697
1698 /* Jump the microcode PSM to offset 0 */
1699 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1700 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1701 macctl |= B43legacy_MACCTL_PSM_JMP0;
1702 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1703 /* Zero out all microcode PSM registers and shared memory. */
1704 for (i = 0; i < 64; i++)
1705 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1706 for (i = 0; i < 4096; i += 2)
1707 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1708
1709 /* Upload Microcode. */
1710 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1711 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1712 b43legacy_shm_control_word(dev,
1713 B43legacy_SHM_UCODE |
1714 B43legacy_SHM_AUTOINC_W,
1715 0x0000);
1716 for (i = 0; i < len; i++) {
1717 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1718 be32_to_cpu(data[i]));
1719 udelay(10);
1720 }
1721
1722 if (dev->fw.pcm) {
1723 /* Upload PCM data. */
1724 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1725 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1726 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1727 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1728 /* No need for autoinc bit in SHM_HW */
1729 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1730 for (i = 0; i < len; i++) {
1731 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1732 be32_to_cpu(data[i]));
1733 udelay(10);
1734 }
1735 }
1736
1737 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1738 B43legacy_IRQ_ALL);
1739
1740 /* Start the microcode PSM */
1741 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1742 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1743 macctl |= B43legacy_MACCTL_PSM_RUN;
1744 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1745
1746 /* Wait for the microcode to load and respond */
1747 i = 0;
1748 while (1) {
1749 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1750 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1751 break;
1752 i++;
1753 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1754 b43legacyerr(dev->wl, "Microcode not responding\n");
1755 b43legacy_print_fw_helptext(dev->wl);
1756 err = -ENODEV;
1757 goto error;
1758 }
1759 msleep_interruptible(50);
1760 if (signal_pending(current)) {
1761 err = -EINTR;
1762 goto error;
1763 }
1764 }
1765 /* dummy read follows */
1766 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1767
1768 /* Get and check the revisions. */
1769 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1770 B43legacy_SHM_SH_UCODEREV);
1771 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1772 B43legacy_SHM_SH_UCODEPATCH);
1773 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1774 B43legacy_SHM_SH_UCODEDATE);
1775 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1776 B43legacy_SHM_SH_UCODETIME);
1777
1778 if (fwrev > 0x128) {
1779 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1780 " Only firmware from binary drivers version 3.x"
1781 " is supported. You must change your firmware"
1782 " files.\n");
1783 b43legacy_print_fw_helptext(dev->wl);
1784 err = -EOPNOTSUPP;
1785 goto error;
1786 }
1787 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1788 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1789 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1790 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1791 fwtime & 0x1F);
1792
1793 dev->fw.rev = fwrev;
1794 dev->fw.patch = fwpatch;
1795
1796 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1797 dev->fw.rev, dev->fw.patch);
1798 wiphy->hw_version = dev->dev->id.coreid;
1799
1800 return 0;
1801
1802 error:
1803 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1804 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1805 macctl |= B43legacy_MACCTL_PSM_JMP0;
1806 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1807
1808 return err;
1809 }
1810
b43legacy_write_initvals(struct b43legacy_wldev * dev,const struct b43legacy_iv * ivals,size_t count,size_t array_size)1811 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1812 const struct b43legacy_iv *ivals,
1813 size_t count,
1814 size_t array_size)
1815 {
1816 const struct b43legacy_iv *iv;
1817 u16 offset;
1818 size_t i;
1819 bool bit32;
1820
1821 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1822 iv = ivals;
1823 for (i = 0; i < count; i++) {
1824 if (array_size < sizeof(iv->offset_size))
1825 goto err_format;
1826 array_size -= sizeof(iv->offset_size);
1827 offset = be16_to_cpu(iv->offset_size);
1828 bit32 = !!(offset & B43legacy_IV_32BIT);
1829 offset &= B43legacy_IV_OFFSET_MASK;
1830 if (offset >= 0x1000)
1831 goto err_format;
1832 if (bit32) {
1833 u32 value;
1834
1835 if (array_size < sizeof(iv->data.d32))
1836 goto err_format;
1837 array_size -= sizeof(iv->data.d32);
1838
1839 value = get_unaligned_be32(&iv->data.d32);
1840 b43legacy_write32(dev, offset, value);
1841
1842 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1843 sizeof(__be16) +
1844 sizeof(__be32));
1845 } else {
1846 u16 value;
1847
1848 if (array_size < sizeof(iv->data.d16))
1849 goto err_format;
1850 array_size -= sizeof(iv->data.d16);
1851
1852 value = be16_to_cpu(iv->data.d16);
1853 b43legacy_write16(dev, offset, value);
1854
1855 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1856 sizeof(__be16) +
1857 sizeof(__be16));
1858 }
1859 }
1860 if (array_size)
1861 goto err_format;
1862
1863 return 0;
1864
1865 err_format:
1866 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1867 b43legacy_print_fw_helptext(dev->wl);
1868
1869 return -EPROTO;
1870 }
1871
b43legacy_upload_initvals(struct b43legacy_wldev * dev)1872 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1873 {
1874 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1875 const struct b43legacy_fw_header *hdr;
1876 struct b43legacy_firmware *fw = &dev->fw;
1877 const struct b43legacy_iv *ivals;
1878 size_t count;
1879 int err;
1880
1881 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1882 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1883 count = be32_to_cpu(hdr->size);
1884 err = b43legacy_write_initvals(dev, ivals, count,
1885 fw->initvals->size - hdr_len);
1886 if (err)
1887 goto out;
1888 if (fw->initvals_band) {
1889 hdr = (const struct b43legacy_fw_header *)
1890 (fw->initvals_band->data);
1891 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1892 + hdr_len);
1893 count = be32_to_cpu(hdr->size);
1894 err = b43legacy_write_initvals(dev, ivals, count,
1895 fw->initvals_band->size - hdr_len);
1896 if (err)
1897 goto out;
1898 }
1899 out:
1900
1901 return err;
1902 }
1903
1904 /* Initialize the GPIOs
1905 * http://bcm-specs.sipsolutions.net/GPIO
1906 */
b43legacy_gpio_init(struct b43legacy_wldev * dev)1907 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1908 {
1909 struct ssb_bus *bus = dev->dev->bus;
1910 struct ssb_device *gpiodev, *pcidev = NULL;
1911 u32 mask;
1912 u32 set;
1913
1914 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1915 b43legacy_read32(dev,
1916 B43legacy_MMIO_MACCTL)
1917 & 0xFFFF3FFF);
1918
1919 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1920 b43legacy_read16(dev,
1921 B43legacy_MMIO_GPIO_MASK)
1922 | 0x000F);
1923
1924 mask = 0x0000001F;
1925 set = 0x0000000F;
1926 if (dev->dev->bus->chip_id == 0x4301) {
1927 mask |= 0x0060;
1928 set |= 0x0060;
1929 }
1930 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1931 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1932 b43legacy_read16(dev,
1933 B43legacy_MMIO_GPIO_MASK)
1934 | 0x0200);
1935 mask |= 0x0200;
1936 set |= 0x0200;
1937 }
1938 if (dev->dev->id.revision >= 2)
1939 mask |= 0x0010; /* FIXME: This is redundant. */
1940
1941 #ifdef CONFIG_SSB_DRIVER_PCICORE
1942 pcidev = bus->pcicore.dev;
1943 #endif
1944 gpiodev = bus->chipco.dev ? : pcidev;
1945 if (!gpiodev)
1946 return 0;
1947 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1948 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1949 & ~mask) | set);
1950
1951 return 0;
1952 }
1953
1954 /* Turn off all GPIO stuff. Call this on module unload, for example. */
b43legacy_gpio_cleanup(struct b43legacy_wldev * dev)1955 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1956 {
1957 struct ssb_bus *bus = dev->dev->bus;
1958 struct ssb_device *gpiodev, *pcidev = NULL;
1959
1960 #ifdef CONFIG_SSB_DRIVER_PCICORE
1961 pcidev = bus->pcicore.dev;
1962 #endif
1963 gpiodev = bus->chipco.dev ? : pcidev;
1964 if (!gpiodev)
1965 return;
1966 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1967 }
1968
1969 /* http://bcm-specs.sipsolutions.net/EnableMac */
b43legacy_mac_enable(struct b43legacy_wldev * dev)1970 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1971 {
1972 dev->mac_suspended--;
1973 B43legacy_WARN_ON(dev->mac_suspended < 0);
1974 B43legacy_WARN_ON(irqs_disabled());
1975 if (dev->mac_suspended == 0) {
1976 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1977 b43legacy_read32(dev,
1978 B43legacy_MMIO_MACCTL)
1979 | B43legacy_MACCTL_ENABLED);
1980 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1981 B43legacy_IRQ_MAC_SUSPENDED);
1982 /* the next two are dummy reads */
1983 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1984 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1985 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1986
1987 /* Re-enable IRQs. */
1988 spin_lock_irq(&dev->wl->irq_lock);
1989 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1990 dev->irq_mask);
1991 spin_unlock_irq(&dev->wl->irq_lock);
1992 }
1993 }
1994
1995 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
b43legacy_mac_suspend(struct b43legacy_wldev * dev)1996 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1997 {
1998 int i;
1999 u32 tmp;
2000
2001 might_sleep();
2002 B43legacy_WARN_ON(irqs_disabled());
2003 B43legacy_WARN_ON(dev->mac_suspended < 0);
2004
2005 if (dev->mac_suspended == 0) {
2006 /* Mask IRQs before suspending MAC. Otherwise
2007 * the MAC stays busy and won't suspend. */
2008 spin_lock_irq(&dev->wl->irq_lock);
2009 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2010 spin_unlock_irq(&dev->wl->irq_lock);
2011 b43legacy_synchronize_irq(dev);
2012
2013 b43legacy_power_saving_ctl_bits(dev, -1, 1);
2014 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
2015 b43legacy_read32(dev,
2016 B43legacy_MMIO_MACCTL)
2017 & ~B43legacy_MACCTL_ENABLED);
2018 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2019 for (i = 40; i; i--) {
2020 tmp = b43legacy_read32(dev,
2021 B43legacy_MMIO_GEN_IRQ_REASON);
2022 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
2023 goto out;
2024 msleep(1);
2025 }
2026 b43legacyerr(dev->wl, "MAC suspend failed\n");
2027 }
2028 out:
2029 dev->mac_suspended++;
2030 }
2031
b43legacy_adjust_opmode(struct b43legacy_wldev * dev)2032 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2033 {
2034 struct b43legacy_wl *wl = dev->wl;
2035 u32 ctl;
2036 u16 cfp_pretbtt;
2037
2038 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2039 /* Reset status to STA infrastructure mode. */
2040 ctl &= ~B43legacy_MACCTL_AP;
2041 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2042 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2043 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2044 ctl &= ~B43legacy_MACCTL_PROMISC;
2045 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2046 ctl |= B43legacy_MACCTL_INFRA;
2047
2048 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2049 ctl |= B43legacy_MACCTL_AP;
2050 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2051 ctl &= ~B43legacy_MACCTL_INFRA;
2052
2053 if (wl->filter_flags & FIF_CONTROL)
2054 ctl |= B43legacy_MACCTL_KEEP_CTL;
2055 if (wl->filter_flags & FIF_FCSFAIL)
2056 ctl |= B43legacy_MACCTL_KEEP_BAD;
2057 if (wl->filter_flags & FIF_PLCPFAIL)
2058 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2059 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2060 ctl |= B43legacy_MACCTL_BEACPROMISC;
2061
2062 /* Workaround: On old hardware the HW-MAC-address-filter
2063 * doesn't work properly, so always run promisc in filter
2064 * it in software. */
2065 if (dev->dev->id.revision <= 4)
2066 ctl |= B43legacy_MACCTL_PROMISC;
2067
2068 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2069
2070 cfp_pretbtt = 2;
2071 if ((ctl & B43legacy_MACCTL_INFRA) &&
2072 !(ctl & B43legacy_MACCTL_AP)) {
2073 if (dev->dev->bus->chip_id == 0x4306 &&
2074 dev->dev->bus->chip_rev == 3)
2075 cfp_pretbtt = 100;
2076 else
2077 cfp_pretbtt = 50;
2078 }
2079 b43legacy_write16(dev, 0x612, cfp_pretbtt);
2080 }
2081
b43legacy_rate_memory_write(struct b43legacy_wldev * dev,u16 rate,int is_ofdm)2082 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2083 u16 rate,
2084 int is_ofdm)
2085 {
2086 u16 offset;
2087
2088 if (is_ofdm) {
2089 offset = 0x480;
2090 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2091 } else {
2092 offset = 0x4C0;
2093 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2094 }
2095 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2096 b43legacy_shm_read16(dev,
2097 B43legacy_SHM_SHARED, offset));
2098 }
2099
b43legacy_rate_memory_init(struct b43legacy_wldev * dev)2100 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2101 {
2102 switch (dev->phy.type) {
2103 case B43legacy_PHYTYPE_G:
2104 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2105 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2106 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2107 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2108 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2109 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2110 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2111 /* fallthrough */
2112 case B43legacy_PHYTYPE_B:
2113 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2114 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2115 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2116 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2117 break;
2118 default:
2119 B43legacy_BUG_ON(1);
2120 }
2121 }
2122
2123 /* Set the TX-Antenna for management frames sent by firmware. */
b43legacy_mgmtframe_txantenna(struct b43legacy_wldev * dev,int antenna)2124 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2125 int antenna)
2126 {
2127 u16 ant = 0;
2128 u16 tmp;
2129
2130 switch (antenna) {
2131 case B43legacy_ANTENNA0:
2132 ant |= B43legacy_TX4_PHY_ANT0;
2133 break;
2134 case B43legacy_ANTENNA1:
2135 ant |= B43legacy_TX4_PHY_ANT1;
2136 break;
2137 case B43legacy_ANTENNA_AUTO:
2138 ant |= B43legacy_TX4_PHY_ANTLAST;
2139 break;
2140 default:
2141 B43legacy_BUG_ON(1);
2142 }
2143
2144 /* FIXME We also need to set the other flags of the PHY control
2145 * field somewhere. */
2146
2147 /* For Beacons */
2148 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2149 B43legacy_SHM_SH_BEACPHYCTL);
2150 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2151 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2152 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2153 /* For ACK/CTS */
2154 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2155 B43legacy_SHM_SH_ACKCTSPHYCTL);
2156 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2157 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2158 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2159 /* For Probe Resposes */
2160 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2161 B43legacy_SHM_SH_PRPHYCTL);
2162 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2163 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2164 B43legacy_SHM_SH_PRPHYCTL, tmp);
2165 }
2166
2167 /* This is the opposite of b43legacy_chip_init() */
b43legacy_chip_exit(struct b43legacy_wldev * dev)2168 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2169 {
2170 b43legacy_radio_turn_off(dev, 1);
2171 b43legacy_gpio_cleanup(dev);
2172 /* firmware is released later */
2173 }
2174
2175 /* Initialize the chip
2176 * http://bcm-specs.sipsolutions.net/ChipInit
2177 */
b43legacy_chip_init(struct b43legacy_wldev * dev)2178 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2179 {
2180 struct b43legacy_phy *phy = &dev->phy;
2181 int err;
2182 int tmp;
2183 u32 value32, macctl;
2184 u16 value16;
2185
2186 /* Initialize the MAC control */
2187 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2188 if (dev->phy.gmode)
2189 macctl |= B43legacy_MACCTL_GMODE;
2190 macctl |= B43legacy_MACCTL_INFRA;
2191 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2192
2193 err = b43legacy_upload_microcode(dev);
2194 if (err)
2195 goto out; /* firmware is released later */
2196
2197 err = b43legacy_gpio_init(dev);
2198 if (err)
2199 goto out; /* firmware is released later */
2200
2201 err = b43legacy_upload_initvals(dev);
2202 if (err)
2203 goto err_gpio_clean;
2204 b43legacy_radio_turn_on(dev);
2205
2206 b43legacy_write16(dev, 0x03E6, 0x0000);
2207 err = b43legacy_phy_init(dev);
2208 if (err)
2209 goto err_radio_off;
2210
2211 /* Select initial Interference Mitigation. */
2212 tmp = phy->interfmode;
2213 phy->interfmode = B43legacy_INTERFMODE_NONE;
2214 b43legacy_radio_set_interference_mitigation(dev, tmp);
2215
2216 b43legacy_phy_set_antenna_diversity(dev);
2217 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2218
2219 if (phy->type == B43legacy_PHYTYPE_B) {
2220 value16 = b43legacy_read16(dev, 0x005E);
2221 value16 |= 0x0004;
2222 b43legacy_write16(dev, 0x005E, value16);
2223 }
2224 b43legacy_write32(dev, 0x0100, 0x01000000);
2225 if (dev->dev->id.revision < 5)
2226 b43legacy_write32(dev, 0x010C, 0x01000000);
2227
2228 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2229 value32 &= ~B43legacy_MACCTL_INFRA;
2230 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2231 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2232 value32 |= B43legacy_MACCTL_INFRA;
2233 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2234
2235 if (b43legacy_using_pio(dev)) {
2236 b43legacy_write32(dev, 0x0210, 0x00000100);
2237 b43legacy_write32(dev, 0x0230, 0x00000100);
2238 b43legacy_write32(dev, 0x0250, 0x00000100);
2239 b43legacy_write32(dev, 0x0270, 0x00000100);
2240 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2241 0x0000);
2242 }
2243
2244 /* Probe Response Timeout value */
2245 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2246 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2247
2248 /* Initially set the wireless operation mode. */
2249 b43legacy_adjust_opmode(dev);
2250
2251 if (dev->dev->id.revision < 3) {
2252 b43legacy_write16(dev, 0x060E, 0x0000);
2253 b43legacy_write16(dev, 0x0610, 0x8000);
2254 b43legacy_write16(dev, 0x0604, 0x0000);
2255 b43legacy_write16(dev, 0x0606, 0x0200);
2256 } else {
2257 b43legacy_write32(dev, 0x0188, 0x80000000);
2258 b43legacy_write32(dev, 0x018C, 0x02000000);
2259 }
2260 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2261 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2262 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2263 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2264 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2265 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2266 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2267
2268 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2269 value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2270 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2271
2272 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2273 dev->dev->bus->chipco.fast_pwrup_delay);
2274
2275 /* PHY TX errors counter. */
2276 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2277
2278 B43legacy_WARN_ON(err != 0);
2279 b43legacydbg(dev->wl, "Chip initialized\n");
2280 out:
2281 return err;
2282
2283 err_radio_off:
2284 b43legacy_radio_turn_off(dev, 1);
2285 err_gpio_clean:
2286 b43legacy_gpio_cleanup(dev);
2287 goto out;
2288 }
2289
b43legacy_periodic_every120sec(struct b43legacy_wldev * dev)2290 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2291 {
2292 struct b43legacy_phy *phy = &dev->phy;
2293
2294 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2295 return;
2296
2297 b43legacy_mac_suspend(dev);
2298 b43legacy_phy_lo_g_measure(dev);
2299 b43legacy_mac_enable(dev);
2300 }
2301
b43legacy_periodic_every60sec(struct b43legacy_wldev * dev)2302 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2303 {
2304 b43legacy_phy_lo_mark_all_unused(dev);
2305 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2306 b43legacy_mac_suspend(dev);
2307 b43legacy_calc_nrssi_slope(dev);
2308 b43legacy_mac_enable(dev);
2309 }
2310 }
2311
b43legacy_periodic_every30sec(struct b43legacy_wldev * dev)2312 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2313 {
2314 /* Update device statistics. */
2315 b43legacy_calculate_link_quality(dev);
2316 }
2317
b43legacy_periodic_every15sec(struct b43legacy_wldev * dev)2318 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2319 {
2320 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2321
2322 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2323 wmb();
2324 }
2325
do_periodic_work(struct b43legacy_wldev * dev)2326 static void do_periodic_work(struct b43legacy_wldev *dev)
2327 {
2328 unsigned int state;
2329
2330 state = dev->periodic_state;
2331 if (state % 8 == 0)
2332 b43legacy_periodic_every120sec(dev);
2333 if (state % 4 == 0)
2334 b43legacy_periodic_every60sec(dev);
2335 if (state % 2 == 0)
2336 b43legacy_periodic_every30sec(dev);
2337 b43legacy_periodic_every15sec(dev);
2338 }
2339
2340 /* Periodic work locking policy:
2341 * The whole periodic work handler is protected by
2342 * wl->mutex. If another lock is needed somewhere in the
2343 * pwork callchain, it's acquired in-place, where it's needed.
2344 */
b43legacy_periodic_work_handler(struct work_struct * work)2345 static void b43legacy_periodic_work_handler(struct work_struct *work)
2346 {
2347 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2348 periodic_work.work);
2349 struct b43legacy_wl *wl = dev->wl;
2350 unsigned long delay;
2351
2352 mutex_lock(&wl->mutex);
2353
2354 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2355 goto out;
2356 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2357 goto out_requeue;
2358
2359 do_periodic_work(dev);
2360
2361 dev->periodic_state++;
2362 out_requeue:
2363 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2364 delay = msecs_to_jiffies(50);
2365 else
2366 delay = round_jiffies_relative(HZ * 15);
2367 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2368 out:
2369 mutex_unlock(&wl->mutex);
2370 }
2371
b43legacy_periodic_tasks_setup(struct b43legacy_wldev * dev)2372 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2373 {
2374 struct delayed_work *work = &dev->periodic_work;
2375
2376 dev->periodic_state = 0;
2377 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2378 ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2379 }
2380
2381 /* Validate access to the chip (SHM) */
b43legacy_validate_chipaccess(struct b43legacy_wldev * dev)2382 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2383 {
2384 u32 value;
2385 u32 shm_backup;
2386
2387 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2388 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2389 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2390 0xAA5555AA)
2391 goto error;
2392 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2393 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2394 0x55AAAA55)
2395 goto error;
2396 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2397
2398 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2399 if ((value | B43legacy_MACCTL_GMODE) !=
2400 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2401 goto error;
2402
2403 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2404 if (value)
2405 goto error;
2406
2407 return 0;
2408 error:
2409 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2410 return -ENODEV;
2411 }
2412
b43legacy_security_init(struct b43legacy_wldev * dev)2413 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2414 {
2415 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2416 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2417 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2418 0x0056);
2419 /* KTP is a word address, but we address SHM bytewise.
2420 * So multiply by two.
2421 */
2422 dev->ktp *= 2;
2423 if (dev->dev->id.revision >= 5)
2424 /* Number of RCMTA address slots */
2425 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2426 dev->max_nr_keys - 8);
2427 }
2428
2429 #ifdef CONFIG_B43LEGACY_HWRNG
b43legacy_rng_read(struct hwrng * rng,u32 * data)2430 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2431 {
2432 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2433 unsigned long flags;
2434
2435 /* Don't take wl->mutex here, as it could deadlock with
2436 * hwrng internal locking. It's not needed to take
2437 * wl->mutex here, anyway. */
2438
2439 spin_lock_irqsave(&wl->irq_lock, flags);
2440 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2441 spin_unlock_irqrestore(&wl->irq_lock, flags);
2442
2443 return (sizeof(u16));
2444 }
2445 #endif
2446
b43legacy_rng_exit(struct b43legacy_wl * wl)2447 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2448 {
2449 #ifdef CONFIG_B43LEGACY_HWRNG
2450 if (wl->rng_initialized)
2451 hwrng_unregister(&wl->rng);
2452 #endif
2453 }
2454
b43legacy_rng_init(struct b43legacy_wl * wl)2455 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2456 {
2457 int err = 0;
2458
2459 #ifdef CONFIG_B43LEGACY_HWRNG
2460 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2461 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2462 wl->rng.name = wl->rng_name;
2463 wl->rng.data_read = b43legacy_rng_read;
2464 wl->rng.priv = (unsigned long)wl;
2465 wl->rng_initialized = 1;
2466 err = hwrng_register(&wl->rng);
2467 if (err) {
2468 wl->rng_initialized = 0;
2469 b43legacyerr(wl, "Failed to register the random "
2470 "number generator (%d)\n", err);
2471 }
2472
2473 #endif
2474 return err;
2475 }
2476
b43legacy_tx_work(struct work_struct * work)2477 static void b43legacy_tx_work(struct work_struct *work)
2478 {
2479 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2480 tx_work);
2481 struct b43legacy_wldev *dev;
2482 struct sk_buff *skb;
2483 int queue_num;
2484 int err = 0;
2485
2486 mutex_lock(&wl->mutex);
2487 dev = wl->current_dev;
2488 if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2489 mutex_unlock(&wl->mutex);
2490 return;
2491 }
2492
2493 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2494 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2495 skb = skb_dequeue(&wl->tx_queue[queue_num]);
2496 if (b43legacy_using_pio(dev))
2497 err = b43legacy_pio_tx(dev, skb);
2498 else
2499 err = b43legacy_dma_tx(dev, skb);
2500 if (err == -ENOSPC) {
2501 wl->tx_queue_stopped[queue_num] = 1;
2502 ieee80211_stop_queue(wl->hw, queue_num);
2503 skb_queue_head(&wl->tx_queue[queue_num], skb);
2504 break;
2505 }
2506 if (unlikely(err))
2507 dev_kfree_skb(skb); /* Drop it */
2508 err = 0;
2509 }
2510
2511 if (!err)
2512 wl->tx_queue_stopped[queue_num] = 0;
2513 }
2514
2515 mutex_unlock(&wl->mutex);
2516 }
2517
b43legacy_op_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)2518 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2519 struct ieee80211_tx_control *control,
2520 struct sk_buff *skb)
2521 {
2522 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2523
2524 if (unlikely(skb->len < 2 + 2 + 6)) {
2525 /* Too short, this can't be a valid frame. */
2526 dev_kfree_skb_any(skb);
2527 return;
2528 }
2529 B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2530
2531 skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2532 if (!wl->tx_queue_stopped[skb->queue_mapping])
2533 ieee80211_queue_work(wl->hw, &wl->tx_work);
2534 else
2535 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2536 }
2537
b43legacy_op_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)2538 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2539 struct ieee80211_vif *vif, u16 queue,
2540 const struct ieee80211_tx_queue_params *params)
2541 {
2542 return 0;
2543 }
2544
b43legacy_op_get_stats(struct ieee80211_hw * hw,struct ieee80211_low_level_stats * stats)2545 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2546 struct ieee80211_low_level_stats *stats)
2547 {
2548 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2549 unsigned long flags;
2550
2551 spin_lock_irqsave(&wl->irq_lock, flags);
2552 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2553 spin_unlock_irqrestore(&wl->irq_lock, flags);
2554
2555 return 0;
2556 }
2557
phymode_to_string(unsigned int phymode)2558 static const char *phymode_to_string(unsigned int phymode)
2559 {
2560 switch (phymode) {
2561 case B43legacy_PHYMODE_B:
2562 return "B";
2563 case B43legacy_PHYMODE_G:
2564 return "G";
2565 default:
2566 B43legacy_BUG_ON(1);
2567 }
2568 return "";
2569 }
2570
find_wldev_for_phymode(struct b43legacy_wl * wl,unsigned int phymode,struct b43legacy_wldev ** dev,bool * gmode)2571 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2572 unsigned int phymode,
2573 struct b43legacy_wldev **dev,
2574 bool *gmode)
2575 {
2576 struct b43legacy_wldev *d;
2577
2578 list_for_each_entry(d, &wl->devlist, list) {
2579 if (d->phy.possible_phymodes & phymode) {
2580 /* Ok, this device supports the PHY-mode.
2581 * Set the gmode bit. */
2582 *gmode = true;
2583 *dev = d;
2584
2585 return 0;
2586 }
2587 }
2588
2589 return -ESRCH;
2590 }
2591
b43legacy_put_phy_into_reset(struct b43legacy_wldev * dev)2592 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2593 {
2594 struct ssb_device *sdev = dev->dev;
2595 u32 tmslow;
2596
2597 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2598 tmslow &= ~B43legacy_TMSLOW_GMODE;
2599 tmslow |= B43legacy_TMSLOW_PHYRESET;
2600 tmslow |= SSB_TMSLOW_FGC;
2601 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2602 msleep(1);
2603
2604 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2605 tmslow &= ~SSB_TMSLOW_FGC;
2606 tmslow |= B43legacy_TMSLOW_PHYRESET;
2607 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2608 msleep(1);
2609 }
2610
2611 /* Expects wl->mutex locked */
b43legacy_switch_phymode(struct b43legacy_wl * wl,unsigned int new_mode)2612 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2613 unsigned int new_mode)
2614 {
2615 struct b43legacy_wldev *uninitialized_var(up_dev);
2616 struct b43legacy_wldev *down_dev;
2617 int err;
2618 bool gmode = false;
2619 int prev_status;
2620
2621 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2622 if (err) {
2623 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2624 phymode_to_string(new_mode));
2625 return err;
2626 }
2627 if ((up_dev == wl->current_dev) &&
2628 (!!wl->current_dev->phy.gmode == !!gmode))
2629 /* This device is already running. */
2630 return 0;
2631 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2632 phymode_to_string(new_mode));
2633 down_dev = wl->current_dev;
2634
2635 prev_status = b43legacy_status(down_dev);
2636 /* Shutdown the currently running core. */
2637 if (prev_status >= B43legacy_STAT_STARTED)
2638 b43legacy_wireless_core_stop(down_dev);
2639 if (prev_status >= B43legacy_STAT_INITIALIZED)
2640 b43legacy_wireless_core_exit(down_dev);
2641
2642 if (down_dev != up_dev)
2643 /* We switch to a different core, so we put PHY into
2644 * RESET on the old core. */
2645 b43legacy_put_phy_into_reset(down_dev);
2646
2647 /* Now start the new core. */
2648 up_dev->phy.gmode = gmode;
2649 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2650 err = b43legacy_wireless_core_init(up_dev);
2651 if (err) {
2652 b43legacyerr(wl, "Fatal: Could not initialize device"
2653 " for newly selected %s-PHY mode\n",
2654 phymode_to_string(new_mode));
2655 goto init_failure;
2656 }
2657 }
2658 if (prev_status >= B43legacy_STAT_STARTED) {
2659 err = b43legacy_wireless_core_start(up_dev);
2660 if (err) {
2661 b43legacyerr(wl, "Fatal: Could not start device for "
2662 "newly selected %s-PHY mode\n",
2663 phymode_to_string(new_mode));
2664 b43legacy_wireless_core_exit(up_dev);
2665 goto init_failure;
2666 }
2667 }
2668 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2669
2670 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2671
2672 wl->current_dev = up_dev;
2673
2674 return 0;
2675 init_failure:
2676 /* Whoops, failed to init the new core. No core is operating now. */
2677 wl->current_dev = NULL;
2678 return err;
2679 }
2680
2681 /* Write the short and long frame retry limit values. */
b43legacy_set_retry_limits(struct b43legacy_wldev * dev,unsigned int short_retry,unsigned int long_retry)2682 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2683 unsigned int short_retry,
2684 unsigned int long_retry)
2685 {
2686 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2687 * the chip-internal counter. */
2688 short_retry = min(short_retry, (unsigned int)0xF);
2689 long_retry = min(long_retry, (unsigned int)0xF);
2690
2691 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2692 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2693 }
2694
b43legacy_op_dev_config(struct ieee80211_hw * hw,u32 changed)2695 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2696 u32 changed)
2697 {
2698 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2699 struct b43legacy_wldev *dev;
2700 struct b43legacy_phy *phy;
2701 struct ieee80211_conf *conf = &hw->conf;
2702 unsigned long flags;
2703 unsigned int new_phymode = 0xFFFF;
2704 int antenna_tx;
2705 int err = 0;
2706
2707 antenna_tx = B43legacy_ANTENNA_DEFAULT;
2708
2709 mutex_lock(&wl->mutex);
2710 dev = wl->current_dev;
2711 phy = &dev->phy;
2712
2713 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2714 b43legacy_set_retry_limits(dev,
2715 conf->short_frame_max_tx_count,
2716 conf->long_frame_max_tx_count);
2717 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2718 if (!changed)
2719 goto out_unlock_mutex;
2720
2721 /* Switch the PHY mode (if necessary). */
2722 switch (conf->chandef.chan->band) {
2723 case IEEE80211_BAND_2GHZ:
2724 if (phy->type == B43legacy_PHYTYPE_B)
2725 new_phymode = B43legacy_PHYMODE_B;
2726 else
2727 new_phymode = B43legacy_PHYMODE_G;
2728 break;
2729 default:
2730 B43legacy_WARN_ON(1);
2731 }
2732 err = b43legacy_switch_phymode(wl, new_phymode);
2733 if (err)
2734 goto out_unlock_mutex;
2735
2736 /* Disable IRQs while reconfiguring the device.
2737 * This makes it possible to drop the spinlock throughout
2738 * the reconfiguration process. */
2739 spin_lock_irqsave(&wl->irq_lock, flags);
2740 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2741 spin_unlock_irqrestore(&wl->irq_lock, flags);
2742 goto out_unlock_mutex;
2743 }
2744 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2745 spin_unlock_irqrestore(&wl->irq_lock, flags);
2746 b43legacy_synchronize_irq(dev);
2747
2748 /* Switch to the requested channel.
2749 * The firmware takes care of races with the TX handler. */
2750 if (conf->chandef.chan->hw_value != phy->channel)
2751 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2752 0);
2753
2754 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2755
2756 /* Adjust the desired TX power level. */
2757 if (conf->power_level != 0) {
2758 if (conf->power_level != phy->power_level) {
2759 phy->power_level = conf->power_level;
2760 b43legacy_phy_xmitpower(dev);
2761 }
2762 }
2763
2764 /* Antennas for RX and management frame TX. */
2765 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2766
2767 if (wl->radio_enabled != phy->radio_on) {
2768 if (wl->radio_enabled) {
2769 b43legacy_radio_turn_on(dev);
2770 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2771 if (!dev->radio_hw_enable)
2772 b43legacyinfo(dev->wl, "The hardware RF-kill"
2773 " button still turns the radio"
2774 " physically off. Press the"
2775 " button to turn it on.\n");
2776 } else {
2777 b43legacy_radio_turn_off(dev, 0);
2778 b43legacyinfo(dev->wl, "Radio turned off by"
2779 " software\n");
2780 }
2781 }
2782
2783 spin_lock_irqsave(&wl->irq_lock, flags);
2784 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2785 mmiowb();
2786 spin_unlock_irqrestore(&wl->irq_lock, flags);
2787 out_unlock_mutex:
2788 mutex_unlock(&wl->mutex);
2789
2790 return err;
2791 }
2792
b43legacy_update_basic_rates(struct b43legacy_wldev * dev,u32 brates)2793 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2794 {
2795 struct ieee80211_supported_band *sband =
2796 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2797 struct ieee80211_rate *rate;
2798 int i;
2799 u16 basic, direct, offset, basic_offset, rateptr;
2800
2801 for (i = 0; i < sband->n_bitrates; i++) {
2802 rate = &sband->bitrates[i];
2803
2804 if (b43legacy_is_cck_rate(rate->hw_value)) {
2805 direct = B43legacy_SHM_SH_CCKDIRECT;
2806 basic = B43legacy_SHM_SH_CCKBASIC;
2807 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2808 offset &= 0xF;
2809 } else {
2810 direct = B43legacy_SHM_SH_OFDMDIRECT;
2811 basic = B43legacy_SHM_SH_OFDMBASIC;
2812 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2813 offset &= 0xF;
2814 }
2815
2816 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2817
2818 if (b43legacy_is_cck_rate(rate->hw_value)) {
2819 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2820 basic_offset &= 0xF;
2821 } else {
2822 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2823 basic_offset &= 0xF;
2824 }
2825
2826 /*
2827 * Get the pointer that we need to point to
2828 * from the direct map
2829 */
2830 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2831 direct + 2 * basic_offset);
2832 /* and write it to the basic map */
2833 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2834 basic + 2 * offset, rateptr);
2835 }
2836 }
2837
b43legacy_op_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * conf,u32 changed)2838 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2839 struct ieee80211_vif *vif,
2840 struct ieee80211_bss_conf *conf,
2841 u32 changed)
2842 {
2843 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2844 struct b43legacy_wldev *dev;
2845 unsigned long flags;
2846
2847 mutex_lock(&wl->mutex);
2848 B43legacy_WARN_ON(wl->vif != vif);
2849
2850 dev = wl->current_dev;
2851
2852 /* Disable IRQs while reconfiguring the device.
2853 * This makes it possible to drop the spinlock throughout
2854 * the reconfiguration process. */
2855 spin_lock_irqsave(&wl->irq_lock, flags);
2856 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2857 spin_unlock_irqrestore(&wl->irq_lock, flags);
2858 goto out_unlock_mutex;
2859 }
2860 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2861
2862 if (changed & BSS_CHANGED_BSSID) {
2863 b43legacy_synchronize_irq(dev);
2864
2865 if (conf->bssid)
2866 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2867 else
2868 eth_zero_addr(wl->bssid);
2869 }
2870
2871 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2872 if (changed & BSS_CHANGED_BEACON &&
2873 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2874 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2875 b43legacy_update_templates(wl);
2876
2877 if (changed & BSS_CHANGED_BSSID)
2878 b43legacy_write_mac_bssid_templates(dev);
2879 }
2880 spin_unlock_irqrestore(&wl->irq_lock, flags);
2881
2882 b43legacy_mac_suspend(dev);
2883
2884 if (changed & BSS_CHANGED_BEACON_INT &&
2885 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2886 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2887 b43legacy_set_beacon_int(dev, conf->beacon_int);
2888
2889 if (changed & BSS_CHANGED_BASIC_RATES)
2890 b43legacy_update_basic_rates(dev, conf->basic_rates);
2891
2892 if (changed & BSS_CHANGED_ERP_SLOT) {
2893 if (conf->use_short_slot)
2894 b43legacy_short_slot_timing_enable(dev);
2895 else
2896 b43legacy_short_slot_timing_disable(dev);
2897 }
2898
2899 b43legacy_mac_enable(dev);
2900
2901 spin_lock_irqsave(&wl->irq_lock, flags);
2902 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2903 /* XXX: why? */
2904 mmiowb();
2905 spin_unlock_irqrestore(&wl->irq_lock, flags);
2906 out_unlock_mutex:
2907 mutex_unlock(&wl->mutex);
2908 }
2909
b43legacy_op_configure_filter(struct ieee80211_hw * hw,unsigned int changed,unsigned int * fflags,u64 multicast)2910 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2911 unsigned int changed,
2912 unsigned int *fflags,u64 multicast)
2913 {
2914 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2915 struct b43legacy_wldev *dev = wl->current_dev;
2916 unsigned long flags;
2917
2918 if (!dev) {
2919 *fflags = 0;
2920 return;
2921 }
2922
2923 spin_lock_irqsave(&wl->irq_lock, flags);
2924 *fflags &= FIF_ALLMULTI |
2925 FIF_FCSFAIL |
2926 FIF_PLCPFAIL |
2927 FIF_CONTROL |
2928 FIF_OTHER_BSS |
2929 FIF_BCN_PRBRESP_PROMISC;
2930
2931 changed &= FIF_ALLMULTI |
2932 FIF_FCSFAIL |
2933 FIF_PLCPFAIL |
2934 FIF_CONTROL |
2935 FIF_OTHER_BSS |
2936 FIF_BCN_PRBRESP_PROMISC;
2937
2938 wl->filter_flags = *fflags;
2939
2940 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2941 b43legacy_adjust_opmode(dev);
2942 spin_unlock_irqrestore(&wl->irq_lock, flags);
2943 }
2944
2945 /* Locking: wl->mutex */
b43legacy_wireless_core_stop(struct b43legacy_wldev * dev)2946 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2947 {
2948 struct b43legacy_wl *wl = dev->wl;
2949 unsigned long flags;
2950 int queue_num;
2951
2952 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2953 return;
2954
2955 /* Disable and sync interrupts. We must do this before than
2956 * setting the status to INITIALIZED, as the interrupt handler
2957 * won't care about IRQs then. */
2958 spin_lock_irqsave(&wl->irq_lock, flags);
2959 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2960 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2961 spin_unlock_irqrestore(&wl->irq_lock, flags);
2962 b43legacy_synchronize_irq(dev);
2963
2964 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2965
2966 mutex_unlock(&wl->mutex);
2967 /* Must unlock as it would otherwise deadlock. No races here.
2968 * Cancel the possibly running self-rearming periodic work. */
2969 cancel_delayed_work_sync(&dev->periodic_work);
2970 cancel_work_sync(&wl->tx_work);
2971 mutex_lock(&wl->mutex);
2972
2973 /* Drain all TX queues. */
2974 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2975 while (skb_queue_len(&wl->tx_queue[queue_num]))
2976 dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2977 }
2978
2979 b43legacy_mac_suspend(dev);
2980 free_irq(dev->dev->irq, dev);
2981 b43legacydbg(wl, "Wireless interface stopped\n");
2982 }
2983
2984 /* Locking: wl->mutex */
b43legacy_wireless_core_start(struct b43legacy_wldev * dev)2985 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2986 {
2987 int err;
2988
2989 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2990
2991 drain_txstatus_queue(dev);
2992 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2993 IRQF_SHARED, KBUILD_MODNAME, dev);
2994 if (err) {
2995 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2996 dev->dev->irq);
2997 goto out;
2998 }
2999 /* We are ready to run. */
3000 ieee80211_wake_queues(dev->wl->hw);
3001 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
3002
3003 /* Start data flow (TX/RX) */
3004 b43legacy_mac_enable(dev);
3005 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
3006
3007 /* Start maintenance work */
3008 b43legacy_periodic_tasks_setup(dev);
3009
3010 b43legacydbg(dev->wl, "Wireless interface started\n");
3011 out:
3012 return err;
3013 }
3014
3015 /* Get PHY and RADIO versioning numbers */
b43legacy_phy_versioning(struct b43legacy_wldev * dev)3016 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
3017 {
3018 struct b43legacy_phy *phy = &dev->phy;
3019 u32 tmp;
3020 u8 analog_type;
3021 u8 phy_type;
3022 u8 phy_rev;
3023 u16 radio_manuf;
3024 u16 radio_ver;
3025 u16 radio_rev;
3026 int unsupported = 0;
3027
3028 /* Get PHY versioning */
3029 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3030 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3031 >> B43legacy_PHYVER_ANALOG_SHIFT;
3032 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3033 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3034 switch (phy_type) {
3035 case B43legacy_PHYTYPE_B:
3036 if (phy_rev != 2 && phy_rev != 4
3037 && phy_rev != 6 && phy_rev != 7)
3038 unsupported = 1;
3039 break;
3040 case B43legacy_PHYTYPE_G:
3041 if (phy_rev > 8)
3042 unsupported = 1;
3043 break;
3044 default:
3045 unsupported = 1;
3046 }
3047 if (unsupported) {
3048 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3049 "(Analog %u, Type %u, Revision %u)\n",
3050 analog_type, phy_type, phy_rev);
3051 return -EOPNOTSUPP;
3052 }
3053 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3054 analog_type, phy_type, phy_rev);
3055
3056
3057 /* Get RADIO versioning */
3058 if (dev->dev->bus->chip_id == 0x4317) {
3059 if (dev->dev->bus->chip_rev == 0)
3060 tmp = 0x3205017F;
3061 else if (dev->dev->bus->chip_rev == 1)
3062 tmp = 0x4205017F;
3063 else
3064 tmp = 0x5205017F;
3065 } else {
3066 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3067 B43legacy_RADIOCTL_ID);
3068 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3069 tmp <<= 16;
3070 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3071 B43legacy_RADIOCTL_ID);
3072 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3073 }
3074 radio_manuf = (tmp & 0x00000FFF);
3075 radio_ver = (tmp & 0x0FFFF000) >> 12;
3076 radio_rev = (tmp & 0xF0000000) >> 28;
3077 switch (phy_type) {
3078 case B43legacy_PHYTYPE_B:
3079 if ((radio_ver & 0xFFF0) != 0x2050)
3080 unsupported = 1;
3081 break;
3082 case B43legacy_PHYTYPE_G:
3083 if (radio_ver != 0x2050)
3084 unsupported = 1;
3085 break;
3086 default:
3087 B43legacy_BUG_ON(1);
3088 }
3089 if (unsupported) {
3090 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3091 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3092 radio_manuf, radio_ver, radio_rev);
3093 return -EOPNOTSUPP;
3094 }
3095 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3096 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3097
3098
3099 phy->radio_manuf = radio_manuf;
3100 phy->radio_ver = radio_ver;
3101 phy->radio_rev = radio_rev;
3102
3103 phy->analog = analog_type;
3104 phy->type = phy_type;
3105 phy->rev = phy_rev;
3106
3107 return 0;
3108 }
3109
setup_struct_phy_for_init(struct b43legacy_wldev * dev,struct b43legacy_phy * phy)3110 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3111 struct b43legacy_phy *phy)
3112 {
3113 struct b43legacy_lopair *lo;
3114 int i;
3115
3116 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3117 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3118
3119 /* Assume the radio is enabled. If it's not enabled, the state will
3120 * immediately get fixed on the first periodic work run. */
3121 dev->radio_hw_enable = true;
3122
3123 phy->savedpctlreg = 0xFFFF;
3124 phy->aci_enable = false;
3125 phy->aci_wlan_automatic = false;
3126 phy->aci_hw_rssi = false;
3127
3128 lo = phy->_lo_pairs;
3129 if (lo)
3130 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3131 B43legacy_LO_COUNT);
3132 phy->max_lb_gain = 0;
3133 phy->trsw_rx_gain = 0;
3134
3135 /* Set default attenuation values. */
3136 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3137 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3138 phy->txctl1 = b43legacy_default_txctl1(dev);
3139 phy->txpwr_offset = 0;
3140
3141 /* NRSSI */
3142 phy->nrssislope = 0;
3143 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3144 phy->nrssi[i] = -1000;
3145 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3146 phy->nrssi_lt[i] = i;
3147
3148 phy->lofcal = 0xFFFF;
3149 phy->initval = 0xFFFF;
3150
3151 phy->interfmode = B43legacy_INTERFMODE_NONE;
3152 phy->channel = 0xFF;
3153 }
3154
setup_struct_wldev_for_init(struct b43legacy_wldev * dev)3155 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3156 {
3157 /* Flags */
3158 dev->dfq_valid = false;
3159
3160 /* Stats */
3161 memset(&dev->stats, 0, sizeof(dev->stats));
3162
3163 setup_struct_phy_for_init(dev, &dev->phy);
3164
3165 /* IRQ related flags */
3166 dev->irq_reason = 0;
3167 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3168 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3169
3170 dev->mac_suspended = 1;
3171
3172 /* Noise calculation context */
3173 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3174 }
3175
b43legacy_set_synth_pu_delay(struct b43legacy_wldev * dev,bool idle)3176 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3177 bool idle) {
3178 u16 pu_delay = 1050;
3179
3180 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3181 pu_delay = 500;
3182 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3183 pu_delay = max(pu_delay, (u16)2400);
3184
3185 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3186 B43legacy_SHM_SH_SPUWKUP, pu_delay);
3187 }
3188
3189 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
b43legacy_set_pretbtt(struct b43legacy_wldev * dev)3190 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3191 {
3192 u16 pretbtt;
3193
3194 /* The time value is in microseconds. */
3195 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3196 pretbtt = 2;
3197 else
3198 pretbtt = 250;
3199 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3200 B43legacy_SHM_SH_PRETBTT, pretbtt);
3201 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3202 }
3203
3204 /* Shutdown a wireless core */
3205 /* Locking: wl->mutex */
b43legacy_wireless_core_exit(struct b43legacy_wldev * dev)3206 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3207 {
3208 struct b43legacy_phy *phy = &dev->phy;
3209 u32 macctl;
3210
3211 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3212 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3213 return;
3214 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3215
3216 /* Stop the microcode PSM. */
3217 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3218 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3219 macctl |= B43legacy_MACCTL_PSM_JMP0;
3220 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3221
3222 b43legacy_leds_exit(dev);
3223 b43legacy_rng_exit(dev->wl);
3224 b43legacy_pio_free(dev);
3225 b43legacy_dma_free(dev);
3226 b43legacy_chip_exit(dev);
3227 b43legacy_radio_turn_off(dev, 1);
3228 b43legacy_switch_analog(dev, 0);
3229 if (phy->dyn_tssi_tbl)
3230 kfree(phy->tssi2dbm);
3231 kfree(phy->lo_control);
3232 phy->lo_control = NULL;
3233 if (dev->wl->current_beacon) {
3234 dev_kfree_skb_any(dev->wl->current_beacon);
3235 dev->wl->current_beacon = NULL;
3236 }
3237
3238 ssb_device_disable(dev->dev, 0);
3239 ssb_bus_may_powerdown(dev->dev->bus);
3240 }
3241
prepare_phy_data_for_init(struct b43legacy_wldev * dev)3242 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3243 {
3244 struct b43legacy_phy *phy = &dev->phy;
3245 int i;
3246
3247 /* Set default attenuation values. */
3248 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3249 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3250 phy->txctl1 = b43legacy_default_txctl1(dev);
3251 phy->txctl2 = 0xFFFF;
3252 phy->txpwr_offset = 0;
3253
3254 /* NRSSI */
3255 phy->nrssislope = 0;
3256 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3257 phy->nrssi[i] = -1000;
3258 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3259 phy->nrssi_lt[i] = i;
3260
3261 phy->lofcal = 0xFFFF;
3262 phy->initval = 0xFFFF;
3263
3264 phy->aci_enable = false;
3265 phy->aci_wlan_automatic = false;
3266 phy->aci_hw_rssi = false;
3267
3268 phy->antenna_diversity = 0xFFFF;
3269 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3270 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3271
3272 /* Flags */
3273 phy->calibrated = 0;
3274
3275 if (phy->_lo_pairs)
3276 memset(phy->_lo_pairs, 0,
3277 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3278 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3279 }
3280
3281 /* Initialize a wireless core */
b43legacy_wireless_core_init(struct b43legacy_wldev * dev)3282 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3283 {
3284 struct b43legacy_wl *wl = dev->wl;
3285 struct ssb_bus *bus = dev->dev->bus;
3286 struct b43legacy_phy *phy = &dev->phy;
3287 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3288 int err;
3289 u32 hf;
3290 u32 tmp;
3291
3292 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3293
3294 err = ssb_bus_powerup(bus, 0);
3295 if (err)
3296 goto out;
3297 if (!ssb_device_is_enabled(dev->dev)) {
3298 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3299 b43legacy_wireless_core_reset(dev, tmp);
3300 }
3301
3302 if ((phy->type == B43legacy_PHYTYPE_B) ||
3303 (phy->type == B43legacy_PHYTYPE_G)) {
3304 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3305 * B43legacy_LO_COUNT,
3306 GFP_KERNEL);
3307 if (!phy->_lo_pairs)
3308 return -ENOMEM;
3309 }
3310 setup_struct_wldev_for_init(dev);
3311
3312 err = b43legacy_phy_init_tssi2dbm_table(dev);
3313 if (err)
3314 goto err_kfree_lo_control;
3315
3316 /* Enable IRQ routing to this device. */
3317 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3318
3319 prepare_phy_data_for_init(dev);
3320 b43legacy_phy_calibrate(dev);
3321 err = b43legacy_chip_init(dev);
3322 if (err)
3323 goto err_kfree_tssitbl;
3324 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3325 B43legacy_SHM_SH_WLCOREREV,
3326 dev->dev->id.revision);
3327 hf = b43legacy_hf_read(dev);
3328 if (phy->type == B43legacy_PHYTYPE_G) {
3329 hf |= B43legacy_HF_SYMW;
3330 if (phy->rev == 1)
3331 hf |= B43legacy_HF_GDCW;
3332 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3333 hf |= B43legacy_HF_OFDMPABOOST;
3334 } else if (phy->type == B43legacy_PHYTYPE_B) {
3335 hf |= B43legacy_HF_SYMW;
3336 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3337 hf &= ~B43legacy_HF_GDCW;
3338 }
3339 b43legacy_hf_write(dev, hf);
3340
3341 b43legacy_set_retry_limits(dev,
3342 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3343 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3344
3345 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3346 0x0044, 3);
3347 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3348 0x0046, 2);
3349
3350 /* Disable sending probe responses from firmware.
3351 * Setting the MaxTime to one usec will always trigger
3352 * a timeout, so we never send any probe resp.
3353 * A timeout of zero is infinite. */
3354 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3355 B43legacy_SHM_SH_PRMAXTIME, 1);
3356
3357 b43legacy_rate_memory_init(dev);
3358
3359 /* Minimum Contention Window */
3360 if (phy->type == B43legacy_PHYTYPE_B)
3361 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3362 0x0003, 31);
3363 else
3364 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3365 0x0003, 15);
3366 /* Maximum Contention Window */
3367 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3368 0x0004, 1023);
3369
3370 do {
3371 if (b43legacy_using_pio(dev))
3372 err = b43legacy_pio_init(dev);
3373 else {
3374 err = b43legacy_dma_init(dev);
3375 if (!err)
3376 b43legacy_qos_init(dev);
3377 }
3378 } while (err == -EAGAIN);
3379 if (err)
3380 goto err_chip_exit;
3381
3382 b43legacy_set_synth_pu_delay(dev, 1);
3383
3384 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3385 b43legacy_upload_card_macaddress(dev);
3386 b43legacy_security_init(dev);
3387 b43legacy_rng_init(wl);
3388
3389 ieee80211_wake_queues(dev->wl->hw);
3390 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3391
3392 b43legacy_leds_init(dev);
3393 out:
3394 return err;
3395
3396 err_chip_exit:
3397 b43legacy_chip_exit(dev);
3398 err_kfree_tssitbl:
3399 if (phy->dyn_tssi_tbl)
3400 kfree(phy->tssi2dbm);
3401 err_kfree_lo_control:
3402 kfree(phy->lo_control);
3403 phy->lo_control = NULL;
3404 ssb_bus_may_powerdown(bus);
3405 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3406 return err;
3407 }
3408
b43legacy_op_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3409 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3410 struct ieee80211_vif *vif)
3411 {
3412 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3413 struct b43legacy_wldev *dev;
3414 unsigned long flags;
3415 int err = -EOPNOTSUPP;
3416
3417 /* TODO: allow WDS/AP devices to coexist */
3418
3419 if (vif->type != NL80211_IFTYPE_AP &&
3420 vif->type != NL80211_IFTYPE_STATION &&
3421 vif->type != NL80211_IFTYPE_WDS &&
3422 vif->type != NL80211_IFTYPE_ADHOC)
3423 return -EOPNOTSUPP;
3424
3425 mutex_lock(&wl->mutex);
3426 if (wl->operating)
3427 goto out_mutex_unlock;
3428
3429 b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3430
3431 dev = wl->current_dev;
3432 wl->operating = true;
3433 wl->vif = vif;
3434 wl->if_type = vif->type;
3435 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3436
3437 spin_lock_irqsave(&wl->irq_lock, flags);
3438 b43legacy_adjust_opmode(dev);
3439 b43legacy_set_pretbtt(dev);
3440 b43legacy_set_synth_pu_delay(dev, 0);
3441 b43legacy_upload_card_macaddress(dev);
3442 spin_unlock_irqrestore(&wl->irq_lock, flags);
3443
3444 err = 0;
3445 out_mutex_unlock:
3446 mutex_unlock(&wl->mutex);
3447
3448 return err;
3449 }
3450
b43legacy_op_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3451 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3452 struct ieee80211_vif *vif)
3453 {
3454 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3455 struct b43legacy_wldev *dev = wl->current_dev;
3456 unsigned long flags;
3457
3458 b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3459
3460 mutex_lock(&wl->mutex);
3461
3462 B43legacy_WARN_ON(!wl->operating);
3463 B43legacy_WARN_ON(wl->vif != vif);
3464 wl->vif = NULL;
3465
3466 wl->operating = false;
3467
3468 spin_lock_irqsave(&wl->irq_lock, flags);
3469 b43legacy_adjust_opmode(dev);
3470 eth_zero_addr(wl->mac_addr);
3471 b43legacy_upload_card_macaddress(dev);
3472 spin_unlock_irqrestore(&wl->irq_lock, flags);
3473
3474 mutex_unlock(&wl->mutex);
3475 }
3476
b43legacy_op_start(struct ieee80211_hw * hw)3477 static int b43legacy_op_start(struct ieee80211_hw *hw)
3478 {
3479 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3480 struct b43legacy_wldev *dev = wl->current_dev;
3481 int did_init = 0;
3482 int err = 0;
3483
3484 /* Kill all old instance specific information to make sure
3485 * the card won't use it in the short timeframe between start
3486 * and mac80211 reconfiguring it. */
3487 eth_zero_addr(wl->bssid);
3488 eth_zero_addr(wl->mac_addr);
3489 wl->filter_flags = 0;
3490 wl->beacon0_uploaded = false;
3491 wl->beacon1_uploaded = false;
3492 wl->beacon_templates_virgin = true;
3493 wl->radio_enabled = true;
3494
3495 mutex_lock(&wl->mutex);
3496
3497 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3498 err = b43legacy_wireless_core_init(dev);
3499 if (err)
3500 goto out_mutex_unlock;
3501 did_init = 1;
3502 }
3503
3504 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3505 err = b43legacy_wireless_core_start(dev);
3506 if (err) {
3507 if (did_init)
3508 b43legacy_wireless_core_exit(dev);
3509 goto out_mutex_unlock;
3510 }
3511 }
3512
3513 wiphy_rfkill_start_polling(hw->wiphy);
3514
3515 out_mutex_unlock:
3516 mutex_unlock(&wl->mutex);
3517
3518 return err;
3519 }
3520
b43legacy_op_stop(struct ieee80211_hw * hw)3521 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3522 {
3523 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3524 struct b43legacy_wldev *dev = wl->current_dev;
3525
3526 cancel_work_sync(&(wl->beacon_update_trigger));
3527
3528 mutex_lock(&wl->mutex);
3529 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3530 b43legacy_wireless_core_stop(dev);
3531 b43legacy_wireless_core_exit(dev);
3532 wl->radio_enabled = false;
3533 mutex_unlock(&wl->mutex);
3534 }
3535
b43legacy_op_beacon_set_tim(struct ieee80211_hw * hw,struct ieee80211_sta * sta,bool set)3536 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3537 struct ieee80211_sta *sta, bool set)
3538 {
3539 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3540 unsigned long flags;
3541
3542 spin_lock_irqsave(&wl->irq_lock, flags);
3543 b43legacy_update_templates(wl);
3544 spin_unlock_irqrestore(&wl->irq_lock, flags);
3545
3546 return 0;
3547 }
3548
b43legacy_op_get_survey(struct ieee80211_hw * hw,int idx,struct survey_info * survey)3549 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3550 struct survey_info *survey)
3551 {
3552 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3553 struct b43legacy_wldev *dev = wl->current_dev;
3554 struct ieee80211_conf *conf = &hw->conf;
3555
3556 if (idx != 0)
3557 return -ENOENT;
3558
3559 survey->channel = conf->chandef.chan;
3560 survey->filled = SURVEY_INFO_NOISE_DBM;
3561 survey->noise = dev->stats.link_noise;
3562
3563 return 0;
3564 }
3565
3566 static const struct ieee80211_ops b43legacy_hw_ops = {
3567 .tx = b43legacy_op_tx,
3568 .conf_tx = b43legacy_op_conf_tx,
3569 .add_interface = b43legacy_op_add_interface,
3570 .remove_interface = b43legacy_op_remove_interface,
3571 .config = b43legacy_op_dev_config,
3572 .bss_info_changed = b43legacy_op_bss_info_changed,
3573 .configure_filter = b43legacy_op_configure_filter,
3574 .get_stats = b43legacy_op_get_stats,
3575 .start = b43legacy_op_start,
3576 .stop = b43legacy_op_stop,
3577 .set_tim = b43legacy_op_beacon_set_tim,
3578 .get_survey = b43legacy_op_get_survey,
3579 .rfkill_poll = b43legacy_rfkill_poll,
3580 };
3581
3582 /* Hard-reset the chip. Do not call this directly.
3583 * Use b43legacy_controller_restart()
3584 */
b43legacy_chip_reset(struct work_struct * work)3585 static void b43legacy_chip_reset(struct work_struct *work)
3586 {
3587 struct b43legacy_wldev *dev =
3588 container_of(work, struct b43legacy_wldev, restart_work);
3589 struct b43legacy_wl *wl = dev->wl;
3590 int err = 0;
3591 int prev_status;
3592
3593 mutex_lock(&wl->mutex);
3594
3595 prev_status = b43legacy_status(dev);
3596 /* Bring the device down... */
3597 if (prev_status >= B43legacy_STAT_STARTED)
3598 b43legacy_wireless_core_stop(dev);
3599 if (prev_status >= B43legacy_STAT_INITIALIZED)
3600 b43legacy_wireless_core_exit(dev);
3601
3602 /* ...and up again. */
3603 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3604 err = b43legacy_wireless_core_init(dev);
3605 if (err)
3606 goto out;
3607 }
3608 if (prev_status >= B43legacy_STAT_STARTED) {
3609 err = b43legacy_wireless_core_start(dev);
3610 if (err) {
3611 b43legacy_wireless_core_exit(dev);
3612 goto out;
3613 }
3614 }
3615 out:
3616 if (err)
3617 wl->current_dev = NULL; /* Failed to init the dev. */
3618 mutex_unlock(&wl->mutex);
3619 if (err)
3620 b43legacyerr(wl, "Controller restart FAILED\n");
3621 else
3622 b43legacyinfo(wl, "Controller restarted\n");
3623 }
3624
b43legacy_setup_modes(struct b43legacy_wldev * dev,int have_bphy,int have_gphy)3625 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3626 int have_bphy,
3627 int have_gphy)
3628 {
3629 struct ieee80211_hw *hw = dev->wl->hw;
3630 struct b43legacy_phy *phy = &dev->phy;
3631
3632 phy->possible_phymodes = 0;
3633 if (have_bphy) {
3634 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3635 &b43legacy_band_2GHz_BPHY;
3636 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3637 }
3638
3639 if (have_gphy) {
3640 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3641 &b43legacy_band_2GHz_GPHY;
3642 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3643 }
3644
3645 return 0;
3646 }
3647
b43legacy_wireless_core_detach(struct b43legacy_wldev * dev)3648 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3649 {
3650 /* We release firmware that late to not be required to re-request
3651 * is all the time when we reinit the core. */
3652 b43legacy_release_firmware(dev);
3653 }
3654
b43legacy_wireless_core_attach(struct b43legacy_wldev * dev)3655 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3656 {
3657 struct b43legacy_wl *wl = dev->wl;
3658 struct ssb_bus *bus = dev->dev->bus;
3659 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3660 int err;
3661 int have_bphy = 0;
3662 int have_gphy = 0;
3663 u32 tmp;
3664
3665 /* Do NOT do any device initialization here.
3666 * Do it in wireless_core_init() instead.
3667 * This function is for gathering basic information about the HW, only.
3668 * Also some structs may be set up here. But most likely you want to
3669 * have that in core_init(), too.
3670 */
3671
3672 err = ssb_bus_powerup(bus, 0);
3673 if (err) {
3674 b43legacyerr(wl, "Bus powerup failed\n");
3675 goto out;
3676 }
3677 /* Get the PHY type. */
3678 if (dev->dev->id.revision >= 5) {
3679 u32 tmshigh;
3680
3681 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3682 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3683 if (!have_gphy)
3684 have_bphy = 1;
3685 } else if (dev->dev->id.revision == 4)
3686 have_gphy = 1;
3687 else
3688 have_bphy = 1;
3689
3690 dev->phy.gmode = (have_gphy || have_bphy);
3691 dev->phy.radio_on = true;
3692 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3693 b43legacy_wireless_core_reset(dev, tmp);
3694
3695 err = b43legacy_phy_versioning(dev);
3696 if (err)
3697 goto err_powerdown;
3698 /* Check if this device supports multiband. */
3699 if (!pdev ||
3700 (pdev->device != 0x4312 &&
3701 pdev->device != 0x4319 &&
3702 pdev->device != 0x4324)) {
3703 /* No multiband support. */
3704 have_bphy = 0;
3705 have_gphy = 0;
3706 switch (dev->phy.type) {
3707 case B43legacy_PHYTYPE_B:
3708 have_bphy = 1;
3709 break;
3710 case B43legacy_PHYTYPE_G:
3711 have_gphy = 1;
3712 break;
3713 default:
3714 B43legacy_BUG_ON(1);
3715 }
3716 }
3717 dev->phy.gmode = (have_gphy || have_bphy);
3718 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3719 b43legacy_wireless_core_reset(dev, tmp);
3720
3721 err = b43legacy_validate_chipaccess(dev);
3722 if (err)
3723 goto err_powerdown;
3724 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3725 if (err)
3726 goto err_powerdown;
3727
3728 /* Now set some default "current_dev" */
3729 if (!wl->current_dev)
3730 wl->current_dev = dev;
3731 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3732
3733 b43legacy_radio_turn_off(dev, 1);
3734 b43legacy_switch_analog(dev, 0);
3735 ssb_device_disable(dev->dev, 0);
3736 ssb_bus_may_powerdown(bus);
3737
3738 out:
3739 return err;
3740
3741 err_powerdown:
3742 ssb_bus_may_powerdown(bus);
3743 return err;
3744 }
3745
b43legacy_one_core_detach(struct ssb_device * dev)3746 static void b43legacy_one_core_detach(struct ssb_device *dev)
3747 {
3748 struct b43legacy_wldev *wldev;
3749 struct b43legacy_wl *wl;
3750
3751 /* Do not cancel ieee80211-workqueue based work here.
3752 * See comment in b43legacy_remove(). */
3753
3754 wldev = ssb_get_drvdata(dev);
3755 wl = wldev->wl;
3756 b43legacy_debugfs_remove_device(wldev);
3757 b43legacy_wireless_core_detach(wldev);
3758 list_del(&wldev->list);
3759 wl->nr_devs--;
3760 ssb_set_drvdata(dev, NULL);
3761 kfree(wldev);
3762 }
3763
b43legacy_one_core_attach(struct ssb_device * dev,struct b43legacy_wl * wl)3764 static int b43legacy_one_core_attach(struct ssb_device *dev,
3765 struct b43legacy_wl *wl)
3766 {
3767 struct b43legacy_wldev *wldev;
3768 int err = -ENOMEM;
3769
3770 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3771 if (!wldev)
3772 goto out;
3773
3774 wldev->dev = dev;
3775 wldev->wl = wl;
3776 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3777 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3778 tasklet_init(&wldev->isr_tasklet,
3779 b43legacy_interrupt_tasklet,
3780 (unsigned long)wldev);
3781 if (modparam_pio)
3782 wldev->__using_pio = true;
3783 INIT_LIST_HEAD(&wldev->list);
3784
3785 err = b43legacy_wireless_core_attach(wldev);
3786 if (err)
3787 goto err_kfree_wldev;
3788
3789 list_add(&wldev->list, &wl->devlist);
3790 wl->nr_devs++;
3791 ssb_set_drvdata(dev, wldev);
3792 b43legacy_debugfs_add_device(wldev);
3793 out:
3794 return err;
3795
3796 err_kfree_wldev:
3797 kfree(wldev);
3798 return err;
3799 }
3800
b43legacy_sprom_fixup(struct ssb_bus * bus)3801 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3802 {
3803 /* boardflags workarounds */
3804 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3805 bus->boardinfo.type == 0x4E &&
3806 bus->sprom.board_rev > 0x40)
3807 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3808 }
3809
b43legacy_wireless_exit(struct ssb_device * dev,struct b43legacy_wl * wl)3810 static void b43legacy_wireless_exit(struct ssb_device *dev,
3811 struct b43legacy_wl *wl)
3812 {
3813 struct ieee80211_hw *hw = wl->hw;
3814
3815 ssb_set_devtypedata(dev, NULL);
3816 ieee80211_free_hw(hw);
3817 }
3818
b43legacy_wireless_init(struct ssb_device * dev)3819 static int b43legacy_wireless_init(struct ssb_device *dev)
3820 {
3821 struct ssb_sprom *sprom = &dev->bus->sprom;
3822 struct ieee80211_hw *hw;
3823 struct b43legacy_wl *wl;
3824 int err = -ENOMEM;
3825 int queue_num;
3826
3827 b43legacy_sprom_fixup(dev->bus);
3828
3829 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3830 if (!hw) {
3831 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3832 goto out;
3833 }
3834
3835 /* fill hw info */
3836 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3837 ieee80211_hw_set(hw, SIGNAL_DBM);
3838 ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3839
3840 hw->wiphy->interface_modes =
3841 BIT(NL80211_IFTYPE_AP) |
3842 BIT(NL80211_IFTYPE_STATION) |
3843 BIT(NL80211_IFTYPE_WDS) |
3844 BIT(NL80211_IFTYPE_ADHOC);
3845 hw->queues = 1; /* FIXME: hardware has more queues */
3846 hw->max_rates = 2;
3847 SET_IEEE80211_DEV(hw, dev->dev);
3848 if (is_valid_ether_addr(sprom->et1mac))
3849 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3850 else
3851 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3852
3853 /* Get and initialize struct b43legacy_wl */
3854 wl = hw_to_b43legacy_wl(hw);
3855 memset(wl, 0, sizeof(*wl));
3856 wl->hw = hw;
3857 spin_lock_init(&wl->irq_lock);
3858 spin_lock_init(&wl->leds_lock);
3859 mutex_init(&wl->mutex);
3860 INIT_LIST_HEAD(&wl->devlist);
3861 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3862 INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3863
3864 /* Initialize queues and flags. */
3865 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3866 skb_queue_head_init(&wl->tx_queue[queue_num]);
3867 wl->tx_queue_stopped[queue_num] = 0;
3868 }
3869
3870 ssb_set_devtypedata(dev, wl);
3871 b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3872 dev->bus->chip_id, dev->id.revision);
3873 err = 0;
3874 out:
3875 return err;
3876 }
3877
b43legacy_probe(struct ssb_device * dev,const struct ssb_device_id * id)3878 static int b43legacy_probe(struct ssb_device *dev,
3879 const struct ssb_device_id *id)
3880 {
3881 struct b43legacy_wl *wl;
3882 int err;
3883 int first = 0;
3884
3885 wl = ssb_get_devtypedata(dev);
3886 if (!wl) {
3887 /* Probing the first core - setup common struct b43legacy_wl */
3888 first = 1;
3889 err = b43legacy_wireless_init(dev);
3890 if (err)
3891 goto out;
3892 wl = ssb_get_devtypedata(dev);
3893 B43legacy_WARN_ON(!wl);
3894 }
3895 err = b43legacy_one_core_attach(dev, wl);
3896 if (err)
3897 goto err_wireless_exit;
3898
3899 /* setup and start work to load firmware */
3900 INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3901 schedule_work(&wl->firmware_load);
3902
3903 out:
3904 return err;
3905
3906 err_wireless_exit:
3907 if (first)
3908 b43legacy_wireless_exit(dev, wl);
3909 return err;
3910 }
3911
b43legacy_remove(struct ssb_device * dev)3912 static void b43legacy_remove(struct ssb_device *dev)
3913 {
3914 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3915 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3916
3917 /* We must cancel any work here before unregistering from ieee80211,
3918 * as the ieee80211 unreg will destroy the workqueue. */
3919 cancel_work_sync(&wldev->restart_work);
3920 cancel_work_sync(&wl->firmware_load);
3921 complete(&wldev->fw_load_complete);
3922
3923 B43legacy_WARN_ON(!wl);
3924 if (!wldev->fw.ucode)
3925 return; /* NULL if fw never loaded */
3926 if (wl->current_dev == wldev)
3927 ieee80211_unregister_hw(wl->hw);
3928
3929 b43legacy_one_core_detach(dev);
3930
3931 if (list_empty(&wl->devlist))
3932 /* Last core on the chip unregistered.
3933 * We can destroy common struct b43legacy_wl.
3934 */
3935 b43legacy_wireless_exit(dev, wl);
3936 }
3937
3938 /* Perform a hardware reset. This can be called from any context. */
b43legacy_controller_restart(struct b43legacy_wldev * dev,const char * reason)3939 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3940 const char *reason)
3941 {
3942 /* Must avoid requeueing, if we are in shutdown. */
3943 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3944 return;
3945 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3946 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3947 }
3948
3949 #ifdef CONFIG_PM
3950
b43legacy_suspend(struct ssb_device * dev,pm_message_t state)3951 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3952 {
3953 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3954 struct b43legacy_wl *wl = wldev->wl;
3955
3956 b43legacydbg(wl, "Suspending...\n");
3957
3958 mutex_lock(&wl->mutex);
3959 wldev->suspend_init_status = b43legacy_status(wldev);
3960 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3961 b43legacy_wireless_core_stop(wldev);
3962 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3963 b43legacy_wireless_core_exit(wldev);
3964 mutex_unlock(&wl->mutex);
3965
3966 b43legacydbg(wl, "Device suspended.\n");
3967
3968 return 0;
3969 }
3970
b43legacy_resume(struct ssb_device * dev)3971 static int b43legacy_resume(struct ssb_device *dev)
3972 {
3973 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3974 struct b43legacy_wl *wl = wldev->wl;
3975 int err = 0;
3976
3977 b43legacydbg(wl, "Resuming...\n");
3978
3979 mutex_lock(&wl->mutex);
3980 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3981 err = b43legacy_wireless_core_init(wldev);
3982 if (err) {
3983 b43legacyerr(wl, "Resume failed at core init\n");
3984 goto out;
3985 }
3986 }
3987 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3988 err = b43legacy_wireless_core_start(wldev);
3989 if (err) {
3990 b43legacy_wireless_core_exit(wldev);
3991 b43legacyerr(wl, "Resume failed at core start\n");
3992 goto out;
3993 }
3994 }
3995
3996 b43legacydbg(wl, "Device resumed.\n");
3997 out:
3998 mutex_unlock(&wl->mutex);
3999 return err;
4000 }
4001
4002 #else /* CONFIG_PM */
4003 # define b43legacy_suspend NULL
4004 # define b43legacy_resume NULL
4005 #endif /* CONFIG_PM */
4006
4007 static struct ssb_driver b43legacy_ssb_driver = {
4008 .name = KBUILD_MODNAME,
4009 .id_table = b43legacy_ssb_tbl,
4010 .probe = b43legacy_probe,
4011 .remove = b43legacy_remove,
4012 .suspend = b43legacy_suspend,
4013 .resume = b43legacy_resume,
4014 };
4015
b43legacy_print_driverinfo(void)4016 static void b43legacy_print_driverinfo(void)
4017 {
4018 const char *feat_pci = "", *feat_leds = "",
4019 *feat_pio = "", *feat_dma = "";
4020
4021 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
4022 feat_pci = "P";
4023 #endif
4024 #ifdef CONFIG_B43LEGACY_LEDS
4025 feat_leds = "L";
4026 #endif
4027 #ifdef CONFIG_B43LEGACY_PIO
4028 feat_pio = "I";
4029 #endif
4030 #ifdef CONFIG_B43LEGACY_DMA
4031 feat_dma = "D";
4032 #endif
4033 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4034 "[ Features: %s%s%s%s ]\n",
4035 feat_pci, feat_leds, feat_pio, feat_dma);
4036 }
4037
b43legacy_init(void)4038 static int __init b43legacy_init(void)
4039 {
4040 int err;
4041
4042 b43legacy_debugfs_init();
4043
4044 err = ssb_driver_register(&b43legacy_ssb_driver);
4045 if (err)
4046 goto err_dfs_exit;
4047
4048 b43legacy_print_driverinfo();
4049
4050 return err;
4051
4052 err_dfs_exit:
4053 b43legacy_debugfs_exit();
4054 return err;
4055 }
4056
b43legacy_exit(void)4057 static void __exit b43legacy_exit(void)
4058 {
4059 ssb_driver_unregister(&b43legacy_ssb_driver);
4060 b43legacy_debugfs_exit();
4061 }
4062
4063 module_init(b43legacy_init)
4064 module_exit(b43legacy_exit)
4065