1 /*
2 * Copyright 2005-2010 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7 #ifndef _MACH_PLL_H
8 #define _MACH_PLL_H
9
10 #ifndef __ASSEMBLY__
11
12 #ifdef CONFIG_SMP
13
14 #include <asm/blackfin.h>
15 #include <asm/irqflags.h>
16 #include <mach/irq.h>
17
18 #define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32)
19 #define SUPPLE_1_WAKEUP ((IRQ_SUPPLE_1 - (IRQ_CORETMR + 1)) % 32)
20
21 static inline void
bfin_iwr_restore(unsigned long iwr0,unsigned long iwr1,unsigned long iwr2)22 bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2)
23 {
24 unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
25
26 bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0);
27 bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1);
28 }
29 #define bfin_iwr_restore bfin_iwr_restore
30
31 static inline void
bfin_iwr_save(unsigned long niwr0,unsigned long niwr1,unsigned long niwr2,unsigned long * iwr0,unsigned long * iwr1,unsigned long * iwr2)32 bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2,
33 unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
34 {
35 unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
36
37 *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF);
38 *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF);
39 bfin_iwr_restore(niwr0, niwr1, niwr2);
40 }
41 #define bfin_iwr_save bfin_iwr_save
42
43 static inline void
bfin_iwr_set_sup0(unsigned long * iwr0,unsigned long * iwr1,unsigned long * iwr2)44 bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
45 {
46 bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP) |
47 IWR_ENABLE(SUPPLE_1_WAKEUP), 0, iwr0, iwr1, iwr2);
48 }
49
50 #endif
51
52 #endif
53
54 #include <mach-common/pll.h>
55
56 #endif
57