1 /* OLPC machine specific definitions */
2
3 #ifndef _ASM_X86_OLPC_H
4 #define _ASM_X86_OLPC_H
5
6 #include <asm/geode.h>
7
8 struct olpc_platform_t {
9 int flags;
10 uint32_t boardrev;
11 int ecver;
12 };
13
14 #define OLPC_F_PRESENT 0x01
15 #define OLPC_F_DCON 0x02
16 #define OLPC_F_EC_WIDE_SCI 0x04
17
18 #ifdef CONFIG_OLPC
19
20 extern struct olpc_platform_t olpc_platform_info;
21
22 /*
23 * OLPC board IDs contain the major build number within the mask 0x0ff0,
24 * and the minor build number within 0x000f. Pre-builds have a minor
25 * number less than 8, and normal builds start at 8. For example, 0x0B10
26 * is a PreB1, and 0x0C18 is a C1.
27 */
28
olpc_board(uint8_t id)29 static inline uint32_t olpc_board(uint8_t id)
30 {
31 return (id << 4) | 0x8;
32 }
33
olpc_board_pre(uint8_t id)34 static inline uint32_t olpc_board_pre(uint8_t id)
35 {
36 return id << 4;
37 }
38
machine_is_olpc(void)39 static inline int machine_is_olpc(void)
40 {
41 return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
42 }
43
44 /*
45 * The DCON is OLPC's Display Controller. It has a number of unique
46 * features that we might want to take advantage of..
47 */
olpc_has_dcon(void)48 static inline int olpc_has_dcon(void)
49 {
50 return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
51 }
52
53 /*
54 * The "Mass Production" version of OLPC's XO is identified as being model
55 * C2. During the prototype phase, the following models (in chronological
56 * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models
57 * were based on Geode GX CPUs, and models after that were based upon
58 * Geode LX CPUs. There were also some hand-assembled models floating
59 * around, referred to as PreB1, PreB2, etc.
60 */
olpc_board_at_least(uint32_t rev)61 static inline int olpc_board_at_least(uint32_t rev)
62 {
63 return olpc_platform_info.boardrev >= rev;
64 }
65
66 extern void olpc_ec_wakeup_set(u16 value);
67 extern void olpc_ec_wakeup_clear(u16 value);
68 extern bool olpc_ec_wakeup_available(void);
69
70 extern int olpc_ec_mask_write(u16 bits);
71 extern int olpc_ec_sci_query(u16 *sci_value);
72
73 #else
74
machine_is_olpc(void)75 static inline int machine_is_olpc(void)
76 {
77 return 0;
78 }
79
olpc_has_dcon(void)80 static inline int olpc_has_dcon(void)
81 {
82 return 0;
83 }
84
olpc_ec_wakeup_set(u16 value)85 static inline void olpc_ec_wakeup_set(u16 value) { }
olpc_ec_wakeup_clear(u16 value)86 static inline void olpc_ec_wakeup_clear(u16 value) { }
87
olpc_ec_wakeup_available(void)88 static inline bool olpc_ec_wakeup_available(void)
89 {
90 return false;
91 }
92
93 #endif
94
95 #ifdef CONFIG_OLPC_XO1_PM
96 extern void do_olpc_suspend_lowlevel(void);
97 extern void olpc_xo1_pm_wakeup_set(u16 value);
98 extern void olpc_xo1_pm_wakeup_clear(u16 value);
99 #endif
100
101 extern int pci_olpc_init(void);
102
103 /* SCI source values */
104
105 #define EC_SCI_SRC_EMPTY 0x00
106 #define EC_SCI_SRC_GAME 0x01
107 #define EC_SCI_SRC_BATTERY 0x02
108 #define EC_SCI_SRC_BATSOC 0x04
109 #define EC_SCI_SRC_BATERR 0x08
110 #define EC_SCI_SRC_EBOOK 0x10 /* XO-1 only */
111 #define EC_SCI_SRC_WLAN 0x20 /* XO-1 only */
112 #define EC_SCI_SRC_ACPWR 0x40
113 #define EC_SCI_SRC_BATCRIT 0x80
114 #define EC_SCI_SRC_GPWAKE 0x100 /* XO-1.5 only */
115 #define EC_SCI_SRC_ALL 0x1FF
116
117 /* GPIO assignments */
118
119 #define OLPC_GPIO_MIC_AC 1
120 #define OLPC_GPIO_DCON_STAT0 5
121 #define OLPC_GPIO_DCON_STAT1 6
122 #define OLPC_GPIO_DCON_IRQ 7
123 #define OLPC_GPIO_THRM_ALRM geode_gpio(10)
124 #define OLPC_GPIO_DCON_LOAD 11
125 #define OLPC_GPIO_DCON_BLANK 12
126 #define OLPC_GPIO_SMB_CLK 14
127 #define OLPC_GPIO_SMB_DATA 15
128 #define OLPC_GPIO_WORKAUX geode_gpio(24)
129 #define OLPC_GPIO_LID 26
130 #define OLPC_GPIO_ECSCI 27
131
132 #endif /* _ASM_X86_OLPC_H */
133