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1 /*
2  * BIOS32 and PCI BIOS handling.
3  */
4 
5 #include <linux/pci.h>
6 #include <linux/init.h>
7 #include <linux/slab.h>
8 #include <linux/module.h>
9 #include <linux/uaccess.h>
10 #include <asm/pci_x86.h>
11 #include <asm/pci-functions.h>
12 #include <asm/cacheflush.h>
13 
14 /* BIOS32 signature: "_32_" */
15 #define BIOS32_SIGNATURE	(('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
16 
17 /* PCI signature: "PCI " */
18 #define PCI_SIGNATURE		(('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
19 
20 /* PCI service signature: "$PCI" */
21 #define PCI_SERVICE		(('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
22 
23 /* PCI BIOS hardware mechanism flags */
24 #define PCIBIOS_HW_TYPE1		0x01
25 #define PCIBIOS_HW_TYPE2		0x02
26 #define PCIBIOS_HW_TYPE1_SPEC		0x10
27 #define PCIBIOS_HW_TYPE2_SPEC		0x20
28 
29 int pcibios_enabled;
30 
31 /* According to the BIOS specification at:
32  * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could
33  * restrict the x zone to some pages and make it ro. But this may be
34  * broken on some bios, complex to handle with static_protections.
35  * We could make the 0xe0000-0x100000 range rox, but this can break
36  * some ISA mapping.
37  *
38  * So we let's an rw and x hole when pcibios is used. This shouldn't
39  * happen for modern system with mmconfig, and if you don't want it
40  * you could disable pcibios...
41  */
set_bios_x(void)42 static inline void set_bios_x(void)
43 {
44 	pcibios_enabled = 1;
45 	set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT);
46 	if (__supported_pte_mask & _PAGE_NX)
47 		printk(KERN_INFO "PCI : PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n");
48 }
49 
50 /*
51  * This is the standard structure used to identify the entry point
52  * to the BIOS32 Service Directory, as documented in
53  * 	Standard BIOS 32-bit Service Directory Proposal
54  * 	Revision 0.4 May 24, 1993
55  * 	Phoenix Technologies Ltd.
56  *	Norwood, MA
57  * and the PCI BIOS specification.
58  */
59 
60 union bios32 {
61 	struct {
62 		unsigned long signature;	/* _32_ */
63 		unsigned long entry;		/* 32 bit physical address */
64 		unsigned char revision;		/* Revision level, 0 */
65 		unsigned char length;		/* Length in paragraphs should be 01 */
66 		unsigned char checksum;		/* All bytes must add up to zero */
67 		unsigned char reserved[5]; 	/* Must be zero */
68 	} fields;
69 	char chars[16];
70 };
71 
72 /*
73  * Physical address of the service directory.  I don't know if we're
74  * allowed to have more than one of these or not, so just in case
75  * we'll make pcibios_present() take a memory start parameter and store
76  * the array there.
77  */
78 
79 static struct {
80 	unsigned long address;
81 	unsigned short segment;
82 } bios32_indirect __initdata = { 0, __KERNEL_CS };
83 
84 /*
85  * Returns the entry point for the given service, NULL on error
86  */
87 
bios32_service(unsigned long service)88 static unsigned long __init bios32_service(unsigned long service)
89 {
90 	unsigned char return_code;	/* %al */
91 	unsigned long address;		/* %ebx */
92 	unsigned long length;		/* %ecx */
93 	unsigned long entry;		/* %edx */
94 	unsigned long flags;
95 
96 	local_irq_save(flags);
97 	__asm__("lcall *(%%edi); cld"
98 		: "=a" (return_code),
99 		  "=b" (address),
100 		  "=c" (length),
101 		  "=d" (entry)
102 		: "0" (service),
103 		  "1" (0),
104 		  "D" (&bios32_indirect));
105 	local_irq_restore(flags);
106 
107 	switch (return_code) {
108 		case 0:
109 			return address + entry;
110 		case 0x80:	/* Not present */
111 			printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
112 			return 0;
113 		default: /* Shouldn't happen */
114 			printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
115 				service, return_code);
116 			return 0;
117 	}
118 }
119 
120 static struct {
121 	unsigned long address;
122 	unsigned short segment;
123 } pci_indirect = { 0, __KERNEL_CS };
124 
125 static int pci_bios_present;
126 
check_pcibios(void)127 static int __init check_pcibios(void)
128 {
129 	u32 signature, eax, ebx, ecx;
130 	u8 status, major_ver, minor_ver, hw_mech;
131 	unsigned long flags, pcibios_entry;
132 
133 	if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
134 		pci_indirect.address = pcibios_entry + PAGE_OFFSET;
135 
136 		local_irq_save(flags);
137 		__asm__(
138 			"lcall *(%%edi); cld\n\t"
139 			"jc 1f\n\t"
140 			"xor %%ah, %%ah\n"
141 			"1:"
142 			: "=d" (signature),
143 			  "=a" (eax),
144 			  "=b" (ebx),
145 			  "=c" (ecx)
146 			: "1" (PCIBIOS_PCI_BIOS_PRESENT),
147 			  "D" (&pci_indirect)
148 			: "memory");
149 		local_irq_restore(flags);
150 
151 		status = (eax >> 8) & 0xff;
152 		hw_mech = eax & 0xff;
153 		major_ver = (ebx >> 8) & 0xff;
154 		minor_ver = ebx & 0xff;
155 		if (pcibios_last_bus < 0)
156 			pcibios_last_bus = ecx & 0xff;
157 		DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
158 			status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
159 		if (status || signature != PCI_SIGNATURE) {
160 			printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
161 				status, signature);
162 			return 0;
163 		}
164 		printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
165 			major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
166 #ifdef CONFIG_PCI_DIRECT
167 		if (!(hw_mech & PCIBIOS_HW_TYPE1))
168 			pci_probe &= ~PCI_PROBE_CONF1;
169 		if (!(hw_mech & PCIBIOS_HW_TYPE2))
170 			pci_probe &= ~PCI_PROBE_CONF2;
171 #endif
172 		return 1;
173 	}
174 	return 0;
175 }
176 
pci_bios_read(unsigned int seg,unsigned int bus,unsigned int devfn,int reg,int len,u32 * value)177 static int pci_bios_read(unsigned int seg, unsigned int bus,
178 			 unsigned int devfn, int reg, int len, u32 *value)
179 {
180 	unsigned long result = 0;
181 	unsigned long flags;
182 	unsigned long bx = (bus << 8) | devfn;
183 
184 	WARN_ON(seg);
185 	if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
186 		return -EINVAL;
187 
188 	raw_spin_lock_irqsave(&pci_config_lock, flags);
189 
190 	switch (len) {
191 	case 1:
192 		__asm__("lcall *(%%esi); cld\n\t"
193 			"jc 1f\n\t"
194 			"xor %%ah, %%ah\n"
195 			"1:"
196 			: "=c" (*value),
197 			  "=a" (result)
198 			: "1" (PCIBIOS_READ_CONFIG_BYTE),
199 			  "b" (bx),
200 			  "D" ((long)reg),
201 			  "S" (&pci_indirect));
202 		/*
203 		 * Zero-extend the result beyond 8 bits, do not trust the
204 		 * BIOS having done it:
205 		 */
206 		*value &= 0xff;
207 		break;
208 	case 2:
209 		__asm__("lcall *(%%esi); cld\n\t"
210 			"jc 1f\n\t"
211 			"xor %%ah, %%ah\n"
212 			"1:"
213 			: "=c" (*value),
214 			  "=a" (result)
215 			: "1" (PCIBIOS_READ_CONFIG_WORD),
216 			  "b" (bx),
217 			  "D" ((long)reg),
218 			  "S" (&pci_indirect));
219 		/*
220 		 * Zero-extend the result beyond 16 bits, do not trust the
221 		 * BIOS having done it:
222 		 */
223 		*value &= 0xffff;
224 		break;
225 	case 4:
226 		__asm__("lcall *(%%esi); cld\n\t"
227 			"jc 1f\n\t"
228 			"xor %%ah, %%ah\n"
229 			"1:"
230 			: "=c" (*value),
231 			  "=a" (result)
232 			: "1" (PCIBIOS_READ_CONFIG_DWORD),
233 			  "b" (bx),
234 			  "D" ((long)reg),
235 			  "S" (&pci_indirect));
236 		break;
237 	}
238 
239 	raw_spin_unlock_irqrestore(&pci_config_lock, flags);
240 
241 	return (int)((result & 0xff00) >> 8);
242 }
243 
pci_bios_write(unsigned int seg,unsigned int bus,unsigned int devfn,int reg,int len,u32 value)244 static int pci_bios_write(unsigned int seg, unsigned int bus,
245 			  unsigned int devfn, int reg, int len, u32 value)
246 {
247 	unsigned long result = 0;
248 	unsigned long flags;
249 	unsigned long bx = (bus << 8) | devfn;
250 
251 	WARN_ON(seg);
252 	if ((bus > 255) || (devfn > 255) || (reg > 255))
253 		return -EINVAL;
254 
255 	raw_spin_lock_irqsave(&pci_config_lock, flags);
256 
257 	switch (len) {
258 	case 1:
259 		__asm__("lcall *(%%esi); cld\n\t"
260 			"jc 1f\n\t"
261 			"xor %%ah, %%ah\n"
262 			"1:"
263 			: "=a" (result)
264 			: "0" (PCIBIOS_WRITE_CONFIG_BYTE),
265 			  "c" (value),
266 			  "b" (bx),
267 			  "D" ((long)reg),
268 			  "S" (&pci_indirect));
269 		break;
270 	case 2:
271 		__asm__("lcall *(%%esi); cld\n\t"
272 			"jc 1f\n\t"
273 			"xor %%ah, %%ah\n"
274 			"1:"
275 			: "=a" (result)
276 			: "0" (PCIBIOS_WRITE_CONFIG_WORD),
277 			  "c" (value),
278 			  "b" (bx),
279 			  "D" ((long)reg),
280 			  "S" (&pci_indirect));
281 		break;
282 	case 4:
283 		__asm__("lcall *(%%esi); cld\n\t"
284 			"jc 1f\n\t"
285 			"xor %%ah, %%ah\n"
286 			"1:"
287 			: "=a" (result)
288 			: "0" (PCIBIOS_WRITE_CONFIG_DWORD),
289 			  "c" (value),
290 			  "b" (bx),
291 			  "D" ((long)reg),
292 			  "S" (&pci_indirect));
293 		break;
294 	}
295 
296 	raw_spin_unlock_irqrestore(&pci_config_lock, flags);
297 
298 	return (int)((result & 0xff00) >> 8);
299 }
300 
301 
302 /*
303  * Function table for BIOS32 access
304  */
305 
306 static const struct pci_raw_ops pci_bios_access = {
307 	.read =		pci_bios_read,
308 	.write =	pci_bios_write
309 };
310 
311 /*
312  * Try to find PCI BIOS.
313  */
314 
pci_find_bios(void)315 static const struct pci_raw_ops *__init pci_find_bios(void)
316 {
317 	union bios32 *check;
318 	unsigned char sum;
319 	int i, length;
320 
321 	/*
322 	 * Follow the standard procedure for locating the BIOS32 Service
323 	 * directory by scanning the permissible address range from
324 	 * 0xe0000 through 0xfffff for a valid BIOS32 structure.
325 	 */
326 
327 	for (check = (union bios32 *) __va(0xe0000);
328 	     check <= (union bios32 *) __va(0xffff0);
329 	     ++check) {
330 		long sig;
331 		if (probe_kernel_address(&check->fields.signature, sig))
332 			continue;
333 
334 		if (check->fields.signature != BIOS32_SIGNATURE)
335 			continue;
336 		length = check->fields.length * 16;
337 		if (!length)
338 			continue;
339 		sum = 0;
340 		for (i = 0; i < length ; ++i)
341 			sum += check->chars[i];
342 		if (sum != 0)
343 			continue;
344 		if (check->fields.revision != 0) {
345 			printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
346 				check->fields.revision, check);
347 			continue;
348 		}
349 		DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
350 		if (check->fields.entry >= 0x100000) {
351 			printk("PCI: BIOS32 entry (0x%p) in high memory, "
352 					"cannot use.\n", check);
353 			return NULL;
354 		} else {
355 			unsigned long bios32_entry = check->fields.entry;
356 			DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
357 					bios32_entry);
358 			bios32_indirect.address = bios32_entry + PAGE_OFFSET;
359 			set_bios_x();
360 			if (check_pcibios())
361 				return &pci_bios_access;
362 		}
363 		break;	/* Hopefully more than one BIOS32 cannot happen... */
364 	}
365 
366 	return NULL;
367 }
368 
369 /*
370  *  BIOS Functions for IRQ Routing
371  */
372 
373 struct irq_routing_options {
374 	u16 size;
375 	struct irq_info *table;
376 	u16 segment;
377 } __attribute__((packed));
378 
pcibios_get_irq_routing_table(void)379 struct irq_routing_table * pcibios_get_irq_routing_table(void)
380 {
381 	struct irq_routing_options opt;
382 	struct irq_routing_table *rt = NULL;
383 	int ret, map;
384 	unsigned long page;
385 
386 	if (!pci_bios_present)
387 		return NULL;
388 	page = __get_free_page(GFP_KERNEL);
389 	if (!page)
390 		return NULL;
391 	opt.table = (struct irq_info *) page;
392 	opt.size = PAGE_SIZE;
393 	opt.segment = __KERNEL_DS;
394 
395 	DBG("PCI: Fetching IRQ routing table... ");
396 	__asm__("push %%es\n\t"
397 		"push %%ds\n\t"
398 		"pop  %%es\n\t"
399 		"lcall *(%%esi); cld\n\t"
400 		"pop %%es\n\t"
401 		"jc 1f\n\t"
402 		"xor %%ah, %%ah\n"
403 		"1:"
404 		: "=a" (ret),
405 		  "=b" (map),
406 		  "=m" (opt)
407 		: "0" (PCIBIOS_GET_ROUTING_OPTIONS),
408 		  "1" (0),
409 		  "D" ((long) &opt),
410 		  "S" (&pci_indirect),
411 		  "m" (opt)
412 		: "memory");
413 	DBG("OK  ret=%d, size=%d, map=%x\n", ret, opt.size, map);
414 	if (ret & 0xff00)
415 		printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
416 	else if (opt.size) {
417 		rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
418 		if (rt) {
419 			memset(rt, 0, sizeof(struct irq_routing_table));
420 			rt->size = opt.size + sizeof(struct irq_routing_table);
421 			rt->exclusive_irqs = map;
422 			memcpy(rt->slots, (void *) page, opt.size);
423 			printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
424 		}
425 	}
426 	free_page(page);
427 	return rt;
428 }
429 EXPORT_SYMBOL(pcibios_get_irq_routing_table);
430 
pcibios_set_irq_routing(struct pci_dev * dev,int pin,int irq)431 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
432 {
433 	int ret;
434 
435 	__asm__("lcall *(%%esi); cld\n\t"
436 		"jc 1f\n\t"
437 		"xor %%ah, %%ah\n"
438 		"1:"
439 		: "=a" (ret)
440 		: "0" (PCIBIOS_SET_PCI_HW_INT),
441 		  "b" ((dev->bus->number << 8) | dev->devfn),
442 		  "c" ((irq << 8) | (pin + 10)),
443 		  "S" (&pci_indirect));
444 	return !(ret & 0xff00);
445 }
446 EXPORT_SYMBOL(pcibios_set_irq_routing);
447 
pci_pcbios_init(void)448 void __init pci_pcbios_init(void)
449 {
450 	if ((pci_probe & PCI_PROBE_BIOS)
451 		&& ((raw_pci_ops = pci_find_bios()))) {
452 		pci_bios_present = 1;
453 	}
454 }
455 
456