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1 /*
2  *  arch/m68k/mvme16x/config.c
3  *
4  *  Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
5  *
6  * Based on:
7  *
8  *  linux/amiga/config.c
9  *
10  *  Copyright (C) 1993 Hamish Macdonald
11  *
12  * This file is subject to the terms and conditions of the GNU General Public
13  * License.  See the file README.legal in the main directory of this archive
14  * for more details.
15  */
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/linkage.h>
24 #include <linux/init.h>
25 #include <linux/major.h>
26 #include <linux/genhd.h>
27 #include <linux/rtc.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 
31 #include <asm/bootinfo.h>
32 #include <asm/bootinfo-vme.h>
33 #include <asm/byteorder.h>
34 #include <asm/pgtable.h>
35 #include <asm/setup.h>
36 #include <asm/irq.h>
37 #include <asm/traps.h>
38 #include <asm/rtc.h>
39 #include <asm/machdep.h>
40 #include <asm/mvme16xhw.h>
41 
42 extern t_bdid mvme_bdid;
43 
44 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
45 
46 static void mvme16x_get_model(char *model);
47 extern void mvme16x_sched_init(irq_handler_t handler);
48 extern u32 mvme16x_gettimeoffset(void);
49 extern int mvme16x_hwclk (int, struct rtc_time *);
50 extern int mvme16x_set_clock_mmss (unsigned long);
51 extern void mvme16x_reset (void);
52 
53 int bcd2int (unsigned char b);
54 
55 
56 unsigned short mvme16x_config;
57 EXPORT_SYMBOL(mvme16x_config);
58 
59 
mvme16x_parse_bootinfo(const struct bi_record * bi)60 int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
61 {
62 	uint16_t tag = be16_to_cpu(bi->tag);
63 	if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
64 		return 0;
65 	else
66 		return 1;
67 }
68 
mvme16x_reset(void)69 void mvme16x_reset(void)
70 {
71 	printk ("\r\n\nCalled mvme16x_reset\r\n"
72 			"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
73 	/* The string of returns is to delay the reset until the whole
74 	 * message is output.  Assert reset bit in GCSR */
75 	*(volatile char *)0xfff40107 = 0x80;
76 }
77 
mvme16x_get_model(char * model)78 static void mvme16x_get_model(char *model)
79 {
80     p_bdid p = &mvme_bdid;
81     char suf[4];
82 
83     suf[1] = p->brdsuffix[0];
84     suf[2] = p->brdsuffix[1];
85     suf[3] = '\0';
86     suf[0] = suf[1] ? '-' : '\0';
87 
88     sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
89 }
90 
91 
mvme16x_get_hardware_list(struct seq_file * m)92 static void mvme16x_get_hardware_list(struct seq_file *m)
93 {
94     uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
95 
96     if (brdno == 0x0162 || brdno == 0x0172)
97     {
98 	unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
99 
100 	seq_printf (m, "VMEchip2        %spresent\n",
101 			rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
102 	seq_printf (m, "SCSI interface  %spresent\n",
103 			rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
104 	seq_printf (m, "Ethernet i/f    %spresent\n",
105 			rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
106     }
107 }
108 
109 /*
110  * This function is called during kernel startup to initialize
111  * the mvme16x IRQ handling routines.  Should probably ensure
112  * that the base vectors for the VMEChip2 and PCCChip2 are valid.
113  */
114 
mvme16x_init_IRQ(void)115 static void __init mvme16x_init_IRQ (void)
116 {
117 	m68k_setup_user_interrupt(VEC_USER, 192);
118 }
119 
120 #define pcc2chip	((volatile u_char *)0xfff42000)
121 #define PccSCCMICR	0x1d
122 #define PccSCCTICR	0x1e
123 #define PccSCCRICR	0x1f
124 #define PccTPIACKR	0x25
125 
126 #ifdef CONFIG_EARLY_PRINTK
127 
128 /**** cd2401 registers ****/
129 #define CD2401_ADDR	(0xfff45000)
130 
131 #define CyGFRCR         (0x81)
132 #define CyCCR		(0x13)
133 #define      CyCLR_CHAN		(0x40)
134 #define      CyINIT_CHAN	(0x20)
135 #define      CyCHIP_RESET	(0x10)
136 #define      CyENB_XMTR		(0x08)
137 #define      CyDIS_XMTR		(0x04)
138 #define      CyENB_RCVR		(0x02)
139 #define      CyDIS_RCVR		(0x01)
140 #define CyCAR		(0xee)
141 #define CyIER		(0x11)
142 #define      CyMdmCh		(0x80)
143 #define      CyRxExc		(0x20)
144 #define      CyRxData		(0x08)
145 #define      CyTxMpty		(0x02)
146 #define      CyTxRdy		(0x01)
147 #define CyLICR		(0x26)
148 #define CyRISR		(0x89)
149 #define      CyTIMEOUT		(0x80)
150 #define      CySPECHAR		(0x70)
151 #define      CyOVERRUN		(0x08)
152 #define      CyPARITY		(0x04)
153 #define      CyFRAME		(0x02)
154 #define      CyBREAK		(0x01)
155 #define CyREOIR		(0x84)
156 #define CyTEOIR		(0x85)
157 #define CyMEOIR		(0x86)
158 #define      CyNOTRANS		(0x08)
159 #define CyRFOC		(0x30)
160 #define CyRDR		(0xf8)
161 #define CyTDR		(0xf8)
162 #define CyMISR		(0x8b)
163 #define CyRISR		(0x89)
164 #define CyTISR		(0x8a)
165 #define CyMSVR1		(0xde)
166 #define CyMSVR2		(0xdf)
167 #define      CyDSR		(0x80)
168 #define      CyDCD		(0x40)
169 #define      CyCTS		(0x20)
170 #define      CyDTR		(0x02)
171 #define      CyRTS		(0x01)
172 #define CyRTPRL		(0x25)
173 #define CyRTPRH		(0x24)
174 #define CyCOR1		(0x10)
175 #define      CyPARITY_NONE	(0x00)
176 #define      CyPARITY_E		(0x40)
177 #define      CyPARITY_O		(0xC0)
178 #define      Cy_5_BITS		(0x04)
179 #define      Cy_6_BITS		(0x05)
180 #define      Cy_7_BITS		(0x06)
181 #define      Cy_8_BITS		(0x07)
182 #define CyCOR2		(0x17)
183 #define      CyETC		(0x20)
184 #define      CyCtsAE		(0x02)
185 #define CyCOR3		(0x16)
186 #define      Cy_1_STOP		(0x02)
187 #define      Cy_2_STOP		(0x04)
188 #define CyCOR4		(0x15)
189 #define      CyREC_FIFO		(0x0F)  /* Receive FIFO threshold */
190 #define CyCOR5		(0x14)
191 #define CyCOR6		(0x18)
192 #define CyCOR7		(0x07)
193 #define CyRBPR		(0xcb)
194 #define CyRCOR		(0xc8)
195 #define CyTBPR		(0xc3)
196 #define CyTCOR		(0xc0)
197 #define CySCHR1		(0x1f)
198 #define CySCHR2 	(0x1e)
199 #define CyTPR		(0xda)
200 #define CyPILR1		(0xe3)
201 #define CyPILR2		(0xe0)
202 #define CyPILR3		(0xe1)
203 #define CyCMR		(0x1b)
204 #define      CyASYNC		(0x02)
205 #define CyLICR          (0x26)
206 #define CyLIVR          (0x09)
207 #define CySCRL		(0x23)
208 #define CySCRH		(0x22)
209 #define CyTFTC		(0x80)
210 
mvme16x_cons_write(struct console * co,const char * str,unsigned count)211 void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
212 {
213 	volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
214 	volatile u_char sink;
215 	u_char ier;
216 	int port;
217 	u_char do_lf = 0;
218 	int i = 0;
219 
220 	/* Ensure transmitter is enabled! */
221 
222 	port = 0;
223 	base_addr[CyCAR] = (u_char)port;
224 	while (base_addr[CyCCR])
225 		;
226 	base_addr[CyCCR] = CyENB_XMTR;
227 
228 	ier = base_addr[CyIER];
229 	base_addr[CyIER] = CyTxMpty;
230 
231 	while (1) {
232 		if (pcc2chip[PccSCCTICR] & 0x20)
233 		{
234 			/* We have a Tx int. Acknowledge it */
235 			sink = pcc2chip[PccTPIACKR];
236 			if ((base_addr[CyLICR] >> 2) == port) {
237 				if (i == count) {
238 					/* Last char of string is now output */
239 					base_addr[CyTEOIR] = CyNOTRANS;
240 					break;
241 				}
242 				if (do_lf) {
243 					base_addr[CyTDR] = '\n';
244 					str++;
245 					i++;
246 					do_lf = 0;
247 				}
248 				else if (*str == '\n') {
249 					base_addr[CyTDR] = '\r';
250 					do_lf = 1;
251 				}
252 				else {
253 					base_addr[CyTDR] = *str++;
254 					i++;
255 				}
256 				base_addr[CyTEOIR] = 0;
257 			}
258 			else
259 				base_addr[CyTEOIR] = CyNOTRANS;
260 		}
261 	}
262 
263 	base_addr[CyIER] = ier;
264 }
265 
266 #endif
267 
config_mvme16x(void)268 void __init config_mvme16x(void)
269 {
270     p_bdid p = &mvme_bdid;
271     char id[40];
272     uint16_t brdno = be16_to_cpu(p->brdno);
273 
274     mach_max_dma_address = 0xffffffff;
275     mach_sched_init      = mvme16x_sched_init;
276     mach_init_IRQ        = mvme16x_init_IRQ;
277     arch_gettimeoffset   = mvme16x_gettimeoffset;
278     mach_hwclk           = mvme16x_hwclk;
279     mach_set_clock_mmss	 = mvme16x_set_clock_mmss;
280     mach_reset		 = mvme16x_reset;
281     mach_get_model       = mvme16x_get_model;
282     mach_get_hardware_list = mvme16x_get_hardware_list;
283 
284     /* Report board revision */
285 
286     if (strncmp("BDID", p->bdid, 4))
287     {
288 	printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
289 	while (1)
290 		;
291     }
292     /* Board type is only set by newer versions of vmelilo/tftplilo */
293     if (vme_brdtype == 0)
294 	vme_brdtype = brdno;
295 
296     mvme16x_get_model(id);
297     printk ("\nBRD_ID: %s   BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
298 					p->rev&0xf, p->yr, p->mth, p->day);
299     if (brdno == 0x0162 || brdno == 0x172)
300     {
301 	unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
302 
303 	mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
304 
305 	printk ("MVME%x Hardware status:\n", brdno);
306 	printk ("    CPU Type           68%s040\n",
307 			rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
308 	printk ("    CPU clock          %dMHz\n",
309 			rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
310 	printk ("    VMEchip2           %spresent\n",
311 			rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
312 	printk ("    SCSI interface     %spresent\n",
313 			rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
314 	printk ("    Ethernet interface %spresent\n",
315 			rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
316     }
317     else
318     {
319 	mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
320     }
321 }
322 
mvme16x_abort_int(int irq,void * dev_id)323 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
324 {
325 	unsigned long *new = (unsigned long *)vectors;
326 	unsigned long *old = (unsigned long *)0xffe00000;
327 	volatile unsigned char uc, *ucp;
328 	uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
329 
330 	if (brdno == 0x0162 || brdno == 0x172)
331 	{
332 		ucp = (volatile unsigned char *)0xfff42043;
333 		uc = *ucp | 8;
334 		*ucp = uc;
335 	}
336 	else
337 	{
338 		*(volatile unsigned long *)0xfff40074 = 0x40000000;
339 	}
340 	*(new+4) = *(old+4);		/* Illegal instruction */
341 	*(new+9) = *(old+9);		/* Trace */
342 	*(new+47) = *(old+47);		/* Trap #15 */
343 
344 	if (brdno == 0x0162 || brdno == 0x172)
345 		*(new+0x5e) = *(old+0x5e);	/* ABORT switch */
346 	else
347 		*(new+0x6e) = *(old+0x6e);	/* ABORT switch */
348 	return IRQ_HANDLED;
349 }
350 
mvme16x_timer_int(int irq,void * dev_id)351 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
352 {
353 	irq_handler_t timer_routine = dev_id;
354 	unsigned long flags;
355 
356 	local_irq_save(flags);
357 	*(volatile unsigned char *)0xfff4201b |= 8;
358 	timer_routine(0, NULL);
359 	local_irq_restore(flags);
360 
361 	return IRQ_HANDLED;
362 }
363 
mvme16x_sched_init(irq_handler_t timer_routine)364 void mvme16x_sched_init (irq_handler_t timer_routine)
365 {
366     uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
367     int irq;
368 
369     /* Using PCCchip2 or MC2 chip tick timer 1 */
370     *(volatile unsigned long *)0xfff42008 = 0;
371     *(volatile unsigned long *)0xfff42004 = 10000;	/* 10ms */
372     *(volatile unsigned char *)0xfff42017 |= 3;
373     *(volatile unsigned char *)0xfff4201b = 0x16;
374     if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0, "timer",
375                     timer_routine))
376 	panic ("Couldn't register timer int");
377 
378     if (brdno == 0x0162 || brdno == 0x172)
379 	irq = MVME162_IRQ_ABORT;
380     else
381         irq = MVME167_IRQ_ABORT;
382     if (request_irq(irq, mvme16x_abort_int, 0,
383 				"abort", mvme16x_abort_int))
384 	panic ("Couldn't register abort int");
385 }
386 
387 
388 /* This is always executed with interrupts disabled.  */
mvme16x_gettimeoffset(void)389 u32 mvme16x_gettimeoffset(void)
390 {
391     return (*(volatile u32 *)0xfff42008) * 1000;
392 }
393 
bcd2int(unsigned char b)394 int bcd2int (unsigned char b)
395 {
396 	return ((b>>4)*10 + (b&15));
397 }
398 
mvme16x_hwclk(int op,struct rtc_time * t)399 int mvme16x_hwclk(int op, struct rtc_time *t)
400 {
401 #warning check me!
402 	if (!op) {
403 		rtc->ctrl = RTC_READ;
404 		t->tm_year = bcd2int (rtc->bcd_year);
405 		t->tm_mon  = bcd2int (rtc->bcd_mth);
406 		t->tm_mday = bcd2int (rtc->bcd_dom);
407 		t->tm_hour = bcd2int (rtc->bcd_hr);
408 		t->tm_min  = bcd2int (rtc->bcd_min);
409 		t->tm_sec  = bcd2int (rtc->bcd_sec);
410 		rtc->ctrl = 0;
411 	}
412 	return 0;
413 }
414 
mvme16x_set_clock_mmss(unsigned long nowtime)415 int mvme16x_set_clock_mmss (unsigned long nowtime)
416 {
417 	return 0;
418 }
419 
420