1 #ifndef _ASM_X86_CPUFEATURE_H
2 #define _ASM_X86_CPUFEATURE_H
3
4 #include <asm/processor.h>
5
6 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
7
8 #include <asm/asm.h>
9 #include <linux/bitops.h>
10
11 enum cpuid_leafs
12 {
13 CPUID_1_EDX = 0,
14 CPUID_8000_0001_EDX,
15 CPUID_8086_0001_EDX,
16 CPUID_LNX_1,
17 CPUID_1_ECX,
18 CPUID_C000_0001_EDX,
19 CPUID_8000_0001_ECX,
20 CPUID_LNX_2,
21 CPUID_LNX_3,
22 CPUID_7_0_EBX,
23 CPUID_D_1_EAX,
24 CPUID_F_0_EDX,
25 CPUID_F_1_EDX,
26 CPUID_8000_0008_EBX,
27 CPUID_6_EAX,
28 CPUID_8000_000A_EDX,
29 CPUID_7_ECX,
30 CPUID_8000_0007_EBX,
31 CPUID_7_EDX,
32 };
33
34 #ifdef CONFIG_X86_FEATURE_NAMES
35 extern const char * const x86_cap_flags[NCAPINTS*32];
36 extern const char * const x86_power_flags[32];
37 #define X86_CAP_FMT "%s"
38 #define x86_cap_flag(flag) x86_cap_flags[flag]
39 #else
40 #define X86_CAP_FMT "%d:%d"
41 #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
42 #endif
43
44 /*
45 * In order to save room, we index into this array by doing
46 * X86_BUG_<name> - NCAPINTS*32.
47 */
48 extern const char * const x86_bug_flags[NBUGINTS*32];
49
50 #define test_cpu_cap(c, bit) \
51 test_bit(bit, (unsigned long *)((c)->x86_capability))
52
53 /*
54 * There are 32 bits/features in each mask word. The high bits
55 * (selected with (bit>>5) give us the word number and the low 5
56 * bits give us the bit/feature number inside the word.
57 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
58 * see if it is set in the mask word.
59 */
60 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
61 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
62
63 #define REQUIRED_MASK_BIT_SET(feature_bit) \
64 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
65 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
66 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
67 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
68 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
69 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
70 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
71 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
72 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
73 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
83 REQUIRED_MASK_CHECK || \
84 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
85
86 #define DISABLED_MASK_BIT_SET(feature_bit) \
87 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
88 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
94 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
95 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
96 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
97 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
98 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
106 DISABLED_MASK_CHECK || \
107 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
108
109 #define cpu_has(c, bit) \
110 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
111 test_cpu_cap(c, bit))
112
113 #define this_cpu_has(bit) \
114 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
115 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
116
117 /*
118 * This macro is for detection of features which need kernel
119 * infrastructure to be used. It may *not* directly test the CPU
120 * itself. Use the cpu_has() family if you want true runtime
121 * testing of CPU features, like in hypervisor code where you are
122 * supporting a possible guest feature where host support for it
123 * is not relevant.
124 */
125 #define cpu_feature_enabled(bit) \
126 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
127
128 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
129
130 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
131 #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
132 #define setup_clear_cpu_cap(bit) do { \
133 clear_cpu_cap(&boot_cpu_data, bit); \
134 set_bit(bit, (unsigned long *)cpu_caps_cleared); \
135 } while (0)
136 #define setup_force_cpu_cap(bit) do { \
137 set_cpu_cap(&boot_cpu_data, bit); \
138 set_bit(bit, (unsigned long *)cpu_caps_set); \
139 } while (0)
140
141 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
142
143 #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
144 #define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE)
145 #define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
146 #define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
147 #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
148 #define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
149 #define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
150 #define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
151 #define cpu_has_aes boot_cpu_has(X86_FEATURE_AES)
152 #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX)
153 #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
154 #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
155 #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
156 #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
157 #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
158 #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
159 #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
160 #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
161 #define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE)
162 #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
163 /*
164 * Do not add any more of those clumsy macros - use static_cpu_has() for
165 * fast paths and boot_cpu_has() otherwise!
166 */
167
168 #if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
169 /*
170 * Static testing of CPU features. Used the same as boot_cpu_has().
171 * These will statically patch the target code for additional
172 * performance.
173 */
_static_cpu_has(u16 bit)174 static __always_inline __pure bool _static_cpu_has(u16 bit)
175 {
176 asm_volatile_goto("1: jmp 6f\n"
177 "2:\n"
178 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
179 "((5f-4f) - (2b-1b)),0x90\n"
180 "3:\n"
181 ".section .altinstructions,\"a\"\n"
182 " .long 1b - .\n" /* src offset */
183 " .long 4f - .\n" /* repl offset */
184 " .word %P1\n" /* always replace */
185 " .byte 3b - 1b\n" /* src len */
186 " .byte 5f - 4f\n" /* repl len */
187 " .byte 3b - 2b\n" /* pad len */
188 ".previous\n"
189 ".section .altinstr_replacement,\"ax\"\n"
190 "4: jmp %l[t_no]\n"
191 "5:\n"
192 ".previous\n"
193 ".section .altinstructions,\"a\"\n"
194 " .long 1b - .\n" /* src offset */
195 " .long 0\n" /* no replacement */
196 " .word %P0\n" /* feature bit */
197 " .byte 3b - 1b\n" /* src len */
198 " .byte 0\n" /* repl len */
199 " .byte 0\n" /* pad len */
200 ".previous\n"
201 ".section .altinstr_aux,\"ax\"\n"
202 "6:\n"
203 " testb %[bitnum],%[cap_byte]\n"
204 " jnz %l[t_yes]\n"
205 " jmp %l[t_no]\n"
206 ".previous\n"
207 : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
208 [bitnum] "i" (1 << (bit & 7)),
209 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
210 : : t_yes, t_no);
211 t_yes:
212 return true;
213 t_no:
214 return false;
215 }
216
217 #define static_cpu_has(bit) \
218 ( \
219 __builtin_constant_p(boot_cpu_has(bit)) ? \
220 boot_cpu_has(bit) : \
221 _static_cpu_has(bit) \
222 )
223 #else
224 /*
225 * Fall back to dynamic for gcc versions which don't support asm goto. Should be
226 * a minority now anyway.
227 */
228 #define static_cpu_has(bit) boot_cpu_has(bit)
229 #endif
230
231 #define cpu_has_bug(c, bit) cpu_has(c, (bit))
232 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
233 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
234
235 #define static_cpu_has_bug(bit) static_cpu_has((bit))
236 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
237
238 #define MAX_CPU_FEATURES (NCAPINTS * 32)
239 #define cpu_have_feature boot_cpu_has
240
241 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
242 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
243 boot_cpu_data.x86_model
244
245 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
246 #endif /* _ASM_X86_CPUFEATURE_H */
247