1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28 #include "selftest.h"
29 #include "sriov.h"
30
31 #include "mcdi.h"
32 #include "workarounds.h"
33
34 /**************************************************************************
35 *
36 * Type name strings
37 *
38 **************************************************************************
39 */
40
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 };
72
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DATAPATH] = "DATAPATH",
81 [RESET_TYPE_MC_BIST] = "MC_BIST",
82 [RESET_TYPE_DISABLE] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
90 };
91
92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
93 * queued onto this work queue. This is not a per-nic work queue, because
94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
95 */
96 static struct workqueue_struct *reset_workqueue;
97
98 /* How often and how many times to poll for a reset while waiting for a
99 * BIST that another function started to complete.
100 */
101 #define BIST_WAIT_DELAY_MS 100
102 #define BIST_WAIT_DELAY_COUNT 100
103
104 /**************************************************************************
105 *
106 * Configurable values
107 *
108 *************************************************************************/
109
110 /*
111 * Use separate channels for TX and RX events
112 *
113 * Set this to 1 to use separate channels for TX and RX. It allows us
114 * to control interrupt affinity separately for TX and RX.
115 *
116 * This is only used in MSI-X interrupt mode
117 */
118 bool efx_separate_tx_channels;
119 module_param(efx_separate_tx_channels, bool, 0444);
120 MODULE_PARM_DESC(efx_separate_tx_channels,
121 "Use separate channels for TX and RX");
122
123 /* This is the weight assigned to each of the (per-channel) virtual
124 * NAPI devices.
125 */
126 static int napi_weight = 64;
127
128 /* This is the time (in jiffies) between invocations of the hardware
129 * monitor.
130 * On Falcon-based NICs, this will:
131 * - Check the on-board hardware monitor;
132 * - Poll the link state and reconfigure the hardware as necessary.
133 * On Siena-based NICs for power systems with EEH support, this will give EEH a
134 * chance to start.
135 */
136 static unsigned int efx_monitor_interval = 1 * HZ;
137
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
140 *
141 * The default for RX should strike a balance between increasing the
142 * round-trip latency and reducing overhead.
143 */
144 static unsigned int rx_irq_mod_usec = 60;
145
146 /* Initial interrupt moderation settings. They can be modified after
147 * module load with ethtool.
148 *
149 * This default is chosen to ensure that a 10G link does not go idle
150 * while a TX queue is stopped after it has become full. A queue is
151 * restarted when it drops below half full. The time this takes (assuming
152 * worst case 3 descriptors per packet and 1024 descriptors) is
153 * 512 / 3 * 1.2 = 205 usec.
154 */
155 static unsigned int tx_irq_mod_usec = 150;
156
157 /* This is the first interrupt mode to try out of:
158 * 0 => MSI-X
159 * 1 => MSI
160 * 2 => legacy
161 */
162 static unsigned int interrupt_mode;
163
164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
165 * i.e. the number of CPUs among which we may distribute simultaneous
166 * interrupt handling.
167 *
168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
169 * The default (0) means to assign an interrupt to each core.
170 */
171 static unsigned int rss_cpus;
172 module_param(rss_cpus, uint, 0444);
173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
174
175 static bool phy_flash_cfg;
176 module_param(phy_flash_cfg, bool, 0644);
177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
178
179 static unsigned irq_adapt_low_thresh = 8000;
180 module_param(irq_adapt_low_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_low_thresh,
182 "Threshold score for reducing IRQ moderation");
183
184 static unsigned irq_adapt_high_thresh = 16000;
185 module_param(irq_adapt_high_thresh, uint, 0644);
186 MODULE_PARM_DESC(irq_adapt_high_thresh,
187 "Threshold score for increasing IRQ moderation");
188
189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
192 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
193 module_param(debug, uint, 0);
194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
195
196 /**************************************************************************
197 *
198 * Utility functions and prototypes
199 *
200 *************************************************************************/
201
202 static int efx_soft_enable_interrupts(struct efx_nic *efx);
203 static void efx_soft_disable_interrupts(struct efx_nic *efx);
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_channels(struct efx_nic *efx);
206 static const struct efx_channel_type efx_default_channel_type;
207 static void efx_remove_port(struct efx_nic *efx);
208 static void efx_init_napi_channel(struct efx_channel *channel);
209 static void efx_fini_napi(struct efx_nic *efx);
210 static void efx_fini_napi_channel(struct efx_channel *channel);
211 static void efx_fini_struct(struct efx_nic *efx);
212 static void efx_start_all(struct efx_nic *efx);
213 static void efx_stop_all(struct efx_nic *efx);
214
215 #define EFX_ASSERT_RESET_SERIALISED(efx) \
216 do { \
217 if ((efx->state == STATE_READY) || \
218 (efx->state == STATE_RECOVERY) || \
219 (efx->state == STATE_DISABLED)) \
220 ASSERT_RTNL(); \
221 } while (0)
222
efx_check_disabled(struct efx_nic * efx)223 static int efx_check_disabled(struct efx_nic *efx)
224 {
225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
226 netif_err(efx, drv, efx->net_dev,
227 "device is disabled due to earlier errors\n");
228 return -EIO;
229 }
230 return 0;
231 }
232
233 /**************************************************************************
234 *
235 * Event queue processing
236 *
237 *************************************************************************/
238
239 /* Process channel's event queue
240 *
241 * This function is responsible for processing the event queue of a
242 * single channel. The caller must guarantee that this function will
243 * never be concurrently called more than once on the same channel,
244 * though different channels may be being processed concurrently.
245 */
efx_process_channel(struct efx_channel * channel,int budget)246 static int efx_process_channel(struct efx_channel *channel, int budget)
247 {
248 struct efx_tx_queue *tx_queue;
249 int spent;
250
251 if (unlikely(!channel->enabled))
252 return 0;
253
254 efx_for_each_channel_tx_queue(tx_queue, channel) {
255 tx_queue->pkts_compl = 0;
256 tx_queue->bytes_compl = 0;
257 }
258
259 spent = efx_nic_process_eventq(channel, budget);
260 if (spent && efx_channel_has_rx_queue(channel)) {
261 struct efx_rx_queue *rx_queue =
262 efx_channel_get_rx_queue(channel);
263
264 efx_rx_flush_packet(channel);
265 efx_fast_push_rx_descriptors(rx_queue, true);
266 }
267
268 /* Update BQL */
269 efx_for_each_channel_tx_queue(tx_queue, channel) {
270 if (tx_queue->bytes_compl) {
271 netdev_tx_completed_queue(tx_queue->core_txq,
272 tx_queue->pkts_compl, tx_queue->bytes_compl);
273 }
274 }
275
276 return spent;
277 }
278
279 /* NAPI poll handler
280 *
281 * NAPI guarantees serialisation of polls of the same device, which
282 * provides the guarantee required by efx_process_channel().
283 */
efx_poll(struct napi_struct * napi,int budget)284 static int efx_poll(struct napi_struct *napi, int budget)
285 {
286 struct efx_channel *channel =
287 container_of(napi, struct efx_channel, napi_str);
288 struct efx_nic *efx = channel->efx;
289 int spent;
290
291 if (!efx_channel_lock_napi(channel))
292 return budget;
293
294 netif_vdbg(efx, intr, efx->net_dev,
295 "channel %d NAPI poll executing on CPU %d\n",
296 channel->channel, raw_smp_processor_id());
297
298 spent = efx_process_channel(channel, budget);
299
300 if (spent < budget) {
301 if (efx_channel_has_rx_queue(channel) &&
302 efx->irq_rx_adaptive &&
303 unlikely(++channel->irq_count == 1000)) {
304 if (unlikely(channel->irq_mod_score <
305 irq_adapt_low_thresh)) {
306 if (channel->irq_moderation > 1) {
307 channel->irq_moderation -= 1;
308 efx->type->push_irq_moderation(channel);
309 }
310 } else if (unlikely(channel->irq_mod_score >
311 irq_adapt_high_thresh)) {
312 if (channel->irq_moderation <
313 efx->irq_rx_moderation) {
314 channel->irq_moderation += 1;
315 efx->type->push_irq_moderation(channel);
316 }
317 }
318 channel->irq_count = 0;
319 channel->irq_mod_score = 0;
320 }
321
322 efx_filter_rfs_expire(channel);
323
324 /* There is no race here; although napi_disable() will
325 * only wait for napi_complete(), this isn't a problem
326 * since efx_nic_eventq_read_ack() will have no effect if
327 * interrupts have already been disabled.
328 */
329 napi_complete(napi);
330 efx_nic_eventq_read_ack(channel);
331 }
332
333 efx_channel_unlock_napi(channel);
334 return spent;
335 }
336
337 /* Create event queue
338 * Event queue memory allocations are done only once. If the channel
339 * is reset, the memory buffer will be reused; this guards against
340 * errors during channel reset and also simplifies interrupt handling.
341 */
efx_probe_eventq(struct efx_channel * channel)342 static int efx_probe_eventq(struct efx_channel *channel)
343 {
344 struct efx_nic *efx = channel->efx;
345 unsigned long entries;
346
347 netif_dbg(efx, probe, efx->net_dev,
348 "chan %d create event queue\n", channel->channel);
349
350 /* Build an event queue with room for one event per tx and rx buffer,
351 * plus some extra for link state events and MCDI completions. */
352 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
353 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
354 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
355
356 return efx_nic_probe_eventq(channel);
357 }
358
359 /* Prepare channel's event queue */
efx_init_eventq(struct efx_channel * channel)360 static int efx_init_eventq(struct efx_channel *channel)
361 {
362 struct efx_nic *efx = channel->efx;
363 int rc;
364
365 EFX_WARN_ON_PARANOID(channel->eventq_init);
366
367 netif_dbg(efx, drv, efx->net_dev,
368 "chan %d init event queue\n", channel->channel);
369
370 rc = efx_nic_init_eventq(channel);
371 if (rc == 0) {
372 efx->type->push_irq_moderation(channel);
373 channel->eventq_read_ptr = 0;
374 channel->eventq_init = true;
375 }
376 return rc;
377 }
378
379 /* Enable event queue processing and NAPI */
efx_start_eventq(struct efx_channel * channel)380 void efx_start_eventq(struct efx_channel *channel)
381 {
382 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
383 "chan %d start event queue\n", channel->channel);
384
385 /* Make sure the NAPI handler sees the enabled flag set */
386 channel->enabled = true;
387 smp_wmb();
388
389 efx_channel_enable(channel);
390 napi_enable(&channel->napi_str);
391 efx_nic_eventq_read_ack(channel);
392 }
393
394 /* Disable event queue processing and NAPI */
efx_stop_eventq(struct efx_channel * channel)395 void efx_stop_eventq(struct efx_channel *channel)
396 {
397 if (!channel->enabled)
398 return;
399
400 napi_disable(&channel->napi_str);
401 while (!efx_channel_disable(channel))
402 usleep_range(1000, 20000);
403 channel->enabled = false;
404 }
405
efx_fini_eventq(struct efx_channel * channel)406 static void efx_fini_eventq(struct efx_channel *channel)
407 {
408 if (!channel->eventq_init)
409 return;
410
411 netif_dbg(channel->efx, drv, channel->efx->net_dev,
412 "chan %d fini event queue\n", channel->channel);
413
414 efx_nic_fini_eventq(channel);
415 channel->eventq_init = false;
416 }
417
efx_remove_eventq(struct efx_channel * channel)418 static void efx_remove_eventq(struct efx_channel *channel)
419 {
420 netif_dbg(channel->efx, drv, channel->efx->net_dev,
421 "chan %d remove event queue\n", channel->channel);
422
423 efx_nic_remove_eventq(channel);
424 }
425
426 /**************************************************************************
427 *
428 * Channel handling
429 *
430 *************************************************************************/
431
432 /* Allocate and initialise a channel structure. */
433 static struct efx_channel *
efx_alloc_channel(struct efx_nic * efx,int i,struct efx_channel * old_channel)434 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
435 {
436 struct efx_channel *channel;
437 struct efx_rx_queue *rx_queue;
438 struct efx_tx_queue *tx_queue;
439 int j;
440
441 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
442 if (!channel)
443 return NULL;
444
445 channel->efx = efx;
446 channel->channel = i;
447 channel->type = &efx_default_channel_type;
448
449 for (j = 0; j < EFX_TXQ_TYPES; j++) {
450 tx_queue = &channel->tx_queue[j];
451 tx_queue->efx = efx;
452 tx_queue->queue = i * EFX_TXQ_TYPES + j;
453 tx_queue->channel = channel;
454 }
455
456 rx_queue = &channel->rx_queue;
457 rx_queue->efx = efx;
458 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
459 (unsigned long)rx_queue);
460
461 return channel;
462 }
463
464 /* Allocate and initialise a channel structure, copying parameters
465 * (but not resources) from an old channel structure.
466 */
467 static struct efx_channel *
efx_copy_channel(const struct efx_channel * old_channel)468 efx_copy_channel(const struct efx_channel *old_channel)
469 {
470 struct efx_channel *channel;
471 struct efx_rx_queue *rx_queue;
472 struct efx_tx_queue *tx_queue;
473 int j;
474
475 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
476 if (!channel)
477 return NULL;
478
479 *channel = *old_channel;
480
481 channel->napi_dev = NULL;
482 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
483 channel->napi_str.napi_id = 0;
484 channel->napi_str.state = 0;
485 memset(&channel->eventq, 0, sizeof(channel->eventq));
486
487 for (j = 0; j < EFX_TXQ_TYPES; j++) {
488 tx_queue = &channel->tx_queue[j];
489 if (tx_queue->channel)
490 tx_queue->channel = channel;
491 tx_queue->buffer = NULL;
492 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
493 }
494
495 rx_queue = &channel->rx_queue;
496 rx_queue->buffer = NULL;
497 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
498 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
499 (unsigned long)rx_queue);
500
501 return channel;
502 }
503
efx_probe_channel(struct efx_channel * channel)504 static int efx_probe_channel(struct efx_channel *channel)
505 {
506 struct efx_tx_queue *tx_queue;
507 struct efx_rx_queue *rx_queue;
508 int rc;
509
510 netif_dbg(channel->efx, probe, channel->efx->net_dev,
511 "creating channel %d\n", channel->channel);
512
513 rc = channel->type->pre_probe(channel);
514 if (rc)
515 goto fail;
516
517 rc = efx_probe_eventq(channel);
518 if (rc)
519 goto fail;
520
521 efx_for_each_channel_tx_queue(tx_queue, channel) {
522 rc = efx_probe_tx_queue(tx_queue);
523 if (rc)
524 goto fail;
525 }
526
527 efx_for_each_channel_rx_queue(rx_queue, channel) {
528 rc = efx_probe_rx_queue(rx_queue);
529 if (rc)
530 goto fail;
531 }
532
533 return 0;
534
535 fail:
536 efx_remove_channel(channel);
537 return rc;
538 }
539
540 static void
efx_get_channel_name(struct efx_channel * channel,char * buf,size_t len)541 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
542 {
543 struct efx_nic *efx = channel->efx;
544 const char *type;
545 int number;
546
547 number = channel->channel;
548 if (efx->tx_channel_offset == 0) {
549 type = "";
550 } else if (channel->channel < efx->tx_channel_offset) {
551 type = "-rx";
552 } else {
553 type = "-tx";
554 number -= efx->tx_channel_offset;
555 }
556 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
557 }
558
efx_set_channel_names(struct efx_nic * efx)559 static void efx_set_channel_names(struct efx_nic *efx)
560 {
561 struct efx_channel *channel;
562
563 efx_for_each_channel(channel, efx)
564 channel->type->get_name(channel,
565 efx->msi_context[channel->channel].name,
566 sizeof(efx->msi_context[0].name));
567 }
568
efx_probe_channels(struct efx_nic * efx)569 static int efx_probe_channels(struct efx_nic *efx)
570 {
571 struct efx_channel *channel;
572 int rc;
573
574 /* Restart special buffer allocation */
575 efx->next_buffer_table = 0;
576
577 /* Probe channels in reverse, so that any 'extra' channels
578 * use the start of the buffer table. This allows the traffic
579 * channels to be resized without moving them or wasting the
580 * entries before them.
581 */
582 efx_for_each_channel_rev(channel, efx) {
583 rc = efx_probe_channel(channel);
584 if (rc) {
585 netif_err(efx, probe, efx->net_dev,
586 "failed to create channel %d\n",
587 channel->channel);
588 goto fail;
589 }
590 }
591 efx_set_channel_names(efx);
592
593 return 0;
594
595 fail:
596 efx_remove_channels(efx);
597 return rc;
598 }
599
600 /* Channels are shutdown and reinitialised whilst the NIC is running
601 * to propagate configuration changes (mtu, checksum offload), or
602 * to clear hardware error conditions
603 */
efx_start_datapath(struct efx_nic * efx)604 static void efx_start_datapath(struct efx_nic *efx)
605 {
606 bool old_rx_scatter = efx->rx_scatter;
607 struct efx_tx_queue *tx_queue;
608 struct efx_rx_queue *rx_queue;
609 struct efx_channel *channel;
610 size_t rx_buf_len;
611
612 /* Calculate the rx buffer allocation parameters required to
613 * support the current MTU, including padding for header
614 * alignment and overruns.
615 */
616 efx->rx_dma_len = (efx->rx_prefix_size +
617 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
618 efx->type->rx_buffer_padding);
619 rx_buf_len = (sizeof(struct efx_rx_page_state) +
620 efx->rx_ip_align + efx->rx_dma_len);
621 if (rx_buf_len <= PAGE_SIZE) {
622 efx->rx_scatter = efx->type->always_rx_scatter;
623 efx->rx_buffer_order = 0;
624 } else if (efx->type->can_rx_scatter) {
625 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
626 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
627 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
628 EFX_RX_BUF_ALIGNMENT) >
629 PAGE_SIZE);
630 efx->rx_scatter = true;
631 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
632 efx->rx_buffer_order = 0;
633 } else {
634 efx->rx_scatter = false;
635 efx->rx_buffer_order = get_order(rx_buf_len);
636 }
637
638 efx_rx_config_page_split(efx);
639 if (efx->rx_buffer_order)
640 netif_dbg(efx, drv, efx->net_dev,
641 "RX buf len=%u; page order=%u batch=%u\n",
642 efx->rx_dma_len, efx->rx_buffer_order,
643 efx->rx_pages_per_batch);
644 else
645 netif_dbg(efx, drv, efx->net_dev,
646 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
647 efx->rx_dma_len, efx->rx_page_buf_step,
648 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
649
650 /* RX filters may also have scatter-enabled flags */
651 if (efx->rx_scatter != old_rx_scatter)
652 efx->type->filter_update_rx_scatter(efx);
653
654 /* We must keep at least one descriptor in a TX ring empty.
655 * We could avoid this when the queue size does not exactly
656 * match the hardware ring size, but it's not that important.
657 * Therefore we stop the queue when one more skb might fill
658 * the ring completely. We wake it when half way back to
659 * empty.
660 */
661 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
662 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
663
664 /* Initialise the channels */
665 efx_for_each_channel(channel, efx) {
666 efx_for_each_channel_tx_queue(tx_queue, channel) {
667 efx_init_tx_queue(tx_queue);
668 atomic_inc(&efx->active_queues);
669 }
670
671 efx_for_each_channel_rx_queue(rx_queue, channel) {
672 efx_init_rx_queue(rx_queue);
673 atomic_inc(&efx->active_queues);
674 efx_stop_eventq(channel);
675 efx_fast_push_rx_descriptors(rx_queue, false);
676 efx_start_eventq(channel);
677 }
678
679 WARN_ON(channel->rx_pkt_n_frags);
680 }
681
682 efx_ptp_start_datapath(efx);
683
684 if (netif_device_present(efx->net_dev))
685 netif_tx_wake_all_queues(efx->net_dev);
686 }
687
efx_stop_datapath(struct efx_nic * efx)688 static void efx_stop_datapath(struct efx_nic *efx)
689 {
690 struct efx_channel *channel;
691 struct efx_tx_queue *tx_queue;
692 struct efx_rx_queue *rx_queue;
693 int rc;
694
695 EFX_ASSERT_RESET_SERIALISED(efx);
696 BUG_ON(efx->port_enabled);
697
698 efx_ptp_stop_datapath(efx);
699
700 /* Stop RX refill */
701 efx_for_each_channel(channel, efx) {
702 efx_for_each_channel_rx_queue(rx_queue, channel)
703 rx_queue->refill_enabled = false;
704 }
705
706 efx_for_each_channel(channel, efx) {
707 /* RX packet processing is pipelined, so wait for the
708 * NAPI handler to complete. At least event queue 0
709 * might be kept active by non-data events, so don't
710 * use napi_synchronize() but actually disable NAPI
711 * temporarily.
712 */
713 if (efx_channel_has_rx_queue(channel)) {
714 efx_stop_eventq(channel);
715 efx_start_eventq(channel);
716 }
717 }
718
719 rc = efx->type->fini_dmaq(efx);
720 if (rc && EFX_WORKAROUND_7803(efx)) {
721 /* Schedule a reset to recover from the flush failure. The
722 * descriptor caches reference memory we're about to free,
723 * but falcon_reconfigure_mac_wrapper() won't reconnect
724 * the MACs because of the pending reset.
725 */
726 netif_err(efx, drv, efx->net_dev,
727 "Resetting to recover from flush failure\n");
728 efx_schedule_reset(efx, RESET_TYPE_ALL);
729 } else if (rc) {
730 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
731 } else {
732 netif_dbg(efx, drv, efx->net_dev,
733 "successfully flushed all queues\n");
734 }
735
736 efx_for_each_channel(channel, efx) {
737 efx_for_each_channel_rx_queue(rx_queue, channel)
738 efx_fini_rx_queue(rx_queue);
739 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
740 efx_fini_tx_queue(tx_queue);
741 }
742 }
743
efx_remove_channel(struct efx_channel * channel)744 static void efx_remove_channel(struct efx_channel *channel)
745 {
746 struct efx_tx_queue *tx_queue;
747 struct efx_rx_queue *rx_queue;
748
749 netif_dbg(channel->efx, drv, channel->efx->net_dev,
750 "destroy chan %d\n", channel->channel);
751
752 efx_for_each_channel_rx_queue(rx_queue, channel)
753 efx_remove_rx_queue(rx_queue);
754 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
755 efx_remove_tx_queue(tx_queue);
756 efx_remove_eventq(channel);
757 channel->type->post_remove(channel);
758 }
759
efx_remove_channels(struct efx_nic * efx)760 static void efx_remove_channels(struct efx_nic *efx)
761 {
762 struct efx_channel *channel;
763
764 efx_for_each_channel(channel, efx)
765 efx_remove_channel(channel);
766 }
767
768 int
efx_realloc_channels(struct efx_nic * efx,u32 rxq_entries,u32 txq_entries)769 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
770 {
771 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
772 u32 old_rxq_entries, old_txq_entries;
773 unsigned i, next_buffer_table = 0;
774 int rc, rc2;
775
776 rc = efx_check_disabled(efx);
777 if (rc)
778 return rc;
779
780 /* Not all channels should be reallocated. We must avoid
781 * reallocating their buffer table entries.
782 */
783 efx_for_each_channel(channel, efx) {
784 struct efx_rx_queue *rx_queue;
785 struct efx_tx_queue *tx_queue;
786
787 if (channel->type->copy)
788 continue;
789 next_buffer_table = max(next_buffer_table,
790 channel->eventq.index +
791 channel->eventq.entries);
792 efx_for_each_channel_rx_queue(rx_queue, channel)
793 next_buffer_table = max(next_buffer_table,
794 rx_queue->rxd.index +
795 rx_queue->rxd.entries);
796 efx_for_each_channel_tx_queue(tx_queue, channel)
797 next_buffer_table = max(next_buffer_table,
798 tx_queue->txd.index +
799 tx_queue->txd.entries);
800 }
801
802 efx_device_detach_sync(efx);
803 efx_stop_all(efx);
804 efx_soft_disable_interrupts(efx);
805
806 /* Clone channels (where possible) */
807 memset(other_channel, 0, sizeof(other_channel));
808 for (i = 0; i < efx->n_channels; i++) {
809 channel = efx->channel[i];
810 if (channel->type->copy)
811 channel = channel->type->copy(channel);
812 if (!channel) {
813 rc = -ENOMEM;
814 goto out;
815 }
816 other_channel[i] = channel;
817 }
818
819 /* Swap entry counts and channel pointers */
820 old_rxq_entries = efx->rxq_entries;
821 old_txq_entries = efx->txq_entries;
822 efx->rxq_entries = rxq_entries;
823 efx->txq_entries = txq_entries;
824 for (i = 0; i < efx->n_channels; i++) {
825 channel = efx->channel[i];
826 efx->channel[i] = other_channel[i];
827 other_channel[i] = channel;
828 }
829
830 /* Restart buffer table allocation */
831 efx->next_buffer_table = next_buffer_table;
832
833 for (i = 0; i < efx->n_channels; i++) {
834 channel = efx->channel[i];
835 if (!channel->type->copy)
836 continue;
837 rc = efx_probe_channel(channel);
838 if (rc)
839 goto rollback;
840 efx_init_napi_channel(efx->channel[i]);
841 }
842
843 out:
844 /* Destroy unused channel structures */
845 for (i = 0; i < efx->n_channels; i++) {
846 channel = other_channel[i];
847 if (channel && channel->type->copy) {
848 efx_fini_napi_channel(channel);
849 efx_remove_channel(channel);
850 kfree(channel);
851 }
852 }
853
854 rc2 = efx_soft_enable_interrupts(efx);
855 if (rc2) {
856 rc = rc ? rc : rc2;
857 netif_err(efx, drv, efx->net_dev,
858 "unable to restart interrupts on channel reallocation\n");
859 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
860 } else {
861 efx_start_all(efx);
862 netif_device_attach(efx->net_dev);
863 }
864 return rc;
865
866 rollback:
867 /* Swap back */
868 efx->rxq_entries = old_rxq_entries;
869 efx->txq_entries = old_txq_entries;
870 for (i = 0; i < efx->n_channels; i++) {
871 channel = efx->channel[i];
872 efx->channel[i] = other_channel[i];
873 other_channel[i] = channel;
874 }
875 goto out;
876 }
877
efx_schedule_slow_fill(struct efx_rx_queue * rx_queue)878 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
879 {
880 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
881 }
882
883 static const struct efx_channel_type efx_default_channel_type = {
884 .pre_probe = efx_channel_dummy_op_int,
885 .post_remove = efx_channel_dummy_op_void,
886 .get_name = efx_get_channel_name,
887 .copy = efx_copy_channel,
888 .keep_eventq = false,
889 };
890
efx_channel_dummy_op_int(struct efx_channel * channel)891 int efx_channel_dummy_op_int(struct efx_channel *channel)
892 {
893 return 0;
894 }
895
efx_channel_dummy_op_void(struct efx_channel * channel)896 void efx_channel_dummy_op_void(struct efx_channel *channel)
897 {
898 }
899
900 /**************************************************************************
901 *
902 * Port handling
903 *
904 **************************************************************************/
905
906 /* This ensures that the kernel is kept informed (via
907 * netif_carrier_on/off) of the link status, and also maintains the
908 * link status's stop on the port's TX queue.
909 */
efx_link_status_changed(struct efx_nic * efx)910 void efx_link_status_changed(struct efx_nic *efx)
911 {
912 struct efx_link_state *link_state = &efx->link_state;
913
914 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
915 * that no events are triggered between unregister_netdev() and the
916 * driver unloading. A more general condition is that NETDEV_CHANGE
917 * can only be generated between NETDEV_UP and NETDEV_DOWN */
918 if (!netif_running(efx->net_dev))
919 return;
920
921 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
922 efx->n_link_state_changes++;
923
924 if (link_state->up)
925 netif_carrier_on(efx->net_dev);
926 else
927 netif_carrier_off(efx->net_dev);
928 }
929
930 /* Status message for kernel log */
931 if (link_state->up)
932 netif_info(efx, link, efx->net_dev,
933 "link up at %uMbps %s-duplex (MTU %d)\n",
934 link_state->speed, link_state->fd ? "full" : "half",
935 efx->net_dev->mtu);
936 else
937 netif_info(efx, link, efx->net_dev, "link down\n");
938 }
939
efx_link_set_advertising(struct efx_nic * efx,u32 advertising)940 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
941 {
942 efx->link_advertising = advertising;
943 if (advertising) {
944 if (advertising & ADVERTISED_Pause)
945 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
946 else
947 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
948 if (advertising & ADVERTISED_Asym_Pause)
949 efx->wanted_fc ^= EFX_FC_TX;
950 }
951 }
952
efx_link_set_wanted_fc(struct efx_nic * efx,u8 wanted_fc)953 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
954 {
955 efx->wanted_fc = wanted_fc;
956 if (efx->link_advertising) {
957 if (wanted_fc & EFX_FC_RX)
958 efx->link_advertising |= (ADVERTISED_Pause |
959 ADVERTISED_Asym_Pause);
960 else
961 efx->link_advertising &= ~(ADVERTISED_Pause |
962 ADVERTISED_Asym_Pause);
963 if (wanted_fc & EFX_FC_TX)
964 efx->link_advertising ^= ADVERTISED_Asym_Pause;
965 }
966 }
967
968 static void efx_fini_port(struct efx_nic *efx);
969
970 /* We assume that efx->type->reconfigure_mac will always try to sync RX
971 * filters and therefore needs to read-lock the filter table against freeing
972 */
efx_mac_reconfigure(struct efx_nic * efx)973 void efx_mac_reconfigure(struct efx_nic *efx)
974 {
975 down_read(&efx->filter_sem);
976 efx->type->reconfigure_mac(efx);
977 up_read(&efx->filter_sem);
978 }
979
980 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
981 * the MAC appropriately. All other PHY configuration changes are pushed
982 * through phy_op->set_settings(), and pushed asynchronously to the MAC
983 * through efx_monitor().
984 *
985 * Callers must hold the mac_lock
986 */
__efx_reconfigure_port(struct efx_nic * efx)987 int __efx_reconfigure_port(struct efx_nic *efx)
988 {
989 enum efx_phy_mode phy_mode;
990 int rc;
991
992 WARN_ON(!mutex_is_locked(&efx->mac_lock));
993
994 /* Disable PHY transmit in mac level loopbacks */
995 phy_mode = efx->phy_mode;
996 if (LOOPBACK_INTERNAL(efx))
997 efx->phy_mode |= PHY_MODE_TX_DISABLED;
998 else
999 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1000
1001 rc = efx->type->reconfigure_port(efx);
1002
1003 if (rc)
1004 efx->phy_mode = phy_mode;
1005
1006 return rc;
1007 }
1008
1009 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1010 * disabled. */
efx_reconfigure_port(struct efx_nic * efx)1011 int efx_reconfigure_port(struct efx_nic *efx)
1012 {
1013 int rc;
1014
1015 EFX_ASSERT_RESET_SERIALISED(efx);
1016
1017 mutex_lock(&efx->mac_lock);
1018 rc = __efx_reconfigure_port(efx);
1019 mutex_unlock(&efx->mac_lock);
1020
1021 return rc;
1022 }
1023
1024 /* Asynchronous work item for changing MAC promiscuity and multicast
1025 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1026 * MAC directly. */
efx_mac_work(struct work_struct * data)1027 static void efx_mac_work(struct work_struct *data)
1028 {
1029 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1030
1031 mutex_lock(&efx->mac_lock);
1032 if (efx->port_enabled)
1033 efx_mac_reconfigure(efx);
1034 mutex_unlock(&efx->mac_lock);
1035 }
1036
efx_probe_port(struct efx_nic * efx)1037 static int efx_probe_port(struct efx_nic *efx)
1038 {
1039 int rc;
1040
1041 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1042
1043 if (phy_flash_cfg)
1044 efx->phy_mode = PHY_MODE_SPECIAL;
1045
1046 /* Connect up MAC/PHY operations table */
1047 rc = efx->type->probe_port(efx);
1048 if (rc)
1049 return rc;
1050
1051 /* Initialise MAC address to permanent address */
1052 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1053
1054 return 0;
1055 }
1056
efx_init_port(struct efx_nic * efx)1057 static int efx_init_port(struct efx_nic *efx)
1058 {
1059 int rc;
1060
1061 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1062
1063 mutex_lock(&efx->mac_lock);
1064
1065 rc = efx->phy_op->init(efx);
1066 if (rc)
1067 goto fail1;
1068
1069 efx->port_initialized = true;
1070
1071 /* Reconfigure the MAC before creating dma queues (required for
1072 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1073 efx_mac_reconfigure(efx);
1074
1075 /* Ensure the PHY advertises the correct flow control settings */
1076 rc = efx->phy_op->reconfigure(efx);
1077 if (rc && rc != -EPERM)
1078 goto fail2;
1079
1080 mutex_unlock(&efx->mac_lock);
1081 return 0;
1082
1083 fail2:
1084 efx->phy_op->fini(efx);
1085 fail1:
1086 mutex_unlock(&efx->mac_lock);
1087 return rc;
1088 }
1089
efx_start_port(struct efx_nic * efx)1090 static void efx_start_port(struct efx_nic *efx)
1091 {
1092 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1093 BUG_ON(efx->port_enabled);
1094
1095 mutex_lock(&efx->mac_lock);
1096 efx->port_enabled = true;
1097
1098 /* Ensure MAC ingress/egress is enabled */
1099 efx_mac_reconfigure(efx);
1100
1101 mutex_unlock(&efx->mac_lock);
1102 }
1103
1104 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1105 * and the async self-test, wait for them to finish and prevent them
1106 * being scheduled again. This doesn't cover online resets, which
1107 * should only be cancelled when removing the device.
1108 */
efx_stop_port(struct efx_nic * efx)1109 static void efx_stop_port(struct efx_nic *efx)
1110 {
1111 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1112
1113 EFX_ASSERT_RESET_SERIALISED(efx);
1114
1115 mutex_lock(&efx->mac_lock);
1116 efx->port_enabled = false;
1117 mutex_unlock(&efx->mac_lock);
1118
1119 /* Serialise against efx_set_multicast_list() */
1120 netif_addr_lock_bh(efx->net_dev);
1121 netif_addr_unlock_bh(efx->net_dev);
1122
1123 cancel_delayed_work_sync(&efx->monitor_work);
1124 efx_selftest_async_cancel(efx);
1125 cancel_work_sync(&efx->mac_work);
1126 }
1127
efx_fini_port(struct efx_nic * efx)1128 static void efx_fini_port(struct efx_nic *efx)
1129 {
1130 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1131
1132 if (!efx->port_initialized)
1133 return;
1134
1135 efx->phy_op->fini(efx);
1136 efx->port_initialized = false;
1137
1138 efx->link_state.up = false;
1139 efx_link_status_changed(efx);
1140 }
1141
efx_remove_port(struct efx_nic * efx)1142 static void efx_remove_port(struct efx_nic *efx)
1143 {
1144 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1145
1146 efx->type->remove_port(efx);
1147 }
1148
1149 /**************************************************************************
1150 *
1151 * NIC handling
1152 *
1153 **************************************************************************/
1154
1155 static LIST_HEAD(efx_primary_list);
1156 static LIST_HEAD(efx_unassociated_list);
1157
efx_same_controller(struct efx_nic * left,struct efx_nic * right)1158 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1159 {
1160 return left->type == right->type &&
1161 left->vpd_sn && right->vpd_sn &&
1162 !strcmp(left->vpd_sn, right->vpd_sn);
1163 }
1164
efx_associate(struct efx_nic * efx)1165 static void efx_associate(struct efx_nic *efx)
1166 {
1167 struct efx_nic *other, *next;
1168
1169 if (efx->primary == efx) {
1170 /* Adding primary function; look for secondaries */
1171
1172 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1173 list_add_tail(&efx->node, &efx_primary_list);
1174
1175 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1176 node) {
1177 if (efx_same_controller(efx, other)) {
1178 list_del(&other->node);
1179 netif_dbg(other, probe, other->net_dev,
1180 "moving to secondary list of %s %s\n",
1181 pci_name(efx->pci_dev),
1182 efx->net_dev->name);
1183 list_add_tail(&other->node,
1184 &efx->secondary_list);
1185 other->primary = efx;
1186 }
1187 }
1188 } else {
1189 /* Adding secondary function; look for primary */
1190
1191 list_for_each_entry(other, &efx_primary_list, node) {
1192 if (efx_same_controller(efx, other)) {
1193 netif_dbg(efx, probe, efx->net_dev,
1194 "adding to secondary list of %s %s\n",
1195 pci_name(other->pci_dev),
1196 other->net_dev->name);
1197 list_add_tail(&efx->node,
1198 &other->secondary_list);
1199 efx->primary = other;
1200 return;
1201 }
1202 }
1203
1204 netif_dbg(efx, probe, efx->net_dev,
1205 "adding to unassociated list\n");
1206 list_add_tail(&efx->node, &efx_unassociated_list);
1207 }
1208 }
1209
efx_dissociate(struct efx_nic * efx)1210 static void efx_dissociate(struct efx_nic *efx)
1211 {
1212 struct efx_nic *other, *next;
1213
1214 list_del(&efx->node);
1215 efx->primary = NULL;
1216
1217 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1218 list_del(&other->node);
1219 netif_dbg(other, probe, other->net_dev,
1220 "moving to unassociated list\n");
1221 list_add_tail(&other->node, &efx_unassociated_list);
1222 other->primary = NULL;
1223 }
1224 }
1225
1226 /* This configures the PCI device to enable I/O and DMA. */
efx_init_io(struct efx_nic * efx)1227 static int efx_init_io(struct efx_nic *efx)
1228 {
1229 struct pci_dev *pci_dev = efx->pci_dev;
1230 dma_addr_t dma_mask = efx->type->max_dma_mask;
1231 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1232 int rc, bar;
1233
1234 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1235
1236 bar = efx->type->mem_bar;
1237
1238 rc = pci_enable_device(pci_dev);
1239 if (rc) {
1240 netif_err(efx, probe, efx->net_dev,
1241 "failed to enable PCI device\n");
1242 goto fail1;
1243 }
1244
1245 pci_set_master(pci_dev);
1246
1247 /* Set the PCI DMA mask. Try all possibilities from our
1248 * genuine mask down to 32 bits, because some architectures
1249 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1250 * masks event though they reject 46 bit masks.
1251 */
1252 while (dma_mask > 0x7fffffffUL) {
1253 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1254 if (rc == 0)
1255 break;
1256 dma_mask >>= 1;
1257 }
1258 if (rc) {
1259 netif_err(efx, probe, efx->net_dev,
1260 "could not find a suitable DMA mask\n");
1261 goto fail2;
1262 }
1263 netif_dbg(efx, probe, efx->net_dev,
1264 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1265
1266 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1267 rc = pci_request_region(pci_dev, bar, "sfc");
1268 if (rc) {
1269 netif_err(efx, probe, efx->net_dev,
1270 "request for memory BAR failed\n");
1271 rc = -EIO;
1272 goto fail3;
1273 }
1274 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1275 if (!efx->membase) {
1276 netif_err(efx, probe, efx->net_dev,
1277 "could not map memory BAR at %llx+%x\n",
1278 (unsigned long long)efx->membase_phys, mem_map_size);
1279 rc = -ENOMEM;
1280 goto fail4;
1281 }
1282 netif_dbg(efx, probe, efx->net_dev,
1283 "memory BAR at %llx+%x (virtual %p)\n",
1284 (unsigned long long)efx->membase_phys, mem_map_size,
1285 efx->membase);
1286
1287 return 0;
1288
1289 fail4:
1290 pci_release_region(efx->pci_dev, bar);
1291 fail3:
1292 efx->membase_phys = 0;
1293 fail2:
1294 pci_disable_device(efx->pci_dev);
1295 fail1:
1296 return rc;
1297 }
1298
efx_fini_io(struct efx_nic * efx)1299 static void efx_fini_io(struct efx_nic *efx)
1300 {
1301 int bar;
1302
1303 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1304
1305 if (efx->membase) {
1306 iounmap(efx->membase);
1307 efx->membase = NULL;
1308 }
1309
1310 if (efx->membase_phys) {
1311 bar = efx->type->mem_bar;
1312 pci_release_region(efx->pci_dev, bar);
1313 efx->membase_phys = 0;
1314 }
1315
1316 /* Don't disable bus-mastering if VFs are assigned */
1317 if (!pci_vfs_assigned(efx->pci_dev))
1318 pci_disable_device(efx->pci_dev);
1319 }
1320
efx_set_default_rx_indir_table(struct efx_nic * efx)1321 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1322 {
1323 size_t i;
1324
1325 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1326 efx->rx_indir_table[i] =
1327 ethtool_rxfh_indir_default(i, efx->rss_spread);
1328 }
1329
efx_wanted_parallelism(struct efx_nic * efx)1330 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1331 {
1332 cpumask_var_t thread_mask;
1333 unsigned int count;
1334 int cpu;
1335
1336 if (rss_cpus) {
1337 count = rss_cpus;
1338 } else {
1339 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1340 netif_warn(efx, probe, efx->net_dev,
1341 "RSS disabled due to allocation failure\n");
1342 return 1;
1343 }
1344
1345 count = 0;
1346 for_each_online_cpu(cpu) {
1347 if (!cpumask_test_cpu(cpu, thread_mask)) {
1348 ++count;
1349 cpumask_or(thread_mask, thread_mask,
1350 topology_sibling_cpumask(cpu));
1351 }
1352 }
1353
1354 free_cpumask_var(thread_mask);
1355 }
1356
1357 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1358 * table entries that are inaccessible to VFs
1359 */
1360 #ifdef CONFIG_SFC_SRIOV
1361 if (efx->type->sriov_wanted) {
1362 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1363 count > efx_vf_size(efx)) {
1364 netif_warn(efx, probe, efx->net_dev,
1365 "Reducing number of RSS channels from %u to %u for "
1366 "VF support. Increase vf-msix-limit to use more "
1367 "channels on the PF.\n",
1368 count, efx_vf_size(efx));
1369 count = efx_vf_size(efx);
1370 }
1371 }
1372 #endif
1373
1374 return count;
1375 }
1376
1377 /* Probe the number and type of interrupts we are able to obtain, and
1378 * the resulting numbers of channels and RX queues.
1379 */
efx_probe_interrupts(struct efx_nic * efx)1380 static int efx_probe_interrupts(struct efx_nic *efx)
1381 {
1382 unsigned int extra_channels = 0;
1383 unsigned int i, j;
1384 int rc;
1385
1386 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1387 if (efx->extra_channel_type[i])
1388 ++extra_channels;
1389
1390 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1391 struct msix_entry xentries[EFX_MAX_CHANNELS];
1392 unsigned int n_channels;
1393
1394 n_channels = efx_wanted_parallelism(efx);
1395 if (efx_separate_tx_channels)
1396 n_channels *= 2;
1397 n_channels += extra_channels;
1398 n_channels = min(n_channels, efx->max_channels);
1399
1400 for (i = 0; i < n_channels; i++)
1401 xentries[i].entry = i;
1402 rc = pci_enable_msix_range(efx->pci_dev,
1403 xentries, 1, n_channels);
1404 if (rc < 0) {
1405 /* Fall back to single channel MSI */
1406 efx->interrupt_mode = EFX_INT_MODE_MSI;
1407 netif_err(efx, drv, efx->net_dev,
1408 "could not enable MSI-X\n");
1409 } else if (rc < n_channels) {
1410 netif_err(efx, drv, efx->net_dev,
1411 "WARNING: Insufficient MSI-X vectors"
1412 " available (%d < %u).\n", rc, n_channels);
1413 netif_err(efx, drv, efx->net_dev,
1414 "WARNING: Performance may be reduced.\n");
1415 n_channels = rc;
1416 }
1417
1418 if (rc > 0) {
1419 efx->n_channels = n_channels;
1420 if (n_channels > extra_channels)
1421 n_channels -= extra_channels;
1422 if (efx_separate_tx_channels) {
1423 efx->n_tx_channels = min(max(n_channels / 2,
1424 1U),
1425 efx->max_tx_channels);
1426 efx->n_rx_channels = max(n_channels -
1427 efx->n_tx_channels,
1428 1U);
1429 } else {
1430 efx->n_tx_channels = min(n_channels,
1431 efx->max_tx_channels);
1432 efx->n_rx_channels = n_channels;
1433 }
1434 for (i = 0; i < efx->n_channels; i++)
1435 efx_get_channel(efx, i)->irq =
1436 xentries[i].vector;
1437 }
1438 }
1439
1440 /* Try single interrupt MSI */
1441 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1442 efx->n_channels = 1;
1443 efx->n_rx_channels = 1;
1444 efx->n_tx_channels = 1;
1445 rc = pci_enable_msi(efx->pci_dev);
1446 if (rc == 0) {
1447 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1448 } else {
1449 netif_err(efx, drv, efx->net_dev,
1450 "could not enable MSI\n");
1451 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1452 }
1453 }
1454
1455 /* Assume legacy interrupts */
1456 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1457 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1458 efx->n_rx_channels = 1;
1459 efx->n_tx_channels = 1;
1460 efx->legacy_irq = efx->pci_dev->irq;
1461 }
1462
1463 /* Assign extra channels if possible */
1464 j = efx->n_channels;
1465 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1466 if (!efx->extra_channel_type[i])
1467 continue;
1468 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1469 efx->n_channels <= extra_channels) {
1470 efx->extra_channel_type[i]->handle_no_channel(efx);
1471 } else {
1472 --j;
1473 efx_get_channel(efx, j)->type =
1474 efx->extra_channel_type[i];
1475 }
1476 }
1477
1478 /* RSS might be usable on VFs even if it is disabled on the PF */
1479 #ifdef CONFIG_SFC_SRIOV
1480 if (efx->type->sriov_wanted) {
1481 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1482 !efx->type->sriov_wanted(efx)) ?
1483 efx->n_rx_channels : efx_vf_size(efx));
1484 return 0;
1485 }
1486 #endif
1487 efx->rss_spread = efx->n_rx_channels;
1488
1489 return 0;
1490 }
1491
efx_soft_enable_interrupts(struct efx_nic * efx)1492 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1493 {
1494 struct efx_channel *channel, *end_channel;
1495 int rc;
1496
1497 BUG_ON(efx->state == STATE_DISABLED);
1498
1499 efx->irq_soft_enabled = true;
1500 smp_wmb();
1501
1502 efx_for_each_channel(channel, efx) {
1503 if (!channel->type->keep_eventq) {
1504 rc = efx_init_eventq(channel);
1505 if (rc)
1506 goto fail;
1507 }
1508 efx_start_eventq(channel);
1509 }
1510
1511 efx_mcdi_mode_event(efx);
1512
1513 return 0;
1514 fail:
1515 end_channel = channel;
1516 efx_for_each_channel(channel, efx) {
1517 if (channel == end_channel)
1518 break;
1519 efx_stop_eventq(channel);
1520 if (!channel->type->keep_eventq)
1521 efx_fini_eventq(channel);
1522 }
1523
1524 return rc;
1525 }
1526
efx_soft_disable_interrupts(struct efx_nic * efx)1527 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1528 {
1529 struct efx_channel *channel;
1530
1531 if (efx->state == STATE_DISABLED)
1532 return;
1533
1534 efx_mcdi_mode_poll(efx);
1535
1536 efx->irq_soft_enabled = false;
1537 smp_wmb();
1538
1539 if (efx->legacy_irq)
1540 synchronize_irq(efx->legacy_irq);
1541
1542 efx_for_each_channel(channel, efx) {
1543 if (channel->irq)
1544 synchronize_irq(channel->irq);
1545
1546 efx_stop_eventq(channel);
1547 if (!channel->type->keep_eventq)
1548 efx_fini_eventq(channel);
1549 }
1550
1551 /* Flush the asynchronous MCDI request queue */
1552 efx_mcdi_flush_async(efx);
1553 }
1554
efx_enable_interrupts(struct efx_nic * efx)1555 static int efx_enable_interrupts(struct efx_nic *efx)
1556 {
1557 struct efx_channel *channel, *end_channel;
1558 int rc;
1559
1560 BUG_ON(efx->state == STATE_DISABLED);
1561
1562 if (efx->eeh_disabled_legacy_irq) {
1563 enable_irq(efx->legacy_irq);
1564 efx->eeh_disabled_legacy_irq = false;
1565 }
1566
1567 efx->type->irq_enable_master(efx);
1568
1569 efx_for_each_channel(channel, efx) {
1570 if (channel->type->keep_eventq) {
1571 rc = efx_init_eventq(channel);
1572 if (rc)
1573 goto fail;
1574 }
1575 }
1576
1577 rc = efx_soft_enable_interrupts(efx);
1578 if (rc)
1579 goto fail;
1580
1581 return 0;
1582
1583 fail:
1584 end_channel = channel;
1585 efx_for_each_channel(channel, efx) {
1586 if (channel == end_channel)
1587 break;
1588 if (channel->type->keep_eventq)
1589 efx_fini_eventq(channel);
1590 }
1591
1592 efx->type->irq_disable_non_ev(efx);
1593
1594 return rc;
1595 }
1596
efx_disable_interrupts(struct efx_nic * efx)1597 static void efx_disable_interrupts(struct efx_nic *efx)
1598 {
1599 struct efx_channel *channel;
1600
1601 efx_soft_disable_interrupts(efx);
1602
1603 efx_for_each_channel(channel, efx) {
1604 if (channel->type->keep_eventq)
1605 efx_fini_eventq(channel);
1606 }
1607
1608 efx->type->irq_disable_non_ev(efx);
1609 }
1610
efx_remove_interrupts(struct efx_nic * efx)1611 static void efx_remove_interrupts(struct efx_nic *efx)
1612 {
1613 struct efx_channel *channel;
1614
1615 /* Remove MSI/MSI-X interrupts */
1616 efx_for_each_channel(channel, efx)
1617 channel->irq = 0;
1618 pci_disable_msi(efx->pci_dev);
1619 pci_disable_msix(efx->pci_dev);
1620
1621 /* Remove legacy interrupt */
1622 efx->legacy_irq = 0;
1623 }
1624
efx_set_channels(struct efx_nic * efx)1625 static void efx_set_channels(struct efx_nic *efx)
1626 {
1627 struct efx_channel *channel;
1628 struct efx_tx_queue *tx_queue;
1629
1630 efx->tx_channel_offset =
1631 efx_separate_tx_channels ?
1632 efx->n_channels - efx->n_tx_channels : 0;
1633
1634 /* We need to mark which channels really have RX and TX
1635 * queues, and adjust the TX queue numbers if we have separate
1636 * RX-only and TX-only channels.
1637 */
1638 efx_for_each_channel(channel, efx) {
1639 if (channel->channel < efx->n_rx_channels)
1640 channel->rx_queue.core_index = channel->channel;
1641 else
1642 channel->rx_queue.core_index = -1;
1643
1644 efx_for_each_channel_tx_queue(tx_queue, channel)
1645 tx_queue->queue -= (efx->tx_channel_offset *
1646 EFX_TXQ_TYPES);
1647 }
1648 }
1649
efx_probe_nic(struct efx_nic * efx)1650 static int efx_probe_nic(struct efx_nic *efx)
1651 {
1652 int rc;
1653
1654 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1655
1656 /* Carry out hardware-type specific initialisation */
1657 rc = efx->type->probe(efx);
1658 if (rc)
1659 return rc;
1660
1661 do {
1662 if (!efx->max_channels || !efx->max_tx_channels) {
1663 netif_err(efx, drv, efx->net_dev,
1664 "Insufficient resources to allocate"
1665 " any channels\n");
1666 rc = -ENOSPC;
1667 goto fail1;
1668 }
1669
1670 /* Determine the number of channels and queues by trying
1671 * to hook in MSI-X interrupts.
1672 */
1673 rc = efx_probe_interrupts(efx);
1674 if (rc)
1675 goto fail1;
1676
1677 efx_set_channels(efx);
1678
1679 /* dimension_resources can fail with EAGAIN */
1680 rc = efx->type->dimension_resources(efx);
1681 if (rc != 0 && rc != -EAGAIN)
1682 goto fail2;
1683
1684 if (rc == -EAGAIN)
1685 /* try again with new max_channels */
1686 efx_remove_interrupts(efx);
1687
1688 } while (rc == -EAGAIN);
1689
1690 if (efx->n_channels > 1)
1691 netdev_rss_key_fill(&efx->rx_hash_key,
1692 sizeof(efx->rx_hash_key));
1693 efx_set_default_rx_indir_table(efx);
1694
1695 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1696 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1697
1698 /* Initialise the interrupt moderation settings */
1699 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1700 true);
1701
1702 return 0;
1703
1704 fail2:
1705 efx_remove_interrupts(efx);
1706 fail1:
1707 efx->type->remove(efx);
1708 return rc;
1709 }
1710
efx_remove_nic(struct efx_nic * efx)1711 static void efx_remove_nic(struct efx_nic *efx)
1712 {
1713 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1714
1715 efx_remove_interrupts(efx);
1716 efx->type->remove(efx);
1717 }
1718
efx_probe_filters(struct efx_nic * efx)1719 static int efx_probe_filters(struct efx_nic *efx)
1720 {
1721 int rc;
1722
1723 spin_lock_init(&efx->filter_lock);
1724 init_rwsem(&efx->filter_sem);
1725 down_write(&efx->filter_sem);
1726 rc = efx->type->filter_table_probe(efx);
1727 if (rc)
1728 goto out_unlock;
1729
1730 #ifdef CONFIG_RFS_ACCEL
1731 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1732 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1733 sizeof(*efx->rps_flow_id),
1734 GFP_KERNEL);
1735 if (!efx->rps_flow_id) {
1736 efx->type->filter_table_remove(efx);
1737 rc = -ENOMEM;
1738 goto out_unlock;
1739 }
1740 }
1741 #endif
1742 out_unlock:
1743 up_write(&efx->filter_sem);
1744 return rc;
1745 }
1746
efx_remove_filters(struct efx_nic * efx)1747 static void efx_remove_filters(struct efx_nic *efx)
1748 {
1749 #ifdef CONFIG_RFS_ACCEL
1750 kfree(efx->rps_flow_id);
1751 #endif
1752 down_write(&efx->filter_sem);
1753 efx->type->filter_table_remove(efx);
1754 up_write(&efx->filter_sem);
1755 }
1756
efx_restore_filters(struct efx_nic * efx)1757 static void efx_restore_filters(struct efx_nic *efx)
1758 {
1759 down_read(&efx->filter_sem);
1760 efx->type->filter_table_restore(efx);
1761 up_read(&efx->filter_sem);
1762 }
1763
1764 /**************************************************************************
1765 *
1766 * NIC startup/shutdown
1767 *
1768 *************************************************************************/
1769
efx_probe_all(struct efx_nic * efx)1770 static int efx_probe_all(struct efx_nic *efx)
1771 {
1772 int rc;
1773
1774 rc = efx_probe_nic(efx);
1775 if (rc) {
1776 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1777 goto fail1;
1778 }
1779
1780 rc = efx_probe_port(efx);
1781 if (rc) {
1782 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1783 goto fail2;
1784 }
1785
1786 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1787 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1788 rc = -EINVAL;
1789 goto fail3;
1790 }
1791 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1792
1793 #ifdef CONFIG_SFC_SRIOV
1794 rc = efx->type->vswitching_probe(efx);
1795 if (rc) /* not fatal; the PF will still work fine */
1796 netif_warn(efx, probe, efx->net_dev,
1797 "failed to setup vswitching rc=%d;"
1798 " VFs may not function\n", rc);
1799 #endif
1800
1801 rc = efx_probe_filters(efx);
1802 if (rc) {
1803 netif_err(efx, probe, efx->net_dev,
1804 "failed to create filter tables\n");
1805 goto fail4;
1806 }
1807
1808 rc = efx_probe_channels(efx);
1809 if (rc)
1810 goto fail5;
1811
1812 return 0;
1813
1814 fail5:
1815 efx_remove_filters(efx);
1816 fail4:
1817 #ifdef CONFIG_SFC_SRIOV
1818 efx->type->vswitching_remove(efx);
1819 #endif
1820 fail3:
1821 efx_remove_port(efx);
1822 fail2:
1823 efx_remove_nic(efx);
1824 fail1:
1825 return rc;
1826 }
1827
1828 /* If the interface is supposed to be running but is not, start
1829 * the hardware and software data path, regular activity for the port
1830 * (MAC statistics, link polling, etc.) and schedule the port to be
1831 * reconfigured. Interrupts must already be enabled. This function
1832 * is safe to call multiple times, so long as the NIC is not disabled.
1833 * Requires the RTNL lock.
1834 */
efx_start_all(struct efx_nic * efx)1835 static void efx_start_all(struct efx_nic *efx)
1836 {
1837 EFX_ASSERT_RESET_SERIALISED(efx);
1838 BUG_ON(efx->state == STATE_DISABLED);
1839
1840 /* Check that it is appropriate to restart the interface. All
1841 * of these flags are safe to read under just the rtnl lock */
1842 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1843 efx->reset_pending)
1844 return;
1845
1846 efx_start_port(efx);
1847 efx_start_datapath(efx);
1848
1849 /* Start the hardware monitor if there is one */
1850 if (efx->type->monitor != NULL)
1851 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1852 efx_monitor_interval);
1853
1854 /* If link state detection is normally event-driven, we have
1855 * to poll now because we could have missed a change
1856 */
1857 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1858 mutex_lock(&efx->mac_lock);
1859 if (efx->phy_op->poll(efx))
1860 efx_link_status_changed(efx);
1861 mutex_unlock(&efx->mac_lock);
1862 }
1863
1864 efx->type->start_stats(efx);
1865 efx->type->pull_stats(efx);
1866 spin_lock_bh(&efx->stats_lock);
1867 efx->type->update_stats(efx, NULL, NULL);
1868 spin_unlock_bh(&efx->stats_lock);
1869 }
1870
1871 /* Quiesce the hardware and software data path, and regular activity
1872 * for the port without bringing the link down. Safe to call multiple
1873 * times with the NIC in almost any state, but interrupts should be
1874 * enabled. Requires the RTNL lock.
1875 */
efx_stop_all(struct efx_nic * efx)1876 static void efx_stop_all(struct efx_nic *efx)
1877 {
1878 EFX_ASSERT_RESET_SERIALISED(efx);
1879
1880 /* port_enabled can be read safely under the rtnl lock */
1881 if (!efx->port_enabled)
1882 return;
1883
1884 /* update stats before we go down so we can accurately count
1885 * rx_nodesc_drops
1886 */
1887 efx->type->pull_stats(efx);
1888 spin_lock_bh(&efx->stats_lock);
1889 efx->type->update_stats(efx, NULL, NULL);
1890 spin_unlock_bh(&efx->stats_lock);
1891 efx->type->stop_stats(efx);
1892 efx_stop_port(efx);
1893
1894 /* Stop the kernel transmit interface. This is only valid if
1895 * the device is stopped or detached; otherwise the watchdog
1896 * may fire immediately.
1897 */
1898 WARN_ON(netif_running(efx->net_dev) &&
1899 netif_device_present(efx->net_dev));
1900 netif_tx_disable(efx->net_dev);
1901
1902 efx_stop_datapath(efx);
1903 }
1904
efx_remove_all(struct efx_nic * efx)1905 static void efx_remove_all(struct efx_nic *efx)
1906 {
1907 efx_remove_channels(efx);
1908 efx_remove_filters(efx);
1909 #ifdef CONFIG_SFC_SRIOV
1910 efx->type->vswitching_remove(efx);
1911 #endif
1912 efx_remove_port(efx);
1913 efx_remove_nic(efx);
1914 }
1915
1916 /**************************************************************************
1917 *
1918 * Interrupt moderation
1919 *
1920 **************************************************************************/
1921
irq_mod_ticks(unsigned int usecs,unsigned int quantum_ns)1922 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1923 {
1924 if (usecs == 0)
1925 return 0;
1926 if (usecs * 1000 < quantum_ns)
1927 return 1; /* never round down to 0 */
1928 return usecs * 1000 / quantum_ns;
1929 }
1930
1931 /* Set interrupt moderation parameters */
efx_init_irq_moderation(struct efx_nic * efx,unsigned int tx_usecs,unsigned int rx_usecs,bool rx_adaptive,bool rx_may_override_tx)1932 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1933 unsigned int rx_usecs, bool rx_adaptive,
1934 bool rx_may_override_tx)
1935 {
1936 struct efx_channel *channel;
1937 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1938 efx->timer_quantum_ns,
1939 1000);
1940 unsigned int tx_ticks;
1941 unsigned int rx_ticks;
1942
1943 EFX_ASSERT_RESET_SERIALISED(efx);
1944
1945 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1946 return -EINVAL;
1947
1948 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1949 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1950
1951 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1952 !rx_may_override_tx) {
1953 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1954 "RX and TX IRQ moderation must be equal\n");
1955 return -EINVAL;
1956 }
1957
1958 efx->irq_rx_adaptive = rx_adaptive;
1959 efx->irq_rx_moderation = rx_ticks;
1960 efx_for_each_channel(channel, efx) {
1961 if (efx_channel_has_rx_queue(channel))
1962 channel->irq_moderation = rx_ticks;
1963 else if (efx_channel_has_tx_queues(channel))
1964 channel->irq_moderation = tx_ticks;
1965 }
1966
1967 return 0;
1968 }
1969
efx_get_irq_moderation(struct efx_nic * efx,unsigned int * tx_usecs,unsigned int * rx_usecs,bool * rx_adaptive)1970 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1971 unsigned int *rx_usecs, bool *rx_adaptive)
1972 {
1973 /* We must round up when converting ticks to microseconds
1974 * because we round down when converting the other way.
1975 */
1976
1977 *rx_adaptive = efx->irq_rx_adaptive;
1978 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1979 efx->timer_quantum_ns,
1980 1000);
1981
1982 /* If channels are shared between RX and TX, so is IRQ
1983 * moderation. Otherwise, IRQ moderation is the same for all
1984 * TX channels and is not adaptive.
1985 */
1986 if (efx->tx_channel_offset == 0)
1987 *tx_usecs = *rx_usecs;
1988 else
1989 *tx_usecs = DIV_ROUND_UP(
1990 efx->channel[efx->tx_channel_offset]->irq_moderation *
1991 efx->timer_quantum_ns,
1992 1000);
1993 }
1994
1995 /**************************************************************************
1996 *
1997 * Hardware monitor
1998 *
1999 **************************************************************************/
2000
2001 /* Run periodically off the general workqueue */
efx_monitor(struct work_struct * data)2002 static void efx_monitor(struct work_struct *data)
2003 {
2004 struct efx_nic *efx = container_of(data, struct efx_nic,
2005 monitor_work.work);
2006
2007 netif_vdbg(efx, timer, efx->net_dev,
2008 "hardware monitor executing on CPU %d\n",
2009 raw_smp_processor_id());
2010 BUG_ON(efx->type->monitor == NULL);
2011
2012 /* If the mac_lock is already held then it is likely a port
2013 * reconfiguration is already in place, which will likely do
2014 * most of the work of monitor() anyway. */
2015 if (mutex_trylock(&efx->mac_lock)) {
2016 if (efx->port_enabled)
2017 efx->type->monitor(efx);
2018 mutex_unlock(&efx->mac_lock);
2019 }
2020
2021 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2022 efx_monitor_interval);
2023 }
2024
2025 /**************************************************************************
2026 *
2027 * ioctls
2028 *
2029 *************************************************************************/
2030
2031 /* Net device ioctl
2032 * Context: process, rtnl_lock() held.
2033 */
efx_ioctl(struct net_device * net_dev,struct ifreq * ifr,int cmd)2034 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2035 {
2036 struct efx_nic *efx = netdev_priv(net_dev);
2037 struct mii_ioctl_data *data = if_mii(ifr);
2038
2039 if (cmd == SIOCSHWTSTAMP)
2040 return efx_ptp_set_ts_config(efx, ifr);
2041 if (cmd == SIOCGHWTSTAMP)
2042 return efx_ptp_get_ts_config(efx, ifr);
2043
2044 /* Convert phy_id from older PRTAD/DEVAD format */
2045 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2046 (data->phy_id & 0xfc00) == 0x0400)
2047 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2048
2049 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2050 }
2051
2052 /**************************************************************************
2053 *
2054 * NAPI interface
2055 *
2056 **************************************************************************/
2057
efx_init_napi_channel(struct efx_channel * channel)2058 static void efx_init_napi_channel(struct efx_channel *channel)
2059 {
2060 struct efx_nic *efx = channel->efx;
2061
2062 channel->napi_dev = efx->net_dev;
2063 netif_napi_add(channel->napi_dev, &channel->napi_str,
2064 efx_poll, napi_weight);
2065 napi_hash_add(&channel->napi_str);
2066 efx_channel_busy_poll_init(channel);
2067 }
2068
efx_init_napi(struct efx_nic * efx)2069 static void efx_init_napi(struct efx_nic *efx)
2070 {
2071 struct efx_channel *channel;
2072
2073 efx_for_each_channel(channel, efx)
2074 efx_init_napi_channel(channel);
2075 }
2076
efx_fini_napi_channel(struct efx_channel * channel)2077 static void efx_fini_napi_channel(struct efx_channel *channel)
2078 {
2079 if (channel->napi_dev) {
2080 netif_napi_del(&channel->napi_str);
2081 napi_hash_del(&channel->napi_str);
2082 }
2083 channel->napi_dev = NULL;
2084 }
2085
efx_fini_napi(struct efx_nic * efx)2086 static void efx_fini_napi(struct efx_nic *efx)
2087 {
2088 struct efx_channel *channel;
2089
2090 efx_for_each_channel(channel, efx)
2091 efx_fini_napi_channel(channel);
2092 }
2093
2094 /**************************************************************************
2095 *
2096 * Kernel netpoll interface
2097 *
2098 *************************************************************************/
2099
2100 #ifdef CONFIG_NET_POLL_CONTROLLER
2101
2102 /* Although in the common case interrupts will be disabled, this is not
2103 * guaranteed. However, all our work happens inside the NAPI callback,
2104 * so no locking is required.
2105 */
efx_netpoll(struct net_device * net_dev)2106 static void efx_netpoll(struct net_device *net_dev)
2107 {
2108 struct efx_nic *efx = netdev_priv(net_dev);
2109 struct efx_channel *channel;
2110
2111 efx_for_each_channel(channel, efx)
2112 efx_schedule_channel(channel);
2113 }
2114
2115 #endif
2116
2117 #ifdef CONFIG_NET_RX_BUSY_POLL
efx_busy_poll(struct napi_struct * napi)2118 static int efx_busy_poll(struct napi_struct *napi)
2119 {
2120 struct efx_channel *channel =
2121 container_of(napi, struct efx_channel, napi_str);
2122 struct efx_nic *efx = channel->efx;
2123 int budget = 4;
2124 int old_rx_packets, rx_packets;
2125
2126 if (!netif_running(efx->net_dev))
2127 return LL_FLUSH_FAILED;
2128
2129 if (!efx_channel_try_lock_poll(channel))
2130 return LL_FLUSH_BUSY;
2131
2132 old_rx_packets = channel->rx_queue.rx_packets;
2133 efx_process_channel(channel, budget);
2134
2135 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2136
2137 /* There is no race condition with NAPI here.
2138 * NAPI will automatically be rescheduled if it yielded during busy
2139 * polling, because it was not able to take the lock and thus returned
2140 * the full budget.
2141 */
2142 efx_channel_unlock_poll(channel);
2143
2144 return rx_packets;
2145 }
2146 #endif
2147
2148 /**************************************************************************
2149 *
2150 * Kernel net device interface
2151 *
2152 *************************************************************************/
2153
2154 /* Context: process, rtnl_lock() held. */
efx_net_open(struct net_device * net_dev)2155 int efx_net_open(struct net_device *net_dev)
2156 {
2157 struct efx_nic *efx = netdev_priv(net_dev);
2158 int rc;
2159
2160 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2161 raw_smp_processor_id());
2162
2163 rc = efx_check_disabled(efx);
2164 if (rc)
2165 return rc;
2166 if (efx->phy_mode & PHY_MODE_SPECIAL)
2167 return -EBUSY;
2168 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2169 return -EIO;
2170
2171 /* Notify the kernel of the link state polled during driver load,
2172 * before the monitor starts running */
2173 efx_link_status_changed(efx);
2174
2175 efx_start_all(efx);
2176 efx_selftest_async_start(efx);
2177 return 0;
2178 }
2179
2180 /* Context: process, rtnl_lock() held.
2181 * Note that the kernel will ignore our return code; this method
2182 * should really be a void.
2183 */
efx_net_stop(struct net_device * net_dev)2184 int efx_net_stop(struct net_device *net_dev)
2185 {
2186 struct efx_nic *efx = netdev_priv(net_dev);
2187
2188 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2189 raw_smp_processor_id());
2190
2191 /* Stop the device and flush all the channels */
2192 efx_stop_all(efx);
2193
2194 return 0;
2195 }
2196
2197 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
efx_net_stats(struct net_device * net_dev,struct rtnl_link_stats64 * stats)2198 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2199 struct rtnl_link_stats64 *stats)
2200 {
2201 struct efx_nic *efx = netdev_priv(net_dev);
2202
2203 spin_lock_bh(&efx->stats_lock);
2204 efx->type->update_stats(efx, NULL, stats);
2205 spin_unlock_bh(&efx->stats_lock);
2206
2207 return stats;
2208 }
2209
2210 /* Context: netif_tx_lock held, BHs disabled. */
efx_watchdog(struct net_device * net_dev)2211 static void efx_watchdog(struct net_device *net_dev)
2212 {
2213 struct efx_nic *efx = netdev_priv(net_dev);
2214
2215 netif_err(efx, tx_err, efx->net_dev,
2216 "TX stuck with port_enabled=%d: resetting channels\n",
2217 efx->port_enabled);
2218
2219 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2220 }
2221
2222
2223 /* Context: process, rtnl_lock() held. */
efx_change_mtu(struct net_device * net_dev,int new_mtu)2224 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2225 {
2226 struct efx_nic *efx = netdev_priv(net_dev);
2227 int rc;
2228
2229 rc = efx_check_disabled(efx);
2230 if (rc)
2231 return rc;
2232 if (new_mtu > EFX_MAX_MTU)
2233 return -EINVAL;
2234
2235 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2236
2237 efx_device_detach_sync(efx);
2238 efx_stop_all(efx);
2239
2240 mutex_lock(&efx->mac_lock);
2241 net_dev->mtu = new_mtu;
2242 efx_mac_reconfigure(efx);
2243 mutex_unlock(&efx->mac_lock);
2244
2245 efx_start_all(efx);
2246 netif_device_attach(efx->net_dev);
2247 return 0;
2248 }
2249
efx_set_mac_address(struct net_device * net_dev,void * data)2250 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2251 {
2252 struct efx_nic *efx = netdev_priv(net_dev);
2253 struct sockaddr *addr = data;
2254 u8 *new_addr = addr->sa_data;
2255 u8 old_addr[6];
2256 int rc;
2257
2258 if (!is_valid_ether_addr(new_addr)) {
2259 netif_err(efx, drv, efx->net_dev,
2260 "invalid ethernet MAC address requested: %pM\n",
2261 new_addr);
2262 return -EADDRNOTAVAIL;
2263 }
2264
2265 /* save old address */
2266 ether_addr_copy(old_addr, net_dev->dev_addr);
2267 ether_addr_copy(net_dev->dev_addr, new_addr);
2268 if (efx->type->set_mac_address) {
2269 rc = efx->type->set_mac_address(efx);
2270 if (rc) {
2271 ether_addr_copy(net_dev->dev_addr, old_addr);
2272 return rc;
2273 }
2274 }
2275
2276 /* Reconfigure the MAC */
2277 mutex_lock(&efx->mac_lock);
2278 efx_mac_reconfigure(efx);
2279 mutex_unlock(&efx->mac_lock);
2280
2281 return 0;
2282 }
2283
2284 /* Context: netif_addr_lock held, BHs disabled. */
efx_set_rx_mode(struct net_device * net_dev)2285 static void efx_set_rx_mode(struct net_device *net_dev)
2286 {
2287 struct efx_nic *efx = netdev_priv(net_dev);
2288
2289 if (efx->port_enabled)
2290 queue_work(efx->workqueue, &efx->mac_work);
2291 /* Otherwise efx_start_port() will do this */
2292 }
2293
efx_set_features(struct net_device * net_dev,netdev_features_t data)2294 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2295 {
2296 struct efx_nic *efx = netdev_priv(net_dev);
2297
2298 /* If disabling RX n-tuple filtering, clear existing filters */
2299 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2300 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2301
2302 return 0;
2303 }
2304
2305 static const struct net_device_ops efx_netdev_ops = {
2306 .ndo_open = efx_net_open,
2307 .ndo_stop = efx_net_stop,
2308 .ndo_get_stats64 = efx_net_stats,
2309 .ndo_tx_timeout = efx_watchdog,
2310 .ndo_start_xmit = efx_hard_start_xmit,
2311 .ndo_validate_addr = eth_validate_addr,
2312 .ndo_do_ioctl = efx_ioctl,
2313 .ndo_change_mtu = efx_change_mtu,
2314 .ndo_set_mac_address = efx_set_mac_address,
2315 .ndo_set_rx_mode = efx_set_rx_mode,
2316 .ndo_set_features = efx_set_features,
2317 #ifdef CONFIG_SFC_SRIOV
2318 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2319 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2320 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2321 .ndo_get_vf_config = efx_sriov_get_vf_config,
2322 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2323 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id,
2324 #endif
2325 #ifdef CONFIG_NET_POLL_CONTROLLER
2326 .ndo_poll_controller = efx_netpoll,
2327 #endif
2328 .ndo_setup_tc = efx_setup_tc,
2329 #ifdef CONFIG_NET_RX_BUSY_POLL
2330 .ndo_busy_poll = efx_busy_poll,
2331 #endif
2332 #ifdef CONFIG_RFS_ACCEL
2333 .ndo_rx_flow_steer = efx_filter_rfs,
2334 #endif
2335 };
2336
efx_update_name(struct efx_nic * efx)2337 static void efx_update_name(struct efx_nic *efx)
2338 {
2339 strcpy(efx->name, efx->net_dev->name);
2340 efx_mtd_rename(efx);
2341 efx_set_channel_names(efx);
2342 }
2343
efx_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2344 static int efx_netdev_event(struct notifier_block *this,
2345 unsigned long event, void *ptr)
2346 {
2347 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2348
2349 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2350 event == NETDEV_CHANGENAME)
2351 efx_update_name(netdev_priv(net_dev));
2352
2353 return NOTIFY_DONE;
2354 }
2355
2356 static struct notifier_block efx_netdev_notifier = {
2357 .notifier_call = efx_netdev_event,
2358 };
2359
2360 static ssize_t
show_phy_type(struct device * dev,struct device_attribute * attr,char * buf)2361 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2362 {
2363 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2364 return sprintf(buf, "%d\n", efx->phy_type);
2365 }
2366 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2367
2368 #ifdef CONFIG_SFC_MCDI_LOGGING
show_mcdi_log(struct device * dev,struct device_attribute * attr,char * buf)2369 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2370 char *buf)
2371 {
2372 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2373 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2374
2375 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2376 }
set_mcdi_log(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2377 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2378 const char *buf, size_t count)
2379 {
2380 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2381 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2382 bool enable = count > 0 && *buf != '0';
2383
2384 mcdi->logging_enabled = enable;
2385 return count;
2386 }
2387 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2388 #endif
2389
efx_register_netdev(struct efx_nic * efx)2390 static int efx_register_netdev(struct efx_nic *efx)
2391 {
2392 struct net_device *net_dev = efx->net_dev;
2393 struct efx_channel *channel;
2394 int rc;
2395
2396 net_dev->watchdog_timeo = 5 * HZ;
2397 net_dev->irq = efx->pci_dev->irq;
2398 net_dev->netdev_ops = &efx_netdev_ops;
2399 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2400 net_dev->priv_flags |= IFF_UNICAST_FLT;
2401 net_dev->ethtool_ops = &efx_ethtool_ops;
2402 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2403
2404 rtnl_lock();
2405
2406 /* Enable resets to be scheduled and check whether any were
2407 * already requested. If so, the NIC is probably hosed so we
2408 * abort.
2409 */
2410 efx->state = STATE_READY;
2411 smp_mb(); /* ensure we change state before checking reset_pending */
2412 if (efx->reset_pending) {
2413 netif_err(efx, probe, efx->net_dev,
2414 "aborting probe due to scheduled reset\n");
2415 rc = -EIO;
2416 goto fail_locked;
2417 }
2418
2419 rc = dev_alloc_name(net_dev, net_dev->name);
2420 if (rc < 0)
2421 goto fail_locked;
2422 efx_update_name(efx);
2423
2424 /* Always start with carrier off; PHY events will detect the link */
2425 netif_carrier_off(net_dev);
2426
2427 rc = register_netdevice(net_dev);
2428 if (rc)
2429 goto fail_locked;
2430
2431 efx_for_each_channel(channel, efx) {
2432 struct efx_tx_queue *tx_queue;
2433 efx_for_each_channel_tx_queue(tx_queue, channel)
2434 efx_init_tx_queue_core_txq(tx_queue);
2435 }
2436
2437 efx_associate(efx);
2438
2439 rtnl_unlock();
2440
2441 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2442 if (rc) {
2443 netif_err(efx, drv, efx->net_dev,
2444 "failed to init net dev attributes\n");
2445 goto fail_registered;
2446 }
2447 #ifdef CONFIG_SFC_MCDI_LOGGING
2448 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2449 if (rc) {
2450 netif_err(efx, drv, efx->net_dev,
2451 "failed to init net dev attributes\n");
2452 goto fail_attr_mcdi_logging;
2453 }
2454 #endif
2455
2456 return 0;
2457
2458 #ifdef CONFIG_SFC_MCDI_LOGGING
2459 fail_attr_mcdi_logging:
2460 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2461 #endif
2462 fail_registered:
2463 rtnl_lock();
2464 efx_dissociate(efx);
2465 unregister_netdevice(net_dev);
2466 fail_locked:
2467 efx->state = STATE_UNINIT;
2468 rtnl_unlock();
2469 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2470 return rc;
2471 }
2472
efx_unregister_netdev(struct efx_nic * efx)2473 static void efx_unregister_netdev(struct efx_nic *efx)
2474 {
2475 if (!efx->net_dev)
2476 return;
2477
2478 BUG_ON(netdev_priv(efx->net_dev) != efx);
2479
2480 if (efx_dev_registered(efx)) {
2481 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2482 #ifdef CONFIG_SFC_MCDI_LOGGING
2483 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2484 #endif
2485 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2486 unregister_netdev(efx->net_dev);
2487 }
2488 }
2489
2490 /**************************************************************************
2491 *
2492 * Device reset and suspend
2493 *
2494 **************************************************************************/
2495
2496 /* Tears down the entire software state and most of the hardware state
2497 * before reset. */
efx_reset_down(struct efx_nic * efx,enum reset_type method)2498 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2499 {
2500 EFX_ASSERT_RESET_SERIALISED(efx);
2501
2502 if (method == RESET_TYPE_MCDI_TIMEOUT)
2503 efx->type->prepare_flr(efx);
2504
2505 efx_stop_all(efx);
2506 efx_disable_interrupts(efx);
2507
2508 mutex_lock(&efx->mac_lock);
2509 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2510 method != RESET_TYPE_DATAPATH)
2511 efx->phy_op->fini(efx);
2512 efx->type->fini(efx);
2513 }
2514
2515 /* This function will always ensure that the locks acquired in
2516 * efx_reset_down() are released. A failure return code indicates
2517 * that we were unable to reinitialise the hardware, and the
2518 * driver should be disabled. If ok is false, then the rx and tx
2519 * engines are not restarted, pending a RESET_DISABLE. */
efx_reset_up(struct efx_nic * efx,enum reset_type method,bool ok)2520 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2521 {
2522 int rc;
2523
2524 EFX_ASSERT_RESET_SERIALISED(efx);
2525
2526 if (method == RESET_TYPE_MCDI_TIMEOUT)
2527 efx->type->finish_flr(efx);
2528
2529 /* Ensure that SRAM is initialised even if we're disabling the device */
2530 rc = efx->type->init(efx);
2531 if (rc) {
2532 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2533 goto fail;
2534 }
2535
2536 if (!ok)
2537 goto fail;
2538
2539 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2540 method != RESET_TYPE_DATAPATH) {
2541 rc = efx->phy_op->init(efx);
2542 if (rc)
2543 goto fail;
2544 rc = efx->phy_op->reconfigure(efx);
2545 if (rc && rc != -EPERM)
2546 netif_err(efx, drv, efx->net_dev,
2547 "could not restore PHY settings\n");
2548 }
2549
2550 rc = efx_enable_interrupts(efx);
2551 if (rc)
2552 goto fail;
2553
2554 #ifdef CONFIG_SFC_SRIOV
2555 rc = efx->type->vswitching_restore(efx);
2556 if (rc) /* not fatal; the PF will still work fine */
2557 netif_warn(efx, probe, efx->net_dev,
2558 "failed to restore vswitching rc=%d;"
2559 " VFs may not function\n", rc);
2560 #endif
2561
2562 down_read(&efx->filter_sem);
2563 efx_restore_filters(efx);
2564 up_read(&efx->filter_sem);
2565 if (efx->type->sriov_reset)
2566 efx->type->sriov_reset(efx);
2567
2568 mutex_unlock(&efx->mac_lock);
2569
2570 efx_start_all(efx);
2571
2572 return 0;
2573
2574 fail:
2575 efx->port_initialized = false;
2576
2577 mutex_unlock(&efx->mac_lock);
2578
2579 return rc;
2580 }
2581
2582 /* Reset the NIC using the specified method. Note that the reset may
2583 * fail, in which case the card will be left in an unusable state.
2584 *
2585 * Caller must hold the rtnl_lock.
2586 */
efx_reset(struct efx_nic * efx,enum reset_type method)2587 int efx_reset(struct efx_nic *efx, enum reset_type method)
2588 {
2589 int rc, rc2;
2590 bool disabled;
2591
2592 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2593 RESET_TYPE(method));
2594
2595 efx_device_detach_sync(efx);
2596 efx_reset_down(efx, method);
2597
2598 rc = efx->type->reset(efx, method);
2599 if (rc) {
2600 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2601 goto out;
2602 }
2603
2604 /* Clear flags for the scopes we covered. We assume the NIC and
2605 * driver are now quiescent so that there is no race here.
2606 */
2607 if (method < RESET_TYPE_MAX_METHOD)
2608 efx->reset_pending &= -(1 << (method + 1));
2609 else /* it doesn't fit into the well-ordered scope hierarchy */
2610 __clear_bit(method, &efx->reset_pending);
2611
2612 /* Reinitialise bus-mastering, which may have been turned off before
2613 * the reset was scheduled. This is still appropriate, even in the
2614 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2615 * can respond to requests. */
2616 pci_set_master(efx->pci_dev);
2617
2618 out:
2619 /* Leave device stopped if necessary */
2620 disabled = rc ||
2621 method == RESET_TYPE_DISABLE ||
2622 method == RESET_TYPE_RECOVER_OR_DISABLE;
2623 rc2 = efx_reset_up(efx, method, !disabled);
2624 if (rc2) {
2625 disabled = true;
2626 if (!rc)
2627 rc = rc2;
2628 }
2629
2630 if (disabled) {
2631 dev_close(efx->net_dev);
2632 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2633 efx->state = STATE_DISABLED;
2634 } else {
2635 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2636 netif_device_attach(efx->net_dev);
2637 }
2638 return rc;
2639 }
2640
2641 /* Try recovery mechanisms.
2642 * For now only EEH is supported.
2643 * Returns 0 if the recovery mechanisms are unsuccessful.
2644 * Returns a non-zero value otherwise.
2645 */
efx_try_recovery(struct efx_nic * efx)2646 int efx_try_recovery(struct efx_nic *efx)
2647 {
2648 #ifdef CONFIG_EEH
2649 /* A PCI error can occur and not be seen by EEH because nothing
2650 * happens on the PCI bus. In this case the driver may fail and
2651 * schedule a 'recover or reset', leading to this recovery handler.
2652 * Manually call the eeh failure check function.
2653 */
2654 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2655 if (eeh_dev_check_failure(eehdev)) {
2656 /* The EEH mechanisms will handle the error and reset the
2657 * device if necessary.
2658 */
2659 return 1;
2660 }
2661 #endif
2662 return 0;
2663 }
2664
efx_wait_for_bist_end(struct efx_nic * efx)2665 static void efx_wait_for_bist_end(struct efx_nic *efx)
2666 {
2667 int i;
2668
2669 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2670 if (efx_mcdi_poll_reboot(efx))
2671 goto out;
2672 msleep(BIST_WAIT_DELAY_MS);
2673 }
2674
2675 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2676 out:
2677 /* Either way unset the BIST flag. If we found no reboot we probably
2678 * won't recover, but we should try.
2679 */
2680 efx->mc_bist_for_other_fn = false;
2681 }
2682
2683 /* The worker thread exists so that code that cannot sleep can
2684 * schedule a reset for later.
2685 */
efx_reset_work(struct work_struct * data)2686 static void efx_reset_work(struct work_struct *data)
2687 {
2688 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2689 unsigned long pending;
2690 enum reset_type method;
2691
2692 pending = ACCESS_ONCE(efx->reset_pending);
2693 method = fls(pending) - 1;
2694
2695 if (method == RESET_TYPE_MC_BIST)
2696 efx_wait_for_bist_end(efx);
2697
2698 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2699 method == RESET_TYPE_RECOVER_OR_ALL) &&
2700 efx_try_recovery(efx))
2701 return;
2702
2703 if (!pending)
2704 return;
2705
2706 rtnl_lock();
2707
2708 /* We checked the state in efx_schedule_reset() but it may
2709 * have changed by now. Now that we have the RTNL lock,
2710 * it cannot change again.
2711 */
2712 if (efx->state == STATE_READY)
2713 (void)efx_reset(efx, method);
2714
2715 rtnl_unlock();
2716 }
2717
efx_schedule_reset(struct efx_nic * efx,enum reset_type type)2718 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2719 {
2720 enum reset_type method;
2721
2722 if (efx->state == STATE_RECOVERY) {
2723 netif_dbg(efx, drv, efx->net_dev,
2724 "recovering: skip scheduling %s reset\n",
2725 RESET_TYPE(type));
2726 return;
2727 }
2728
2729 switch (type) {
2730 case RESET_TYPE_INVISIBLE:
2731 case RESET_TYPE_ALL:
2732 case RESET_TYPE_RECOVER_OR_ALL:
2733 case RESET_TYPE_WORLD:
2734 case RESET_TYPE_DISABLE:
2735 case RESET_TYPE_RECOVER_OR_DISABLE:
2736 case RESET_TYPE_DATAPATH:
2737 case RESET_TYPE_MC_BIST:
2738 case RESET_TYPE_MCDI_TIMEOUT:
2739 method = type;
2740 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2741 RESET_TYPE(method));
2742 break;
2743 default:
2744 method = efx->type->map_reset_reason(type);
2745 netif_dbg(efx, drv, efx->net_dev,
2746 "scheduling %s reset for %s\n",
2747 RESET_TYPE(method), RESET_TYPE(type));
2748 break;
2749 }
2750
2751 set_bit(method, &efx->reset_pending);
2752 smp_mb(); /* ensure we change reset_pending before checking state */
2753
2754 /* If we're not READY then just leave the flags set as the cue
2755 * to abort probing or reschedule the reset later.
2756 */
2757 if (ACCESS_ONCE(efx->state) != STATE_READY)
2758 return;
2759
2760 /* efx_process_channel() will no longer read events once a
2761 * reset is scheduled. So switch back to poll'd MCDI completions. */
2762 efx_mcdi_mode_poll(efx);
2763
2764 queue_work(reset_workqueue, &efx->reset_work);
2765 }
2766
2767 /**************************************************************************
2768 *
2769 * List of NICs we support
2770 *
2771 **************************************************************************/
2772
2773 /* PCI device ID table */
2774 static const struct pci_device_id efx_pci_table[] = {
2775 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2776 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2777 .driver_data = (unsigned long) &falcon_a1_nic_type},
2778 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2779 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2780 .driver_data = (unsigned long) &falcon_b0_nic_type},
2781 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2782 .driver_data = (unsigned long) &siena_a0_nic_type},
2783 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2784 .driver_data = (unsigned long) &siena_a0_nic_type},
2785 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2786 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2787 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2788 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2789 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2790 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2791 {0} /* end of list */
2792 };
2793
2794 /**************************************************************************
2795 *
2796 * Dummy PHY/MAC operations
2797 *
2798 * Can be used for some unimplemented operations
2799 * Needed so all function pointers are valid and do not have to be tested
2800 * before use
2801 *
2802 **************************************************************************/
efx_port_dummy_op_int(struct efx_nic * efx)2803 int efx_port_dummy_op_int(struct efx_nic *efx)
2804 {
2805 return 0;
2806 }
efx_port_dummy_op_void(struct efx_nic * efx)2807 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2808
efx_port_dummy_op_poll(struct efx_nic * efx)2809 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2810 {
2811 return false;
2812 }
2813
2814 static const struct efx_phy_operations efx_dummy_phy_operations = {
2815 .init = efx_port_dummy_op_int,
2816 .reconfigure = efx_port_dummy_op_int,
2817 .poll = efx_port_dummy_op_poll,
2818 .fini = efx_port_dummy_op_void,
2819 };
2820
2821 /**************************************************************************
2822 *
2823 * Data housekeeping
2824 *
2825 **************************************************************************/
2826
2827 /* This zeroes out and then fills in the invariants in a struct
2828 * efx_nic (including all sub-structures).
2829 */
efx_init_struct(struct efx_nic * efx,struct pci_dev * pci_dev,struct net_device * net_dev)2830 static int efx_init_struct(struct efx_nic *efx,
2831 struct pci_dev *pci_dev, struct net_device *net_dev)
2832 {
2833 int i;
2834
2835 /* Initialise common structures */
2836 INIT_LIST_HEAD(&efx->node);
2837 INIT_LIST_HEAD(&efx->secondary_list);
2838 spin_lock_init(&efx->biu_lock);
2839 #ifdef CONFIG_SFC_MTD
2840 INIT_LIST_HEAD(&efx->mtd_list);
2841 #endif
2842 INIT_WORK(&efx->reset_work, efx_reset_work);
2843 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2844 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2845 efx->pci_dev = pci_dev;
2846 efx->msg_enable = debug;
2847 efx->state = STATE_UNINIT;
2848 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2849
2850 efx->net_dev = net_dev;
2851 efx->rx_prefix_size = efx->type->rx_prefix_size;
2852 efx->rx_ip_align =
2853 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2854 efx->rx_packet_hash_offset =
2855 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2856 efx->rx_packet_ts_offset =
2857 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2858 spin_lock_init(&efx->stats_lock);
2859 mutex_init(&efx->mac_lock);
2860 efx->phy_op = &efx_dummy_phy_operations;
2861 efx->mdio.dev = net_dev;
2862 INIT_WORK(&efx->mac_work, efx_mac_work);
2863 init_waitqueue_head(&efx->flush_wq);
2864
2865 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2866 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2867 if (!efx->channel[i])
2868 goto fail;
2869 efx->msi_context[i].efx = efx;
2870 efx->msi_context[i].index = i;
2871 }
2872
2873 /* Higher numbered interrupt modes are less capable! */
2874 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2875 interrupt_mode);
2876
2877 /* Would be good to use the net_dev name, but we're too early */
2878 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2879 pci_name(pci_dev));
2880 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2881 if (!efx->workqueue)
2882 goto fail;
2883
2884 return 0;
2885
2886 fail:
2887 efx_fini_struct(efx);
2888 return -ENOMEM;
2889 }
2890
efx_fini_struct(struct efx_nic * efx)2891 static void efx_fini_struct(struct efx_nic *efx)
2892 {
2893 int i;
2894
2895 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2896 kfree(efx->channel[i]);
2897
2898 kfree(efx->vpd_sn);
2899
2900 if (efx->workqueue) {
2901 destroy_workqueue(efx->workqueue);
2902 efx->workqueue = NULL;
2903 }
2904 }
2905
efx_update_sw_stats(struct efx_nic * efx,u64 * stats)2906 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2907 {
2908 u64 n_rx_nodesc_trunc = 0;
2909 struct efx_channel *channel;
2910
2911 efx_for_each_channel(channel, efx)
2912 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2913 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2914 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2915 }
2916
2917 /**************************************************************************
2918 *
2919 * PCI interface
2920 *
2921 **************************************************************************/
2922
2923 /* Main body of final NIC shutdown code
2924 * This is called only at module unload (or hotplug removal).
2925 */
efx_pci_remove_main(struct efx_nic * efx)2926 static void efx_pci_remove_main(struct efx_nic *efx)
2927 {
2928 /* Flush reset_work. It can no longer be scheduled since we
2929 * are not READY.
2930 */
2931 BUG_ON(efx->state == STATE_READY);
2932 cancel_work_sync(&efx->reset_work);
2933
2934 efx_disable_interrupts(efx);
2935 efx_nic_fini_interrupt(efx);
2936 efx_fini_port(efx);
2937 efx->type->fini(efx);
2938 efx_fini_napi(efx);
2939 efx_remove_all(efx);
2940 }
2941
2942 /* Final NIC shutdown
2943 * This is called only at module unload (or hotplug removal). A PF can call
2944 * this on its VFs to ensure they are unbound first.
2945 */
efx_pci_remove(struct pci_dev * pci_dev)2946 static void efx_pci_remove(struct pci_dev *pci_dev)
2947 {
2948 struct efx_nic *efx;
2949
2950 efx = pci_get_drvdata(pci_dev);
2951 if (!efx)
2952 return;
2953
2954 /* Mark the NIC as fini, then stop the interface */
2955 rtnl_lock();
2956 efx_dissociate(efx);
2957 dev_close(efx->net_dev);
2958 efx_disable_interrupts(efx);
2959 efx->state = STATE_UNINIT;
2960 rtnl_unlock();
2961
2962 if (efx->type->sriov_fini)
2963 efx->type->sriov_fini(efx);
2964
2965 efx_unregister_netdev(efx);
2966
2967 efx_mtd_remove(efx);
2968
2969 efx_pci_remove_main(efx);
2970
2971 efx_fini_io(efx);
2972 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2973
2974 efx_fini_struct(efx);
2975 free_netdev(efx->net_dev);
2976
2977 pci_disable_pcie_error_reporting(pci_dev);
2978 };
2979
2980 /* NIC VPD information
2981 * Called during probe to display the part number of the
2982 * installed NIC. VPD is potentially very large but this should
2983 * always appear within the first 512 bytes.
2984 */
2985 #define SFC_VPD_LEN 512
efx_probe_vpd_strings(struct efx_nic * efx)2986 static void efx_probe_vpd_strings(struct efx_nic *efx)
2987 {
2988 struct pci_dev *dev = efx->pci_dev;
2989 char vpd_data[SFC_VPD_LEN];
2990 ssize_t vpd_size;
2991 int ro_start, ro_size, i, j;
2992
2993 /* Get the vpd data from the device */
2994 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2995 if (vpd_size <= 0) {
2996 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2997 return;
2998 }
2999
3000 /* Get the Read only section */
3001 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3002 if (ro_start < 0) {
3003 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3004 return;
3005 }
3006
3007 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3008 j = ro_size;
3009 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3010 if (i + j > vpd_size)
3011 j = vpd_size - i;
3012
3013 /* Get the Part number */
3014 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3015 if (i < 0) {
3016 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3017 return;
3018 }
3019
3020 j = pci_vpd_info_field_size(&vpd_data[i]);
3021 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3022 if (i + j > vpd_size) {
3023 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3024 return;
3025 }
3026
3027 netif_info(efx, drv, efx->net_dev,
3028 "Part Number : %.*s\n", j, &vpd_data[i]);
3029
3030 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3031 j = ro_size;
3032 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3033 if (i < 0) {
3034 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3035 return;
3036 }
3037
3038 j = pci_vpd_info_field_size(&vpd_data[i]);
3039 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3040 if (i + j > vpd_size) {
3041 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3042 return;
3043 }
3044
3045 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3046 if (!efx->vpd_sn)
3047 return;
3048
3049 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3050 }
3051
3052
3053 /* Main body of NIC initialisation
3054 * This is called at module load (or hotplug insertion, theoretically).
3055 */
efx_pci_probe_main(struct efx_nic * efx)3056 static int efx_pci_probe_main(struct efx_nic *efx)
3057 {
3058 int rc;
3059
3060 /* Do start-of-day initialisation */
3061 rc = efx_probe_all(efx);
3062 if (rc)
3063 goto fail1;
3064
3065 efx_init_napi(efx);
3066
3067 rc = efx->type->init(efx);
3068 if (rc) {
3069 netif_err(efx, probe, efx->net_dev,
3070 "failed to initialise NIC\n");
3071 goto fail3;
3072 }
3073
3074 rc = efx_init_port(efx);
3075 if (rc) {
3076 netif_err(efx, probe, efx->net_dev,
3077 "failed to initialise port\n");
3078 goto fail4;
3079 }
3080
3081 rc = efx_nic_init_interrupt(efx);
3082 if (rc)
3083 goto fail5;
3084 rc = efx_enable_interrupts(efx);
3085 if (rc)
3086 goto fail6;
3087
3088 return 0;
3089
3090 fail6:
3091 efx_nic_fini_interrupt(efx);
3092 fail5:
3093 efx_fini_port(efx);
3094 fail4:
3095 efx->type->fini(efx);
3096 fail3:
3097 efx_fini_napi(efx);
3098 efx_remove_all(efx);
3099 fail1:
3100 return rc;
3101 }
3102
3103 /* NIC initialisation
3104 *
3105 * This is called at module load (or hotplug insertion,
3106 * theoretically). It sets up PCI mappings, resets the NIC,
3107 * sets up and registers the network devices with the kernel and hooks
3108 * the interrupt service routine. It does not prepare the device for
3109 * transmission; this is left to the first time one of the network
3110 * interfaces is brought up (i.e. efx_net_open).
3111 */
efx_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * entry)3112 static int efx_pci_probe(struct pci_dev *pci_dev,
3113 const struct pci_device_id *entry)
3114 {
3115 struct net_device *net_dev;
3116 struct efx_nic *efx;
3117 int rc;
3118
3119 /* Allocate and initialise a struct net_device and struct efx_nic */
3120 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3121 EFX_MAX_RX_QUEUES);
3122 if (!net_dev)
3123 return -ENOMEM;
3124 efx = netdev_priv(net_dev);
3125 efx->type = (const struct efx_nic_type *) entry->driver_data;
3126 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3127 NETIF_F_HIGHDMA | NETIF_F_TSO |
3128 NETIF_F_RXCSUM);
3129 if (efx->type->offload_features & NETIF_F_V6_CSUM)
3130 net_dev->features |= NETIF_F_TSO6;
3131 /* Mask for features that also apply to VLAN devices */
3132 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
3133 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3134 NETIF_F_RXCSUM);
3135 /* All offloads can be toggled */
3136 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
3137 pci_set_drvdata(pci_dev, efx);
3138 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3139 rc = efx_init_struct(efx, pci_dev, net_dev);
3140 if (rc)
3141 goto fail1;
3142
3143 netif_info(efx, probe, efx->net_dev,
3144 "Solarflare NIC detected\n");
3145
3146 if (!efx->type->is_vf)
3147 efx_probe_vpd_strings(efx);
3148
3149 /* Set up basic I/O (BAR mappings etc) */
3150 rc = efx_init_io(efx);
3151 if (rc)
3152 goto fail2;
3153
3154 rc = efx_pci_probe_main(efx);
3155 if (rc)
3156 goto fail3;
3157
3158 rc = efx_register_netdev(efx);
3159 if (rc)
3160 goto fail4;
3161
3162 if (efx->type->sriov_init) {
3163 rc = efx->type->sriov_init(efx);
3164 if (rc)
3165 netif_err(efx, probe, efx->net_dev,
3166 "SR-IOV can't be enabled rc %d\n", rc);
3167 }
3168
3169 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3170
3171 /* Try to create MTDs, but allow this to fail */
3172 rtnl_lock();
3173 rc = efx_mtd_probe(efx);
3174 rtnl_unlock();
3175 if (rc)
3176 netif_warn(efx, probe, efx->net_dev,
3177 "failed to create MTDs (%d)\n", rc);
3178
3179 rc = pci_enable_pcie_error_reporting(pci_dev);
3180 if (rc && rc != -EINVAL)
3181 netif_warn(efx, probe, efx->net_dev,
3182 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
3183
3184 return 0;
3185
3186 fail4:
3187 efx_pci_remove_main(efx);
3188 fail3:
3189 efx_fini_io(efx);
3190 fail2:
3191 efx_fini_struct(efx);
3192 fail1:
3193 WARN_ON(rc > 0);
3194 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3195 free_netdev(net_dev);
3196 return rc;
3197 }
3198
3199 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3200 * enabled on success
3201 */
3202 #ifdef CONFIG_SFC_SRIOV
efx_pci_sriov_configure(struct pci_dev * dev,int num_vfs)3203 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3204 {
3205 int rc;
3206 struct efx_nic *efx = pci_get_drvdata(dev);
3207
3208 if (efx->type->sriov_configure) {
3209 rc = efx->type->sriov_configure(efx, num_vfs);
3210 if (rc)
3211 return rc;
3212 else
3213 return num_vfs;
3214 } else
3215 return -EOPNOTSUPP;
3216 }
3217 #endif
3218
efx_pm_freeze(struct device * dev)3219 static int efx_pm_freeze(struct device *dev)
3220 {
3221 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3222
3223 rtnl_lock();
3224
3225 if (efx->state != STATE_DISABLED) {
3226 efx->state = STATE_UNINIT;
3227
3228 efx_device_detach_sync(efx);
3229
3230 efx_stop_all(efx);
3231 efx_disable_interrupts(efx);
3232 }
3233
3234 rtnl_unlock();
3235
3236 return 0;
3237 }
3238
efx_pm_thaw(struct device * dev)3239 static int efx_pm_thaw(struct device *dev)
3240 {
3241 int rc;
3242 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3243
3244 rtnl_lock();
3245
3246 if (efx->state != STATE_DISABLED) {
3247 rc = efx_enable_interrupts(efx);
3248 if (rc)
3249 goto fail;
3250
3251 mutex_lock(&efx->mac_lock);
3252 efx->phy_op->reconfigure(efx);
3253 mutex_unlock(&efx->mac_lock);
3254
3255 efx_start_all(efx);
3256
3257 netif_device_attach(efx->net_dev);
3258
3259 efx->state = STATE_READY;
3260
3261 efx->type->resume_wol(efx);
3262 }
3263
3264 rtnl_unlock();
3265
3266 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3267 queue_work(reset_workqueue, &efx->reset_work);
3268
3269 return 0;
3270
3271 fail:
3272 rtnl_unlock();
3273
3274 return rc;
3275 }
3276
efx_pm_poweroff(struct device * dev)3277 static int efx_pm_poweroff(struct device *dev)
3278 {
3279 struct pci_dev *pci_dev = to_pci_dev(dev);
3280 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3281
3282 efx->type->fini(efx);
3283
3284 efx->reset_pending = 0;
3285
3286 pci_save_state(pci_dev);
3287 return pci_set_power_state(pci_dev, PCI_D3hot);
3288 }
3289
3290 /* Used for both resume and restore */
efx_pm_resume(struct device * dev)3291 static int efx_pm_resume(struct device *dev)
3292 {
3293 struct pci_dev *pci_dev = to_pci_dev(dev);
3294 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3295 int rc;
3296
3297 rc = pci_set_power_state(pci_dev, PCI_D0);
3298 if (rc)
3299 return rc;
3300 pci_restore_state(pci_dev);
3301 rc = pci_enable_device(pci_dev);
3302 if (rc)
3303 return rc;
3304 pci_set_master(efx->pci_dev);
3305 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3306 if (rc)
3307 return rc;
3308 rc = efx->type->init(efx);
3309 if (rc)
3310 return rc;
3311 rc = efx_pm_thaw(dev);
3312 return rc;
3313 }
3314
efx_pm_suspend(struct device * dev)3315 static int efx_pm_suspend(struct device *dev)
3316 {
3317 int rc;
3318
3319 efx_pm_freeze(dev);
3320 rc = efx_pm_poweroff(dev);
3321 if (rc)
3322 efx_pm_resume(dev);
3323 return rc;
3324 }
3325
3326 static const struct dev_pm_ops efx_pm_ops = {
3327 .suspend = efx_pm_suspend,
3328 .resume = efx_pm_resume,
3329 .freeze = efx_pm_freeze,
3330 .thaw = efx_pm_thaw,
3331 .poweroff = efx_pm_poweroff,
3332 .restore = efx_pm_resume,
3333 };
3334
3335 /* A PCI error affecting this device was detected.
3336 * At this point MMIO and DMA may be disabled.
3337 * Stop the software path and request a slot reset.
3338 */
efx_io_error_detected(struct pci_dev * pdev,enum pci_channel_state state)3339 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3340 enum pci_channel_state state)
3341 {
3342 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3343 struct efx_nic *efx = pci_get_drvdata(pdev);
3344
3345 if (state == pci_channel_io_perm_failure)
3346 return PCI_ERS_RESULT_DISCONNECT;
3347
3348 rtnl_lock();
3349
3350 if (efx->state != STATE_DISABLED) {
3351 efx->state = STATE_RECOVERY;
3352 efx->reset_pending = 0;
3353
3354 efx_device_detach_sync(efx);
3355
3356 efx_stop_all(efx);
3357 efx_disable_interrupts(efx);
3358
3359 status = PCI_ERS_RESULT_NEED_RESET;
3360 } else {
3361 /* If the interface is disabled we don't want to do anything
3362 * with it.
3363 */
3364 status = PCI_ERS_RESULT_RECOVERED;
3365 }
3366
3367 rtnl_unlock();
3368
3369 pci_disable_device(pdev);
3370
3371 return status;
3372 }
3373
3374 /* Fake a successful reset, which will be performed later in efx_io_resume. */
efx_io_slot_reset(struct pci_dev * pdev)3375 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3376 {
3377 struct efx_nic *efx = pci_get_drvdata(pdev);
3378 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3379 int rc;
3380
3381 if (pci_enable_device(pdev)) {
3382 netif_err(efx, hw, efx->net_dev,
3383 "Cannot re-enable PCI device after reset.\n");
3384 status = PCI_ERS_RESULT_DISCONNECT;
3385 }
3386
3387 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3388 if (rc) {
3389 netif_err(efx, hw, efx->net_dev,
3390 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3391 /* Non-fatal error. Continue. */
3392 }
3393
3394 return status;
3395 }
3396
3397 /* Perform the actual reset and resume I/O operations. */
efx_io_resume(struct pci_dev * pdev)3398 static void efx_io_resume(struct pci_dev *pdev)
3399 {
3400 struct efx_nic *efx = pci_get_drvdata(pdev);
3401 int rc;
3402
3403 rtnl_lock();
3404
3405 if (efx->state == STATE_DISABLED)
3406 goto out;
3407
3408 rc = efx_reset(efx, RESET_TYPE_ALL);
3409 if (rc) {
3410 netif_err(efx, hw, efx->net_dev,
3411 "efx_reset failed after PCI error (%d)\n", rc);
3412 } else {
3413 efx->state = STATE_READY;
3414 netif_dbg(efx, hw, efx->net_dev,
3415 "Done resetting and resuming IO after PCI error.\n");
3416 }
3417
3418 out:
3419 rtnl_unlock();
3420 }
3421
3422 /* For simplicity and reliability, we always require a slot reset and try to
3423 * reset the hardware when a pci error affecting the device is detected.
3424 * We leave both the link_reset and mmio_enabled callback unimplemented:
3425 * with our request for slot reset the mmio_enabled callback will never be
3426 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3427 */
3428 static const struct pci_error_handlers efx_err_handlers = {
3429 .error_detected = efx_io_error_detected,
3430 .slot_reset = efx_io_slot_reset,
3431 .resume = efx_io_resume,
3432 };
3433
3434 static struct pci_driver efx_pci_driver = {
3435 .name = KBUILD_MODNAME,
3436 .id_table = efx_pci_table,
3437 .probe = efx_pci_probe,
3438 .remove = efx_pci_remove,
3439 .driver.pm = &efx_pm_ops,
3440 .err_handler = &efx_err_handlers,
3441 #ifdef CONFIG_SFC_SRIOV
3442 .sriov_configure = efx_pci_sriov_configure,
3443 #endif
3444 };
3445
3446 /**************************************************************************
3447 *
3448 * Kernel module interface
3449 *
3450 *************************************************************************/
3451
3452 module_param(interrupt_mode, uint, 0444);
3453 MODULE_PARM_DESC(interrupt_mode,
3454 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3455
efx_init_module(void)3456 static int __init efx_init_module(void)
3457 {
3458 int rc;
3459
3460 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3461
3462 rc = register_netdevice_notifier(&efx_netdev_notifier);
3463 if (rc)
3464 goto err_notifier;
3465
3466 #ifdef CONFIG_SFC_SRIOV
3467 rc = efx_init_sriov();
3468 if (rc)
3469 goto err_sriov;
3470 #endif
3471
3472 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3473 if (!reset_workqueue) {
3474 rc = -ENOMEM;
3475 goto err_reset;
3476 }
3477
3478 rc = pci_register_driver(&efx_pci_driver);
3479 if (rc < 0)
3480 goto err_pci;
3481
3482 return 0;
3483
3484 err_pci:
3485 destroy_workqueue(reset_workqueue);
3486 err_reset:
3487 #ifdef CONFIG_SFC_SRIOV
3488 efx_fini_sriov();
3489 err_sriov:
3490 #endif
3491 unregister_netdevice_notifier(&efx_netdev_notifier);
3492 err_notifier:
3493 return rc;
3494 }
3495
efx_exit_module(void)3496 static void __exit efx_exit_module(void)
3497 {
3498 printk(KERN_INFO "Solarflare NET driver unloading\n");
3499
3500 pci_unregister_driver(&efx_pci_driver);
3501 destroy_workqueue(reset_workqueue);
3502 #ifdef CONFIG_SFC_SRIOV
3503 efx_fini_sriov();
3504 #endif
3505 unregister_netdevice_notifier(&efx_netdev_notifier);
3506
3507 }
3508
3509 module_init(efx_init_module);
3510 module_exit(efx_exit_module);
3511
3512 MODULE_AUTHOR("Solarflare Communications and "
3513 "Michael Brown <mbrown@fensystems.co.uk>");
3514 MODULE_DESCRIPTION("Solarflare network driver");
3515 MODULE_LICENSE("GPL");
3516 MODULE_DEVICE_TABLE(pci, efx_pci_table);
3517