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1 /*
2  * Copyright (C) 2014 Imagination Technologies
3  * Author: Paul Burton <paul.burton@imgtec.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation;  either version 2 of the  License, or (at your
8  * option) any later version.
9  */
10 
11 #include <linux/binfmts.h>
12 #include <linux/elf.h>
13 #include <linux/export.h>
14 #include <linux/sched.h>
15 
16 #include <asm/cpu-features.h>
17 #include <asm/cpu-info.h>
18 
19 /* Whether to accept legacy-NaN and 2008-NaN user binaries.  */
20 bool mips_use_nan_legacy;
21 bool mips_use_nan_2008;
22 
23 /* FPU modes */
24 enum {
25 	FP_FRE,
26 	FP_FR0,
27 	FP_FR1,
28 };
29 
30 /**
31  * struct mode_req - ABI FPU mode requirements
32  * @single:	The program being loaded needs an FPU but it will only issue
33  *		single precision instructions meaning that it can execute in
34  *		either FR0 or FR1.
35  * @soft:	The soft(-float) requirement means that the program being
36  *		loaded needs has no FPU dependency at all (i.e. it has no
37  *		FPU instructions).
38  * @fr1:	The program being loaded depends on FPU being in FR=1 mode.
39  * @frdefault:	The program being loaded depends on the default FPU mode.
40  *		That is FR0 for O32 and FR1 for N32/N64.
41  * @fre:	The program being loaded depends on FPU with FRE=1. This mode is
42  *		a bridge which uses FR=1 whilst still being able to maintain
43  *		full compatibility with pre-existing code using the O32 FP32
44  *		ABI.
45  *
46  * More information about the FP ABIs can be found here:
47  *
48  * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
49  *
50  */
51 
52 struct mode_req {
53 	bool single;
54 	bool soft;
55 	bool fr1;
56 	bool frdefault;
57 	bool fre;
58 };
59 
60 static const struct mode_req fpu_reqs[] = {
61 	[MIPS_ABI_FP_ANY]    = { true,  true,  true,  true,  true  },
62 	[MIPS_ABI_FP_DOUBLE] = { false, false, false, true,  true  },
63 	[MIPS_ABI_FP_SINGLE] = { true,  false, false, false, false },
64 	[MIPS_ABI_FP_SOFT]   = { false, true,  false, false, false },
65 	[MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
66 	[MIPS_ABI_FP_XX]     = { false, false, true,  true,  true  },
67 	[MIPS_ABI_FP_64]     = { false, false, true,  false, false },
68 	[MIPS_ABI_FP_64A]    = { false, false, true,  false, true  }
69 };
70 
71 /*
72  * Mode requirements when .MIPS.abiflags is not present in the ELF.
73  * Not present means that everything is acceptable except FR1.
74  */
75 static struct mode_req none_req = { true, true, false, true, true };
76 
arch_elf_pt_proc(void * _ehdr,void * _phdr,struct file * elf,bool is_interp,struct arch_elf_state * state)77 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
78 		     bool is_interp, struct arch_elf_state *state)
79 {
80 	union {
81 		struct elf32_hdr e32;
82 		struct elf64_hdr e64;
83 	} *ehdr = _ehdr;
84 	struct elf32_phdr *phdr32 = _phdr;
85 	struct elf64_phdr *phdr64 = _phdr;
86 	struct mips_elf_abiflags_v0 abiflags;
87 	bool elf32;
88 	u32 flags;
89 	int ret;
90 
91 	elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
92 	flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
93 
94 	/* Let's see if this is an O32 ELF */
95 	if (elf32) {
96 		if (flags & EF_MIPS_FP64) {
97 			/*
98 			 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
99 			 * later if needed
100 			 */
101 			if (is_interp)
102 				state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
103 			else
104 				state->fp_abi = MIPS_ABI_FP_OLD_64;
105 		}
106 		if (phdr32->p_type != PT_MIPS_ABIFLAGS)
107 			return 0;
108 
109 		if (phdr32->p_filesz < sizeof(abiflags))
110 			return -EINVAL;
111 
112 		ret = kernel_read(elf, phdr32->p_offset,
113 				  (char *)&abiflags,
114 				  sizeof(abiflags));
115 	} else {
116 		if (phdr64->p_type != PT_MIPS_ABIFLAGS)
117 			return 0;
118 		if (phdr64->p_filesz < sizeof(abiflags))
119 			return -EINVAL;
120 
121 		ret = kernel_read(elf, phdr64->p_offset,
122 				  (char *)&abiflags,
123 				  sizeof(abiflags));
124 	}
125 
126 	if (ret < 0)
127 		return ret;
128 	if (ret != sizeof(abiflags))
129 		return -EIO;
130 
131 	/* Record the required FP ABIs for use by mips_check_elf */
132 	if (is_interp)
133 		state->interp_fp_abi = abiflags.fp_abi;
134 	else
135 		state->fp_abi = abiflags.fp_abi;
136 
137 	return 0;
138 }
139 
arch_check_elf(void * _ehdr,bool has_interpreter,void * _interp_ehdr,struct arch_elf_state * state)140 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
141 		   struct arch_elf_state *state)
142 {
143 	union {
144 		struct elf32_hdr e32;
145 		struct elf64_hdr e64;
146 	} *ehdr = _ehdr;
147 	union {
148 		struct elf32_hdr e32;
149 		struct elf64_hdr e64;
150 	} *iehdr = _interp_ehdr;
151 	struct mode_req prog_req, interp_req;
152 	int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
153 	bool elf32;
154 	u32 flags;
155 
156 	elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
157 	flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
158 
159 	/*
160 	 * Determine the NaN personality, reject the binary if not allowed.
161 	 * Also ensure that any interpreter matches the executable.
162 	 */
163 	if (flags & EF_MIPS_NAN2008) {
164 		if (mips_use_nan_2008)
165 			state->nan_2008 = 1;
166 		else
167 			return -ENOEXEC;
168 	} else {
169 		if (mips_use_nan_legacy)
170 			state->nan_2008 = 0;
171 		else
172 			return -ENOEXEC;
173 	}
174 	if (has_interpreter) {
175 		bool ielf32;
176 		u32 iflags;
177 
178 		ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
179 		iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags;
180 
181 		if ((flags ^ iflags) & EF_MIPS_NAN2008)
182 			return -ELIBBAD;
183 	}
184 
185 	if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
186 		return 0;
187 
188 	fp_abi = state->fp_abi;
189 
190 	if (has_interpreter) {
191 		interp_fp_abi = state->interp_fp_abi;
192 
193 		abi0 = min(fp_abi, interp_fp_abi);
194 		abi1 = max(fp_abi, interp_fp_abi);
195 	} else {
196 		abi0 = abi1 = fp_abi;
197 	}
198 
199 	if (elf32 && !(flags & EF_MIPS_ABI2)) {
200 		/* Default to a mode capable of running code expecting FR=0 */
201 		state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
202 
203 		/* Allow all ABIs we know about */
204 		max_abi = MIPS_ABI_FP_64A;
205 	} else {
206 		/* MIPS64 code always uses FR=1, thus the default is easy */
207 		state->overall_fp_mode = FP_FR1;
208 
209 		/* Disallow access to the various FPXX & FP64 ABIs */
210 		max_abi = MIPS_ABI_FP_SOFT;
211 	}
212 
213 	if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
214 	    (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
215 		return -ELIBBAD;
216 
217 	/* It's time to determine the FPU mode requirements */
218 	prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
219 	interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
220 
221 	/*
222 	 * Check whether the program's and interp's ABIs have a matching FPU
223 	 * mode requirement.
224 	 */
225 	prog_req.single = interp_req.single && prog_req.single;
226 	prog_req.soft = interp_req.soft && prog_req.soft;
227 	prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
228 	prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
229 	prog_req.fre = interp_req.fre && prog_req.fre;
230 
231 	/*
232 	 * Determine the desired FPU mode
233 	 *
234 	 * Decision making:
235 	 *
236 	 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
237 	 *   means that we have a combination of program and interpreter
238 	 *   that inherently require the hybrid FP mode.
239 	 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
240 	 *   fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
241 	 *   instructions so we don't care about the mode. We will simply use
242 	 *   the one preferred by the hardware. In fpxx case, that ABI can
243 	 *   handle both FR=1 and FR=0, so, again, we simply choose the one
244 	 *   preferred by the hardware. Next, if we only use single-precision
245 	 *   FPU instructions, and the default ABI FPU mode is not good
246 	 *   (ie single + any ABI combination), we set again the FPU mode to the
247 	 *   one is preferred by the hardware. Next, if we know that the code
248 	 *   will only use single-precision instructions, shown by single being
249 	 *   true but frdefault being false, then we again set the FPU mode to
250 	 *   the one that is preferred by the hardware.
251 	 * - We want FP_FR1 if that's the only matching mode and the default one
252 	 *   is not good.
253 	 * - Return with -ELIBADD if we can't find a matching FPU mode.
254 	 */
255 	if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
256 		state->overall_fp_mode = FP_FRE;
257 	else if ((prog_req.fr1 && prog_req.frdefault) ||
258 		 (prog_req.single && !prog_req.frdefault))
259 		/* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
260 		state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
261 					  cpu_has_mips_r2_r6) ?
262 					  FP_FR1 : FP_FR0;
263 	else if (prog_req.fr1)
264 		state->overall_fp_mode = FP_FR1;
265 	else  if (!prog_req.fre && !prog_req.frdefault &&
266 		  !prog_req.fr1 && !prog_req.single && !prog_req.soft)
267 		return -ELIBBAD;
268 
269 	return 0;
270 }
271 
set_thread_fp_mode(int hybrid,int regs32)272 static inline void set_thread_fp_mode(int hybrid, int regs32)
273 {
274 	if (hybrid)
275 		set_thread_flag(TIF_HYBRID_FPREGS);
276 	else
277 		clear_thread_flag(TIF_HYBRID_FPREGS);
278 	if (regs32)
279 		set_thread_flag(TIF_32BIT_FPREGS);
280 	else
281 		clear_thread_flag(TIF_32BIT_FPREGS);
282 }
283 
mips_set_personality_fp(struct arch_elf_state * state)284 void mips_set_personality_fp(struct arch_elf_state *state)
285 {
286 	/*
287 	 * This function is only ever called for O32 ELFs so we should
288 	 * not be worried about N32/N64 binaries.
289 	 */
290 
291 	if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
292 		return;
293 
294 	switch (state->overall_fp_mode) {
295 	case FP_FRE:
296 		set_thread_fp_mode(1, 0);
297 		break;
298 	case FP_FR0:
299 		set_thread_fp_mode(0, 1);
300 		break;
301 	case FP_FR1:
302 		set_thread_fp_mode(0, 0);
303 		break;
304 	default:
305 		BUG();
306 	}
307 }
308 
309 /*
310  * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
311  * in FCSR according to the ELF NaN personality.
312  */
mips_set_personality_nan(struct arch_elf_state * state)313 void mips_set_personality_nan(struct arch_elf_state *state)
314 {
315 	struct cpuinfo_mips *c = &boot_cpu_data;
316 	struct task_struct *t = current;
317 
318 	t->thread.fpu.fcr31 = c->fpu_csr31;
319 	switch (state->nan_2008) {
320 	case 0:
321 		break;
322 	case 1:
323 		if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
324 			t->thread.fpu.fcr31 |= FPU_CSR_NAN2008;
325 		if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
326 			t->thread.fpu.fcr31 |= FPU_CSR_ABS2008;
327 		break;
328 	default:
329 		BUG();
330 	}
331 }
332 
333 static int noexec = EXSTACK_DEFAULT;
334 
335 /*
336  * kernel parameter: noexec=on|off
337  *
338  * Force indicating stack and heap as non-executable or
339  * executable regardless of PT_GNU_STACK entry or CPU XI
340  * (execute inhibit) support. Valid valuess are: on, off.
341  *
342  * noexec=on:  force indicating non-executable
343  *             stack and heap
344  * noexec=off: force indicating executable
345  *             stack and heap
346  *
347  * If this parameter is omitted, stack and heap will be
348  * indicated non-executable or executable as they are
349  * actually set up, which depends on PT_GNU_STACK entry
350  * and possibly other factors (for instance, CPU XI
351  * support).
352  *
353  * NOTE: Using noexec=on on a system without CPU XI
354  * support is not recommended since there is no actual
355  * HW support that provide non-executable stack/heap.
356  * Use only for debugging purposes and not in a
357  * production environment.
358  */
noexec_setup(char * str)359 static int __init noexec_setup(char *str)
360 {
361 	if (!strcmp(str, "on"))
362 		noexec = EXSTACK_DISABLE_X;
363 	else if (!strcmp(str, "off"))
364 		noexec = EXSTACK_ENABLE_X;
365 	else
366 		pr_err("Malformed noexec format! noexec=on|off\n");
367 
368 	return 1;
369 }
370 __setup("noexec=", noexec_setup);
371 
mips_elf_read_implies_exec(void * elf_ex,int exstack)372 int mips_elf_read_implies_exec(void *elf_ex, int exstack)
373 {
374 	switch (noexec) {
375 	case EXSTACK_DISABLE_X:
376 		return 0;
377 	case EXSTACK_ENABLE_X:
378 		return 1;
379 	default:
380 		break;
381 	}
382 
383 	if (exstack != EXSTACK_DISABLE_X) {
384 		/* The binary doesn't request a non-executable stack */
385 		return 1;
386 	}
387 
388 	if (!cpu_has_rixi) {
389 		/* The CPU doesn't support non-executable memory */
390 		return 1;
391 	}
392 
393 	return 0;
394 }
395 EXPORT_SYMBOL(mips_elf_read_implies_exec);
396