1 /*
2 * x86 FPU boot time init code:
3 */
4 #include <asm/fpu/internal.h>
5 #include <asm/tlbflush.h>
6 #include <asm/setup.h>
7 #include <asm/cmdline.h>
8
9 #include <linux/sched.h>
10 #include <linux/init.h>
11
12 /*
13 * Initialize the TS bit in CR0 according to the style of context-switches
14 * we are using:
15 */
fpu__init_cpu_ctx_switch(void)16 static void fpu__init_cpu_ctx_switch(void)
17 {
18 clts();
19 }
20
21 /*
22 * Initialize the registers found in all CPUs, CR0 and CR4:
23 */
fpu__init_cpu_generic(void)24 static void fpu__init_cpu_generic(void)
25 {
26 unsigned long cr0;
27 unsigned long cr4_mask = 0;
28
29 if (cpu_has_fxsr)
30 cr4_mask |= X86_CR4_OSFXSR;
31 if (cpu_has_xmm)
32 cr4_mask |= X86_CR4_OSXMMEXCPT;
33 if (cr4_mask)
34 cr4_set_bits(cr4_mask);
35
36 cr0 = read_cr0();
37 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
38 if (!cpu_has_fpu)
39 cr0 |= X86_CR0_EM;
40 write_cr0(cr0);
41
42 /* Flush out any pending x87 state: */
43 #ifdef CONFIG_MATH_EMULATION
44 if (!cpu_has_fpu)
45 fpstate_init_soft(¤t->thread.fpu.state.soft);
46 else
47 #endif
48 asm volatile ("fninit");
49 }
50
51 /*
52 * Enable all supported FPU features. Called when a CPU is brought online:
53 */
fpu__init_cpu(void)54 void fpu__init_cpu(void)
55 {
56 fpu__init_cpu_generic();
57 fpu__init_cpu_xstate();
58 fpu__init_cpu_ctx_switch();
59 }
60
61 /*
62 * The earliest FPU detection code.
63 *
64 * Set the X86_FEATURE_FPU CPU-capability bit based on
65 * trying to execute an actual sequence of FPU instructions:
66 */
fpu__init_system_early_generic(struct cpuinfo_x86 * c)67 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
68 {
69 unsigned long cr0;
70 u16 fsw, fcw;
71
72 fsw = fcw = 0xffff;
73
74 cr0 = read_cr0();
75 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
76 write_cr0(cr0);
77
78 if (!test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
79 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
80 : "+m" (fsw), "+m" (fcw));
81
82 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
83 set_cpu_cap(c, X86_FEATURE_FPU);
84 else
85 clear_cpu_cap(c, X86_FEATURE_FPU);
86 }
87
88 #ifndef CONFIG_MATH_EMULATION
89 if (!cpu_has_fpu) {
90 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
91 for (;;)
92 asm volatile("hlt");
93 }
94 #endif
95 }
96
97 /*
98 * Boot time FPU feature detection code:
99 */
100 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
101 EXPORT_SYMBOL_GPL(mxcsr_feature_mask);
102
fpu__init_system_mxcsr(void)103 static void __init fpu__init_system_mxcsr(void)
104 {
105 unsigned int mask = 0;
106
107 if (cpu_has_fxsr) {
108 /* Static because GCC does not get 16-byte stack alignment right: */
109 static struct fxregs_state fxregs __initdata;
110
111 asm volatile("fxsave %0" : "+m" (fxregs));
112
113 mask = fxregs.mxcsr_mask;
114
115 /*
116 * If zero then use the default features mask,
117 * which has all features set, except the
118 * denormals-are-zero feature bit:
119 */
120 if (mask == 0)
121 mask = 0x0000ffbf;
122 }
123 mxcsr_feature_mask &= mask;
124 }
125
126 /*
127 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
128 */
fpu__init_system_generic(void)129 static void __init fpu__init_system_generic(void)
130 {
131 /*
132 * Set up the legacy init FPU context. (xstate init might overwrite this
133 * with a more modern format, if the CPU supports it.)
134 */
135 fpstate_init(&init_fpstate);
136
137 fpu__init_system_mxcsr();
138 }
139
140 /*
141 * Size of the FPU context state. All tasks in the system use the
142 * same context size, regardless of what portion they use.
143 * This is inherent to the XSAVE architecture which puts all state
144 * components into a single, continuous memory block:
145 */
146 unsigned int xstate_size;
147 EXPORT_SYMBOL_GPL(xstate_size);
148
149 /* Enforce that 'MEMBER' is the last field of 'TYPE': */
150 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
151 BUILD_BUG_ON(sizeof(TYPE) != offsetofend(TYPE, MEMBER))
152
153 /*
154 * We append the 'struct fpu' to the task_struct:
155 */
fpu__init_task_struct_size(void)156 static void __init fpu__init_task_struct_size(void)
157 {
158 int task_size = sizeof(struct task_struct);
159
160 /*
161 * Subtract off the static size of the register state.
162 * It potentially has a bunch of padding.
163 */
164 task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state);
165
166 /*
167 * Add back the dynamically-calculated register state
168 * size.
169 */
170 task_size += xstate_size;
171
172 /*
173 * We dynamically size 'struct fpu', so we require that
174 * it be at the end of 'thread_struct' and that
175 * 'thread_struct' be at the end of 'task_struct'. If
176 * you hit a compile error here, check the structure to
177 * see if something got added to the end.
178 */
179 CHECK_MEMBER_AT_END_OF(struct fpu, state);
180 CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
181 CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
182
183 arch_task_struct_size = task_size;
184 }
185
186 /*
187 * Set up the xstate_size based on the legacy FPU context size.
188 *
189 * We set this up first, and later it will be overwritten by
190 * fpu__init_system_xstate() if the CPU knows about xstates.
191 */
fpu__init_system_xstate_size_legacy(void)192 static void __init fpu__init_system_xstate_size_legacy(void)
193 {
194 static int on_boot_cpu = 1;
195
196 WARN_ON_FPU(!on_boot_cpu);
197 on_boot_cpu = 0;
198
199 /*
200 * Note that xstate_size might be overwriten later during
201 * fpu__init_system_xstate().
202 */
203
204 if (!cpu_has_fpu) {
205 /*
206 * Disable xsave as we do not support it if i387
207 * emulation is enabled.
208 */
209 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
210 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
211 xstate_size = sizeof(struct swregs_state);
212 } else {
213 if (cpu_has_fxsr)
214 xstate_size = sizeof(struct fxregs_state);
215 else
216 xstate_size = sizeof(struct fregs_state);
217 }
218 /*
219 * Quirk: we don't yet handle the XSAVES* instructions
220 * correctly, as we don't correctly convert between
221 * standard and compacted format when interfacing
222 * with user-space - so disable it for now.
223 *
224 * The difference is small: with recent CPUs the
225 * compacted format is only marginally smaller than
226 * the standard FPU state format.
227 *
228 * ( This is easy to backport while we are fixing
229 * XSAVES* support. )
230 */
231 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
232 }
233
234 /*
235 * Find supported xfeatures based on cpu features and command-line input.
236 * This must be called after fpu__init_parse_early_param() is called and
237 * xfeatures_mask is enumerated.
238 */
fpu__get_supported_xfeatures_mask(void)239 u64 __init fpu__get_supported_xfeatures_mask(void)
240 {
241 return XCNTXT_MASK;
242 }
243
244 /* Legacy code to initialize eager fpu mode. */
fpu__init_system_ctx_switch(void)245 static void __init fpu__init_system_ctx_switch(void)
246 {
247 static bool on_boot_cpu = 1;
248
249 WARN_ON_FPU(!on_boot_cpu);
250 on_boot_cpu = 0;
251
252 WARN_ON_FPU(current->thread.fpu.fpstate_active);
253 current_thread_info()->status = 0;
254 }
255
256 /*
257 * We parse fpu parameters early because fpu__init_system() is executed
258 * before parse_early_param().
259 */
fpu__init_parse_early_param(void)260 static void __init fpu__init_parse_early_param(void)
261 {
262 if (cmdline_find_option_bool(boot_command_line, "no387"))
263 setup_clear_cpu_cap(X86_FEATURE_FPU);
264
265 if (cmdline_find_option_bool(boot_command_line, "nofxsr")) {
266 setup_clear_cpu_cap(X86_FEATURE_FXSR);
267 setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
268 setup_clear_cpu_cap(X86_FEATURE_XMM);
269 }
270
271 if (cmdline_find_option_bool(boot_command_line, "noxsave"))
272 fpu__xstate_clear_all_cpu_caps();
273
274 if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
275 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
276
277 if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
278 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
279 }
280
281 /*
282 * Called on the boot CPU once per system bootup, to set up the initial
283 * FPU state that is later cloned into all processes:
284 */
fpu__init_system(struct cpuinfo_x86 * c)285 void __init fpu__init_system(struct cpuinfo_x86 *c)
286 {
287 fpu__init_parse_early_param();
288 fpu__init_system_early_generic(c);
289
290 /*
291 * The FPU has to be operational for some of the
292 * later FPU init activities:
293 */
294 fpu__init_cpu();
295
296 /*
297 * But don't leave CR0::TS set yet, as some of the FPU setup
298 * methods depend on being able to execute FPU instructions
299 * that will fault on a set TS, such as the FXSAVE in
300 * fpu__init_system_mxcsr().
301 */
302 clts();
303
304 fpu__init_system_generic();
305 fpu__init_system_xstate_size_legacy();
306 fpu__init_system_xstate();
307 fpu__init_task_struct_size();
308
309 fpu__init_system_ctx_switch();
310 }
311