1 /*
2 * host.c - ChipIdea USB host controller driver
3 *
4 * Copyright (c) 2012 Intel Corporation
5 *
6 * Author: Alexander Shishkin
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/io.h>
24 #include <linux/usb.h>
25 #include <linux/usb/hcd.h>
26 #include <linux/usb/chipidea.h>
27 #include <linux/regulator/consumer.h>
28
29 #include "../host/ehci.h"
30
31 #include "ci.h"
32 #include "bits.h"
33 #include "host.h"
34
35 static struct hc_driver __read_mostly ci_ehci_hc_driver;
36 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
37
38 struct ehci_ci_priv {
39 struct regulator *reg_vbus;
40 bool enabled;
41 };
42
ehci_ci_portpower(struct usb_hcd * hcd,int portnum,bool enable)43 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
44 {
45 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
46 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
47 struct device *dev = hcd->self.controller;
48 struct ci_hdrc *ci = dev_get_drvdata(dev);
49 int ret = 0;
50 int port = HCS_N_PORTS(ehci->hcs_params);
51
52 if (priv->reg_vbus && enable != priv->enabled) {
53 if (port > 1) {
54 dev_warn(dev,
55 "Not support multi-port regulator control\n");
56 return 0;
57 }
58 if (enable)
59 ret = regulator_enable(priv->reg_vbus);
60 else
61 ret = regulator_disable(priv->reg_vbus);
62 if (ret) {
63 dev_err(dev,
64 "Failed to %s vbus regulator, ret=%d\n",
65 enable ? "enable" : "disable", ret);
66 return ret;
67 }
68 priv->enabled = enable;
69 }
70
71 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
72 /*
73 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
74 * As HSIC is always HS, this should be safe for others.
75 */
76 hw_port_test_set(ci, 5);
77 hw_port_test_set(ci, 0);
78 }
79 return 0;
80 };
81
ehci_ci_reset(struct usb_hcd * hcd)82 static int ehci_ci_reset(struct usb_hcd *hcd)
83 {
84 struct device *dev = hcd->self.controller;
85 struct ci_hdrc *ci = dev_get_drvdata(dev);
86 int ret;
87
88 ret = ehci_setup(hcd);
89 if (ret)
90 return ret;
91
92 ci_platform_configure(ci);
93
94 return ret;
95 }
96
97 static const struct ehci_driver_overrides ehci_ci_overrides = {
98 .extra_priv_size = sizeof(struct ehci_ci_priv),
99 .port_power = ehci_ci_portpower,
100 .reset = ehci_ci_reset,
101 };
102
host_irq(struct ci_hdrc * ci)103 static irqreturn_t host_irq(struct ci_hdrc *ci)
104 {
105 return usb_hcd_irq(ci->irq, ci->hcd);
106 }
107
host_start(struct ci_hdrc * ci)108 static int host_start(struct ci_hdrc *ci)
109 {
110 struct usb_hcd *hcd;
111 struct ehci_hcd *ehci;
112 struct ehci_ci_priv *priv;
113 int ret;
114
115 if (usb_disabled())
116 return -ENODEV;
117
118 hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev));
119 if (!hcd)
120 return -ENOMEM;
121
122 dev_set_drvdata(ci->dev, ci);
123 hcd->rsrc_start = ci->hw_bank.phys;
124 hcd->rsrc_len = ci->hw_bank.size;
125 hcd->regs = ci->hw_bank.abs;
126 hcd->has_tt = 1;
127
128 hcd->power_budget = ci->platdata->power_budget;
129 hcd->tpl_support = ci->platdata->tpl_support;
130 if (ci->phy)
131 hcd->phy = ci->phy;
132 else
133 hcd->usb_phy = ci->usb_phy;
134
135 ehci = hcd_to_ehci(hcd);
136 ehci->caps = ci->hw_bank.cap;
137 ehci->has_hostpc = ci->hw_bank.lpm;
138 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
139 ehci->imx28_write_fix = ci->imx28_write_fix;
140
141 priv = (struct ehci_ci_priv *)ehci->priv;
142 priv->reg_vbus = NULL;
143
144 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
145 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
146 ret = regulator_enable(ci->platdata->reg_vbus);
147 if (ret) {
148 dev_err(ci->dev,
149 "Failed to enable vbus regulator, ret=%d\n",
150 ret);
151 goto put_hcd;
152 }
153 } else {
154 priv->reg_vbus = ci->platdata->reg_vbus;
155 }
156 }
157
158 ret = usb_add_hcd(hcd, 0, 0);
159 if (ret) {
160 goto disable_reg;
161 } else {
162 struct usb_otg *otg = &ci->otg;
163
164 ci->hcd = hcd;
165
166 if (ci_otg_is_fsm_mode(ci)) {
167 otg->host = &hcd->self;
168 hcd->self.otg_port = 1;
169 }
170 }
171
172 return ret;
173
174 disable_reg:
175 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
176 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
177 regulator_disable(ci->platdata->reg_vbus);
178 put_hcd:
179 usb_put_hcd(hcd);
180
181 return ret;
182 }
183
host_stop(struct ci_hdrc * ci)184 static void host_stop(struct ci_hdrc *ci)
185 {
186 struct usb_hcd *hcd = ci->hcd;
187
188 if (hcd) {
189 usb_remove_hcd(hcd);
190 usb_put_hcd(hcd);
191 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
192 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
193 regulator_disable(ci->platdata->reg_vbus);
194 }
195 }
196
197
ci_hdrc_host_destroy(struct ci_hdrc * ci)198 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
199 {
200 if (ci->role == CI_ROLE_HOST && ci->hcd)
201 host_stop(ci);
202 }
203
ci_ehci_bus_suspend(struct usb_hcd * hcd)204 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
205 {
206 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
207 int port;
208 u32 tmp;
209
210 int ret = orig_bus_suspend(hcd);
211
212 if (ret)
213 return ret;
214
215 port = HCS_N_PORTS(ehci->hcs_params);
216 while (port--) {
217 u32 __iomem *reg = &ehci->regs->port_status[port];
218 u32 portsc = ehci_readl(ehci, reg);
219
220 if (portsc & PORT_CONNECT) {
221 /*
222 * For chipidea, the resume signal will be ended
223 * automatically, so for remote wakeup case, the
224 * usbcmd.rs may not be set before the resume has
225 * ended if other resume paths consumes too much
226 * time (~24ms), in that case, the SOF will not
227 * send out within 3ms after resume ends, then the
228 * high speed device will enter full speed mode.
229 */
230
231 tmp = ehci_readl(ehci, &ehci->regs->command);
232 tmp |= CMD_RUN;
233 ehci_writel(ehci, tmp, &ehci->regs->command);
234 /*
235 * It needs a short delay between set RS bit and PHCD.
236 */
237 usleep_range(150, 200);
238 break;
239 }
240 }
241
242 return 0;
243 }
244
ci_hdrc_host_init(struct ci_hdrc * ci)245 int ci_hdrc_host_init(struct ci_hdrc *ci)
246 {
247 struct ci_role_driver *rdrv;
248
249 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
250 return -ENXIO;
251
252 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
253 if (!rdrv)
254 return -ENOMEM;
255
256 rdrv->start = host_start;
257 rdrv->stop = host_stop;
258 rdrv->irq = host_irq;
259 rdrv->name = "host";
260 ci->roles[CI_ROLE_HOST] = rdrv;
261
262 return 0;
263 }
264
ci_hdrc_host_driver_init(void)265 void ci_hdrc_host_driver_init(void)
266 {
267 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
268 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
269 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
270 }
271