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1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of version 2 of the GNU General Public License as
13  * published by the Free Software Foundation.
14  *
15  * This program is distributed in the hope that it will be useful, but
16  * WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  * General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23  * USA
24  *
25  * The full GNU General Public License is included in this distribution
26  * in the file called COPYING.
27  *
28  * Contact Information:
29  *  Intel Linux Wireless <ilw@linux.intel.com>
30  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31  *
32  * BSD LICENSE
33  *
34  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
35  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
36  * All rights reserved.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  *
42  *  * Redistributions of source code must retain the above copyright
43  *    notice, this list of conditions and the following disclaimer.
44  *  * Redistributions in binary form must reproduce the above copyright
45  *    notice, this list of conditions and the following disclaimer in
46  *    the documentation and/or other materials provided with the
47  *    distribution.
48  *  * Neither the name Intel Corporation nor the names of its
49  *    contributors may be used to endorse or promote products derived
50  *    from this software without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63  *
64  *****************************************************************************/
65 #include <linux/firmware.h>
66 #include <linux/rtnetlink.h>
67 #include <linux/pci.h>
68 #include <linux/acpi.h>
69 #include "iwl-trans.h"
70 #include "iwl-csr.h"
71 #include "mvm.h"
72 #include "iwl-eeprom-parse.h"
73 #include "iwl-eeprom-read.h"
74 #include "iwl-nvm-parse.h"
75 #include "iwl-prph.h"
76 
77 /* Default NVM size to read */
78 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
79 #define IWL_MAX_NVM_SECTION_SIZE	0x1b58
80 #define IWL_MAX_NVM_8000_SECTION_SIZE	0x1ffc
81 
82 #define NVM_WRITE_OPCODE 1
83 #define NVM_READ_OPCODE 0
84 
85 /* load nvm chunk response */
86 enum {
87 	READ_NVM_CHUNK_SUCCEED = 0,
88 	READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
89 };
90 
91 /*
92  * prepare the NVM host command w/ the pointers to the nvm buffer
93  * and send it to fw
94  */
iwl_nvm_write_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,const u8 * data)95 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
96 			       u16 offset, u16 length, const u8 *data)
97 {
98 	struct iwl_nvm_access_cmd nvm_access_cmd = {
99 		.offset = cpu_to_le16(offset),
100 		.length = cpu_to_le16(length),
101 		.type = cpu_to_le16(section),
102 		.op_code = NVM_WRITE_OPCODE,
103 	};
104 	struct iwl_host_cmd cmd = {
105 		.id = NVM_ACCESS_CMD,
106 		.len = { sizeof(struct iwl_nvm_access_cmd), length },
107 		.flags = CMD_SEND_IN_RFKILL,
108 		.data = { &nvm_access_cmd, data },
109 		/* data may come from vmalloc, so use _DUP */
110 		.dataflags = { 0, IWL_HCMD_DFL_DUP },
111 	};
112 
113 	return iwl_mvm_send_cmd(mvm, &cmd);
114 }
115 
iwl_nvm_read_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,u8 * data)116 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
117 			      u16 offset, u16 length, u8 *data)
118 {
119 	struct iwl_nvm_access_cmd nvm_access_cmd = {
120 		.offset = cpu_to_le16(offset),
121 		.length = cpu_to_le16(length),
122 		.type = cpu_to_le16(section),
123 		.op_code = NVM_READ_OPCODE,
124 	};
125 	struct iwl_nvm_access_resp *nvm_resp;
126 	struct iwl_rx_packet *pkt;
127 	struct iwl_host_cmd cmd = {
128 		.id = NVM_ACCESS_CMD,
129 		.flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
130 		.data = { &nvm_access_cmd, },
131 	};
132 	int ret, bytes_read, offset_read;
133 	u8 *resp_data;
134 
135 	cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
136 
137 	ret = iwl_mvm_send_cmd(mvm, &cmd);
138 	if (ret)
139 		return ret;
140 
141 	pkt = cmd.resp_pkt;
142 
143 	/* Extract NVM response */
144 	nvm_resp = (void *)pkt->data;
145 	ret = le16_to_cpu(nvm_resp->status);
146 	bytes_read = le16_to_cpu(nvm_resp->length);
147 	offset_read = le16_to_cpu(nvm_resp->offset);
148 	resp_data = nvm_resp->data;
149 	if (ret) {
150 		if ((offset != 0) &&
151 		    (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
152 			/*
153 			 * meaning of NOT_VALID_ADDRESS:
154 			 * driver try to read chunk from address that is
155 			 * multiple of 2K and got an error since addr is empty.
156 			 * meaning of (offset != 0): driver already
157 			 * read valid data from another chunk so this case
158 			 * is not an error.
159 			 */
160 			IWL_DEBUG_EEPROM(mvm->trans->dev,
161 					 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
162 					 offset);
163 			ret = 0;
164 		} else {
165 			IWL_DEBUG_EEPROM(mvm->trans->dev,
166 					 "NVM access command failed with status %d (device: %s)\n",
167 					 ret, mvm->cfg->name);
168 			ret = -EIO;
169 		}
170 		goto exit;
171 	}
172 
173 	if (offset_read != offset) {
174 		IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
175 			offset_read);
176 		ret = -EINVAL;
177 		goto exit;
178 	}
179 
180 	/* Write data to NVM */
181 	memcpy(data + offset, resp_data, bytes_read);
182 	ret = bytes_read;
183 
184 exit:
185 	iwl_free_resp(&cmd);
186 	return ret;
187 }
188 
iwl_nvm_write_section(struct iwl_mvm * mvm,u16 section,const u8 * data,u16 length)189 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
190 				 const u8 *data, u16 length)
191 {
192 	int offset = 0;
193 
194 	/* copy data in chunks of 2k (and remainder if any) */
195 
196 	while (offset < length) {
197 		int chunk_size, ret;
198 
199 		chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
200 				 length - offset);
201 
202 		ret = iwl_nvm_write_chunk(mvm, section, offset,
203 					  chunk_size, data + offset);
204 		if (ret < 0)
205 			return ret;
206 
207 		offset += chunk_size;
208 	}
209 
210 	return 0;
211 }
212 
213 /*
214  * Reads an NVM section completely.
215  * NICs prior to 7000 family doesn't have a real NVM, but just read
216  * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
217  * by uCode, we need to manually check in this case that we don't
218  * overflow and try to read more than the EEPROM size.
219  * For 7000 family NICs, we supply the maximal size we can read, and
220  * the uCode fills the response with as much data as we can,
221  * without overflowing, so no check is needed.
222  */
iwl_nvm_read_section(struct iwl_mvm * mvm,u16 section,u8 * data,u32 size_read)223 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
224 				u8 *data, u32 size_read)
225 {
226 	u16 length, offset = 0;
227 	int ret;
228 
229 	/* Set nvm section read length */
230 	length = IWL_NVM_DEFAULT_CHUNK_SIZE;
231 
232 	ret = length;
233 
234 	/* Read the NVM until exhausted (reading less than requested) */
235 	while (ret == length) {
236 		/* Check no memory assumptions fail and cause an overflow */
237 		if ((size_read + offset + length) >
238 		    mvm->cfg->base_params->eeprom_size) {
239 			IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
240 			return -ENOBUFS;
241 		}
242 
243 		ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
244 		if (ret < 0) {
245 			IWL_DEBUG_EEPROM(mvm->trans->dev,
246 					 "Cannot read NVM from section %d offset %d, length %d\n",
247 					 section, offset, length);
248 			return ret;
249 		}
250 		offset += ret;
251 	}
252 
253 	IWL_DEBUG_EEPROM(mvm->trans->dev,
254 			 "NVM section %d read completed\n", section);
255 	return offset;
256 }
257 
258 static struct iwl_nvm_data *
iwl_parse_nvm_sections(struct iwl_mvm * mvm)259 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
260 {
261 	struct iwl_nvm_section *sections = mvm->nvm_sections;
262 	const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
263 	bool lar_enabled;
264 	u32 mac_addr0, mac_addr1;
265 
266 	/* Checking for required sections */
267 	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
268 		if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
269 		    !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
270 			IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
271 			return NULL;
272 		}
273 	} else {
274 		/* SW and REGULATORY sections are mandatory */
275 		if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
276 		    !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
277 			IWL_ERR(mvm,
278 				"Can't parse empty family 8000 OTP/NVM sections\n");
279 			return NULL;
280 		}
281 		/* MAC_OVERRIDE or at least HW section must exist */
282 		if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
283 		    !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
284 			IWL_ERR(mvm,
285 				"Can't parse mac_address, empty sections\n");
286 			return NULL;
287 		}
288 
289 		/* PHY_SKU section is mandatory in B0 */
290 		if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
291 			IWL_ERR(mvm,
292 				"Can't parse phy_sku in B0, empty sections\n");
293 			return NULL;
294 		}
295 	}
296 
297 	if (WARN_ON(!mvm->cfg))
298 		return NULL;
299 
300 	/* read the mac address from WFMP registers */
301 	mac_addr0 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_0);
302 	mac_addr1 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_1);
303 
304 	hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
305 	sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
306 	calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
307 	regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
308 	mac_override =
309 		(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
310 	phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
311 
312 	lar_enabled = !iwlwifi_mod_params.lar_disable &&
313 		      fw_has_capa(&mvm->fw->ucode_capa,
314 				  IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
315 
316 	return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
317 				  regulatory, mac_override, phy_sku,
318 				  mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
319 				  lar_enabled, mac_addr0, mac_addr1,
320 				  mvm->trans->hw_id);
321 }
322 
323 #define MAX_NVM_FILE_LEN	16384
324 
325 /*
326  * Reads external NVM from a file into mvm->nvm_sections
327  *
328  * HOW TO CREATE THE NVM FILE FORMAT:
329  * ------------------------------
330  * 1. create hex file, format:
331  *      3800 -> header
332  *      0000 -> header
333  *      5a40 -> data
334  *
335  *   rev - 6 bit (word1)
336  *   len - 10 bit (word1)
337  *   id - 4 bit (word2)
338  *   rsv - 12 bit (word2)
339  *
340  * 2. flip 8bits with 8 bits per line to get the right NVM file format
341  *
342  * 3. create binary file from the hex file
343  *
344  * 4. save as "iNVM_xxx.bin" under /lib/firmware
345  */
iwl_mvm_read_external_nvm(struct iwl_mvm * mvm)346 static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
347 {
348 	int ret, section_size;
349 	u16 section_id;
350 	const struct firmware *fw_entry;
351 	const struct {
352 		__le16 word1;
353 		__le16 word2;
354 		u8 data[];
355 	} *file_sec;
356 	const u8 *eof, *temp;
357 	int max_section_size;
358 	const __le32 *dword_buff;
359 
360 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
361 #define NVM_WORD2_ID(x) (x >> 12)
362 #define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
363 #define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
364 #define NVM_HEADER_0	(0x2A504C54)
365 #define NVM_HEADER_1	(0x4E564D2A)
366 #define NVM_HEADER_SIZE	(4 * sizeof(u32))
367 
368 	IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
369 
370 	/* Maximal size depends on HW family and step */
371 	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
372 		max_section_size = IWL_MAX_NVM_SECTION_SIZE;
373 	else
374 		max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
375 
376 	/*
377 	 * Obtain NVM image via request_firmware. Since we already used
378 	 * request_firmware_nowait() for the firmware binary load and only
379 	 * get here after that we assume the NVM request can be satisfied
380 	 * synchronously.
381 	 */
382 	ret = request_firmware(&fw_entry, mvm->nvm_file_name,
383 			       mvm->trans->dev);
384 	if (ret) {
385 		IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
386 			mvm->nvm_file_name, ret);
387 		return ret;
388 	}
389 
390 	IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
391 		 mvm->nvm_file_name, fw_entry->size);
392 
393 	if (fw_entry->size > MAX_NVM_FILE_LEN) {
394 		IWL_ERR(mvm, "NVM file too large\n");
395 		ret = -EINVAL;
396 		goto out;
397 	}
398 
399 	eof = fw_entry->data + fw_entry->size;
400 	dword_buff = (__le32 *)fw_entry->data;
401 
402 	/* some NVM file will contain a header.
403 	 * The header is identified by 2 dwords header as follow:
404 	 * dword[0] = 0x2A504C54
405 	 * dword[1] = 0x4E564D2A
406 	 *
407 	 * This header must be skipped when providing the NVM data to the FW.
408 	 */
409 	if (fw_entry->size > NVM_HEADER_SIZE &&
410 	    dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
411 	    dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
412 		file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
413 		IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
414 		IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
415 			 le32_to_cpu(dword_buff[3]));
416 
417 		/* nvm file validation, dword_buff[2] holds the file version */
418 		if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
419 		     le32_to_cpu(dword_buff[2]) < 0xE4A) ||
420 		    (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
421 		     le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
422 			ret = -EFAULT;
423 			goto out;
424 		}
425 	} else {
426 		file_sec = (void *)fw_entry->data;
427 	}
428 
429 	while (true) {
430 		if (file_sec->data > eof) {
431 			IWL_ERR(mvm,
432 				"ERROR - NVM file too short for section header\n");
433 			ret = -EINVAL;
434 			break;
435 		}
436 
437 		/* check for EOF marker */
438 		if (!file_sec->word1 && !file_sec->word2) {
439 			ret = 0;
440 			break;
441 		}
442 
443 		if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
444 			section_size =
445 				2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
446 			section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
447 		} else {
448 			section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
449 						le16_to_cpu(file_sec->word2));
450 			section_id = NVM_WORD1_ID_FAMILY_8000(
451 						le16_to_cpu(file_sec->word1));
452 		}
453 
454 		if (section_size > max_section_size) {
455 			IWL_ERR(mvm, "ERROR - section too large (%d)\n",
456 				section_size);
457 			ret = -EINVAL;
458 			break;
459 		}
460 
461 		if (!section_size) {
462 			IWL_ERR(mvm, "ERROR - section empty\n");
463 			ret = -EINVAL;
464 			break;
465 		}
466 
467 		if (file_sec->data + section_size > eof) {
468 			IWL_ERR(mvm,
469 				"ERROR - NVM file too short for section (%d bytes)\n",
470 				section_size);
471 			ret = -EINVAL;
472 			break;
473 		}
474 
475 		if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
476 			 "Invalid NVM section ID %d\n", section_id)) {
477 			ret = -EINVAL;
478 			break;
479 		}
480 
481 		temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
482 		if (!temp) {
483 			ret = -ENOMEM;
484 			break;
485 		}
486 		kfree(mvm->nvm_sections[section_id].data);
487 		mvm->nvm_sections[section_id].data = temp;
488 		mvm->nvm_sections[section_id].length = section_size;
489 
490 		/* advance to the next section */
491 		file_sec = (void *)(file_sec->data + section_size);
492 	}
493 out:
494 	release_firmware(fw_entry);
495 	return ret;
496 }
497 
498 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
iwl_mvm_load_nvm_to_nic(struct iwl_mvm * mvm)499 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
500 {
501 	int i, ret = 0;
502 	struct iwl_nvm_section *sections = mvm->nvm_sections;
503 
504 	IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
505 
506 	for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
507 		if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
508 			continue;
509 		ret = iwl_nvm_write_section(mvm, i, sections[i].data,
510 					    sections[i].length);
511 		if (ret < 0) {
512 			IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
513 			break;
514 		}
515 	}
516 	return ret;
517 }
518 
iwl_nvm_init(struct iwl_mvm * mvm,bool read_nvm_from_nic)519 int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
520 {
521 	int ret, section;
522 	u32 size_read = 0;
523 	u8 *nvm_buffer, *temp;
524 	const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
525 	const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
526 
527 	if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
528 		return -EINVAL;
529 
530 	/* load NVM values from nic */
531 	if (read_nvm_from_nic) {
532 		/* Read From FW NVM */
533 		IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
534 
535 		nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
536 				     GFP_KERNEL);
537 		if (!nvm_buffer)
538 			return -ENOMEM;
539 		for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
540 			/* we override the constness for initial read */
541 			ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
542 						   size_read);
543 			if (ret < 0)
544 				continue;
545 			size_read += ret;
546 			temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
547 			if (!temp) {
548 				ret = -ENOMEM;
549 				break;
550 			}
551 			mvm->nvm_sections[section].data = temp;
552 			mvm->nvm_sections[section].length = ret;
553 
554 #ifdef CONFIG_IWLWIFI_DEBUGFS
555 			switch (section) {
556 			case NVM_SECTION_TYPE_SW:
557 				mvm->nvm_sw_blob.data = temp;
558 				mvm->nvm_sw_blob.size  = ret;
559 				break;
560 			case NVM_SECTION_TYPE_CALIBRATION:
561 				mvm->nvm_calib_blob.data = temp;
562 				mvm->nvm_calib_blob.size  = ret;
563 				break;
564 			case NVM_SECTION_TYPE_PRODUCTION:
565 				mvm->nvm_prod_blob.data = temp;
566 				mvm->nvm_prod_blob.size  = ret;
567 				break;
568 			case NVM_SECTION_TYPE_PHY_SKU:
569 				mvm->nvm_phy_sku_blob.data = temp;
570 				mvm->nvm_phy_sku_blob.size  = ret;
571 				break;
572 			default:
573 				if (section == mvm->cfg->nvm_hw_section_num) {
574 					mvm->nvm_hw_blob.data = temp;
575 					mvm->nvm_hw_blob.size = ret;
576 					break;
577 				}
578 			}
579 #endif
580 		}
581 		if (!size_read)
582 			IWL_ERR(mvm, "OTP is blank\n");
583 		kfree(nvm_buffer);
584 	}
585 
586 	/* Only if PNVM selected in the mod param - load external NVM  */
587 	if (mvm->nvm_file_name) {
588 		/* read External NVM file from the mod param */
589 		ret = iwl_mvm_read_external_nvm(mvm);
590 		if (ret) {
591 			/* choose the nvm_file name according to the
592 			 * HW step
593 			 */
594 			if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
595 			    SILICON_B_STEP)
596 				mvm->nvm_file_name = nvm_file_B;
597 			else
598 				mvm->nvm_file_name = nvm_file_C;
599 
600 			if (ret == -EFAULT && mvm->nvm_file_name) {
601 				/* in case nvm file was failed try again */
602 				ret = iwl_mvm_read_external_nvm(mvm);
603 				if (ret)
604 					return ret;
605 			} else {
606 				return ret;
607 			}
608 		}
609 	}
610 
611 	/* parse the relevant nvm sections */
612 	mvm->nvm_data = iwl_parse_nvm_sections(mvm);
613 	if (!mvm->nvm_data)
614 		return -ENODATA;
615 	IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
616 			 mvm->nvm_data->nvm_version);
617 
618 	return 0;
619 }
620 
621 struct iwl_mcc_update_resp *
iwl_mvm_update_mcc(struct iwl_mvm * mvm,const char * alpha2,enum iwl_mcc_source src_id)622 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
623 		   enum iwl_mcc_source src_id)
624 {
625 	struct iwl_mcc_update_cmd mcc_update_cmd = {
626 		.mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
627 		.source_id = (u8)src_id,
628 	};
629 	struct iwl_mcc_update_resp *mcc_resp, *resp_cp = NULL;
630 	struct iwl_rx_packet *pkt;
631 	struct iwl_host_cmd cmd = {
632 		.id = MCC_UPDATE_CMD,
633 		.flags = CMD_WANT_SKB,
634 		.data = { &mcc_update_cmd },
635 	};
636 
637 	int ret;
638 	u32 status;
639 	int resp_len, n_channels;
640 	u16 mcc;
641 
642 	if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
643 		return ERR_PTR(-EOPNOTSUPP);
644 
645 	cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
646 
647 	IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
648 		      alpha2[0], alpha2[1], src_id);
649 
650 	ret = iwl_mvm_send_cmd(mvm, &cmd);
651 	if (ret)
652 		return ERR_PTR(ret);
653 
654 	pkt = cmd.resp_pkt;
655 
656 	/* Extract MCC response */
657 	mcc_resp = (void *)pkt->data;
658 	status = le32_to_cpu(mcc_resp->status);
659 
660 	mcc = le16_to_cpu(mcc_resp->mcc);
661 
662 	/* W/A for a FW/NVM issue - returns 0x00 for the world domain */
663 	if (mcc == 0) {
664 		mcc = 0x3030;  /* "00" - world */
665 		mcc_resp->mcc = cpu_to_le16(mcc);
666 	}
667 
668 	n_channels =  __le32_to_cpu(mcc_resp->n_channels);
669 	IWL_DEBUG_LAR(mvm,
670 		      "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
671 		      status, mcc, mcc >> 8, mcc & 0xff, n_channels);
672 
673 	resp_len = sizeof(*mcc_resp) + n_channels * sizeof(__le32);
674 	resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
675 	if (!resp_cp) {
676 		ret = -ENOMEM;
677 		goto exit;
678 	}
679 
680 	ret = 0;
681 exit:
682 	iwl_free_resp(&cmd);
683 	if (ret)
684 		return ERR_PTR(ret);
685 	return resp_cp;
686 }
687 
688 #ifdef CONFIG_ACPI
689 #define WRD_METHOD		"WRDD"
690 #define WRDD_WIFI		(0x07)
691 #define WRDD_WIGIG		(0x10)
692 
iwl_mvm_wrdd_get_mcc(struct iwl_mvm * mvm,union acpi_object * wrdd)693 static u32 iwl_mvm_wrdd_get_mcc(struct iwl_mvm *mvm, union acpi_object *wrdd)
694 {
695 	union acpi_object *mcc_pkg, *domain_type, *mcc_value;
696 	u32 i;
697 
698 	if (wrdd->type != ACPI_TYPE_PACKAGE ||
699 	    wrdd->package.count < 2 ||
700 	    wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
701 	    wrdd->package.elements[0].integer.value != 0) {
702 		IWL_DEBUG_LAR(mvm, "Unsupported wrdd structure\n");
703 		return 0;
704 	}
705 
706 	for (i = 1 ; i < wrdd->package.count ; ++i) {
707 		mcc_pkg = &wrdd->package.elements[i];
708 
709 		if (mcc_pkg->type != ACPI_TYPE_PACKAGE ||
710 		    mcc_pkg->package.count < 2 ||
711 		    mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
712 		    mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
713 			mcc_pkg = NULL;
714 			continue;
715 		}
716 
717 		domain_type = &mcc_pkg->package.elements[0];
718 		if (domain_type->integer.value == WRDD_WIFI)
719 			break;
720 
721 		mcc_pkg = NULL;
722 	}
723 
724 	if (mcc_pkg) {
725 		mcc_value = &mcc_pkg->package.elements[1];
726 		return mcc_value->integer.value;
727 	}
728 
729 	return 0;
730 }
731 
iwl_mvm_get_bios_mcc(struct iwl_mvm * mvm,char * mcc)732 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
733 {
734 	acpi_handle root_handle;
735 	acpi_handle handle;
736 	struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
737 	acpi_status status;
738 	u32 mcc_val;
739 	struct pci_dev *pdev = to_pci_dev(mvm->dev);
740 
741 	root_handle = ACPI_HANDLE(&pdev->dev);
742 	if (!root_handle) {
743 		IWL_DEBUG_LAR(mvm,
744 			      "Could not retrieve root port ACPI handle\n");
745 		return -ENOENT;
746 	}
747 
748 	/* Get the method's handle */
749 	status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle);
750 	if (ACPI_FAILURE(status)) {
751 		IWL_DEBUG_LAR(mvm, "WRD method not found\n");
752 		return -ENOENT;
753 	}
754 
755 	/* Call WRDD with no arguments */
756 	status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
757 	if (ACPI_FAILURE(status)) {
758 		IWL_DEBUG_LAR(mvm, "WRDC invocation failed (0x%x)\n", status);
759 		return -ENOENT;
760 	}
761 
762 	mcc_val = iwl_mvm_wrdd_get_mcc(mvm, wrdd.pointer);
763 	kfree(wrdd.pointer);
764 	if (!mcc_val)
765 		return -ENOENT;
766 
767 	mcc[0] = (mcc_val >> 8) & 0xff;
768 	mcc[1] = mcc_val & 0xff;
769 	mcc[2] = '\0';
770 	return 0;
771 }
772 #else /* CONFIG_ACPI */
iwl_mvm_get_bios_mcc(struct iwl_mvm * mvm,char * mcc)773 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
774 {
775 	return -ENOENT;
776 }
777 #endif
778 
iwl_mvm_init_mcc(struct iwl_mvm * mvm)779 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
780 {
781 	bool tlv_lar;
782 	bool nvm_lar;
783 	int retval;
784 	struct ieee80211_regdomain *regd;
785 	char mcc[3];
786 
787 	if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
788 		tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
789 				      IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
790 		nvm_lar = mvm->nvm_data->lar_enabled;
791 		if (tlv_lar != nvm_lar)
792 			IWL_INFO(mvm,
793 				 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
794 				 tlv_lar ? "enabled" : "disabled",
795 				 nvm_lar ? "enabled" : "disabled");
796 	}
797 
798 	if (!iwl_mvm_is_lar_supported(mvm))
799 		return 0;
800 
801 	/*
802 	 * try to replay the last set MCC to FW. If it doesn't exist,
803 	 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
804 	 */
805 	retval = iwl_mvm_init_fw_regd(mvm);
806 	if (retval != -ENOENT)
807 		return retval;
808 
809 	/*
810 	 * Driver regulatory hint for initial update, this also informs the
811 	 * firmware we support wifi location updates.
812 	 * Disallow scans that might crash the FW while the LAR regdomain
813 	 * is not set.
814 	 */
815 	mvm->lar_regdom_set = false;
816 
817 	regd = iwl_mvm_get_current_regdomain(mvm, NULL);
818 	if (IS_ERR_OR_NULL(regd))
819 		return -EIO;
820 
821 	if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
822 	    !iwl_mvm_get_bios_mcc(mvm, mcc)) {
823 		kfree(regd);
824 		regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
825 					     MCC_SOURCE_BIOS, NULL);
826 		if (IS_ERR_OR_NULL(regd))
827 			return -EIO;
828 	}
829 
830 	retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
831 	kfree(regd);
832 	return retval;
833 }
834 
iwl_mvm_rx_chub_update_mcc(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)835 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
836 				struct iwl_rx_cmd_buffer *rxb)
837 {
838 	struct iwl_rx_packet *pkt = rxb_addr(rxb);
839 	struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
840 	enum iwl_mcc_source src;
841 	char mcc[3];
842 	struct ieee80211_regdomain *regd;
843 
844 	lockdep_assert_held(&mvm->mutex);
845 
846 	if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
847 		return;
848 
849 	mcc[0] = notif->mcc >> 8;
850 	mcc[1] = notif->mcc & 0xff;
851 	mcc[2] = '\0';
852 	src = notif->source_id;
853 
854 	IWL_DEBUG_LAR(mvm,
855 		      "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
856 		      mcc, src);
857 	regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
858 	if (IS_ERR_OR_NULL(regd))
859 		return;
860 
861 	regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
862 	kfree(regd);
863 }
864