1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
26 * in the file called COPYING.
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
35 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65 #include <net/mac80211.h>
66
67 #include "iwl-trans.h"
68 #include "iwl-op-mode.h"
69 #include "iwl-fw.h"
70 #include "iwl-debug.h"
71 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
73 #include "iwl-prph.h"
74 #include "iwl-eeprom-parse.h"
75
76 #include "mvm.h"
77 #include "iwl-phy-db.h"
78
79 #define MVM_UCODE_ALIVE_TIMEOUT HZ
80 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
81
82 #define UCODE_VALID_OK cpu_to_le32(0x1)
83
84 struct iwl_mvm_alive_data {
85 bool valid;
86 u32 scd_base_addr;
87 };
88
89 static inline const struct fw_img *
iwl_get_ucode_image(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)90 iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
91 {
92 if (ucode_type >= IWL_UCODE_TYPE_MAX)
93 return NULL;
94
95 return &mvm->fw->img[ucode_type];
96 }
97
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)98 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
99 {
100 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
101 .valid = cpu_to_le32(valid_tx_ant),
102 };
103
104 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
105 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
106 sizeof(tx_ant_cmd), &tx_ant_cmd);
107 }
108
iwl_free_fw_paging(struct iwl_mvm * mvm)109 void iwl_free_fw_paging(struct iwl_mvm *mvm)
110 {
111 int i;
112
113 if (!mvm->fw_paging_db[0].fw_paging_block)
114 return;
115
116 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
117 if (!mvm->fw_paging_db[i].fw_paging_block) {
118 IWL_DEBUG_FW(mvm,
119 "Paging: block %d already freed, continue to next page\n",
120 i);
121
122 continue;
123 }
124
125 __free_pages(mvm->fw_paging_db[i].fw_paging_block,
126 get_order(mvm->fw_paging_db[i].fw_paging_size));
127 }
128 kfree(mvm->trans->paging_download_buf);
129 mvm->trans->paging_download_buf = NULL;
130
131 memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
132 }
133
iwl_fill_paging_mem(struct iwl_mvm * mvm,const struct fw_img * image)134 static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
135 {
136 int sec_idx, idx;
137 u32 offset = 0;
138
139 /*
140 * find where is the paging image start point:
141 * if CPU2 exist and it's in paging format, then the image looks like:
142 * CPU1 sections (2 or more)
143 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
144 * CPU2 sections (not paged)
145 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
146 * non paged to CPU2 paging sec
147 * CPU2 paging CSS
148 * CPU2 paging image (including instruction and data)
149 */
150 for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) {
151 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
152 sec_idx++;
153 break;
154 }
155 }
156
157 if (sec_idx >= IWL_UCODE_SECTION_MAX) {
158 IWL_ERR(mvm, "driver didn't find paging image\n");
159 iwl_free_fw_paging(mvm);
160 return -EINVAL;
161 }
162
163 /* copy the CSS block to the dram */
164 IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
165 sec_idx);
166
167 memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
168 image->sec[sec_idx].data,
169 mvm->fw_paging_db[0].fw_paging_size);
170
171 IWL_DEBUG_FW(mvm,
172 "Paging: copied %d CSS bytes to first block\n",
173 mvm->fw_paging_db[0].fw_paging_size);
174
175 sec_idx++;
176
177 /*
178 * copy the paging blocks to the dram
179 * loop index start from 1 since that CSS block already copied to dram
180 * and CSS index is 0.
181 * loop stop at num_of_paging_blk since that last block is not full.
182 */
183 for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
184 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
185 image->sec[sec_idx].data + offset,
186 mvm->fw_paging_db[idx].fw_paging_size);
187
188 IWL_DEBUG_FW(mvm,
189 "Paging: copied %d paging bytes to block %d\n",
190 mvm->fw_paging_db[idx].fw_paging_size,
191 idx);
192
193 offset += mvm->fw_paging_db[idx].fw_paging_size;
194 }
195
196 /* copy the last paging block */
197 if (mvm->num_of_pages_in_last_blk > 0) {
198 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
199 image->sec[sec_idx].data + offset,
200 FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
201
202 IWL_DEBUG_FW(mvm,
203 "Paging: copied %d pages in the last block %d\n",
204 mvm->num_of_pages_in_last_blk, idx);
205 }
206
207 return 0;
208 }
209
iwl_alloc_fw_paging_mem(struct iwl_mvm * mvm,const struct fw_img * image)210 static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
211 const struct fw_img *image)
212 {
213 struct page *block;
214 dma_addr_t phys = 0;
215 int blk_idx = 0;
216 int order, num_of_pages;
217 int dma_enabled;
218
219 if (mvm->fw_paging_db[0].fw_paging_block)
220 return 0;
221
222 dma_enabled = is_device_dma_capable(mvm->trans->dev);
223
224 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
225 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
226
227 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
228 mvm->num_of_paging_blk = ((num_of_pages - 1) /
229 NUM_OF_PAGE_PER_GROUP) + 1;
230
231 mvm->num_of_pages_in_last_blk =
232 num_of_pages -
233 NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
234
235 IWL_DEBUG_FW(mvm,
236 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
237 mvm->num_of_paging_blk,
238 mvm->num_of_pages_in_last_blk);
239
240 /* allocate block of 4Kbytes for paging CSS */
241 order = get_order(FW_PAGING_SIZE);
242 block = alloc_pages(GFP_KERNEL, order);
243 if (!block) {
244 /* free all the previous pages since we failed */
245 iwl_free_fw_paging(mvm);
246 return -ENOMEM;
247 }
248
249 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
250 mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE;
251
252 if (dma_enabled) {
253 phys = dma_map_page(mvm->trans->dev, block, 0,
254 PAGE_SIZE << order, DMA_BIDIRECTIONAL);
255 if (dma_mapping_error(mvm->trans->dev, phys)) {
256 /*
257 * free the previous pages and the current one since
258 * we failed to map_page.
259 */
260 iwl_free_fw_paging(mvm);
261 return -ENOMEM;
262 }
263 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
264 } else {
265 mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG |
266 blk_idx << BLOCK_2_EXP_SIZE;
267 }
268
269 IWL_DEBUG_FW(mvm,
270 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
271 order);
272
273 /*
274 * allocate blocks in dram.
275 * since that CSS allocated in fw_paging_db[0] loop start from index 1
276 */
277 for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
278 /* allocate block of PAGING_BLOCK_SIZE (32K) */
279 order = get_order(PAGING_BLOCK_SIZE);
280 block = alloc_pages(GFP_KERNEL, order);
281 if (!block) {
282 /* free all the previous pages since we failed */
283 iwl_free_fw_paging(mvm);
284 return -ENOMEM;
285 }
286
287 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
288 mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE;
289
290 if (dma_enabled) {
291 phys = dma_map_page(mvm->trans->dev, block, 0,
292 PAGE_SIZE << order,
293 DMA_BIDIRECTIONAL);
294 if (dma_mapping_error(mvm->trans->dev, phys)) {
295 /*
296 * free the previous pages and the current one
297 * since we failed to map_page.
298 */
299 iwl_free_fw_paging(mvm);
300 return -ENOMEM;
301 }
302 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
303 } else {
304 mvm->fw_paging_db[blk_idx].fw_paging_phys =
305 PAGING_ADDR_SIG |
306 blk_idx << BLOCK_2_EXP_SIZE;
307 }
308
309 IWL_DEBUG_FW(mvm,
310 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
311 order);
312 }
313
314 return 0;
315 }
316
iwl_save_fw_paging(struct iwl_mvm * mvm,const struct fw_img * fw)317 static int iwl_save_fw_paging(struct iwl_mvm *mvm,
318 const struct fw_img *fw)
319 {
320 int ret;
321
322 ret = iwl_alloc_fw_paging_mem(mvm, fw);
323 if (ret)
324 return ret;
325
326 return iwl_fill_paging_mem(mvm, fw);
327 }
328
329 /* send paging cmd to FW in case CPU2 has paging image */
iwl_send_paging_cmd(struct iwl_mvm * mvm,const struct fw_img * fw)330 static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
331 {
332 int blk_idx;
333 __le32 dev_phy_addr;
334 struct iwl_fw_paging_cmd fw_paging_cmd = {
335 .flags =
336 cpu_to_le32(PAGING_CMD_IS_SECURED |
337 PAGING_CMD_IS_ENABLED |
338 (mvm->num_of_pages_in_last_blk <<
339 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
340 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
341 .block_num = cpu_to_le32(mvm->num_of_paging_blk),
342 };
343
344 /* loop for for all paging blocks + CSS block */
345 for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
346 dev_phy_addr =
347 cpu_to_le32(mvm->fw_paging_db[blk_idx].fw_paging_phys >>
348 PAGE_2_EXP_SIZE);
349 fw_paging_cmd.device_phy_addr[blk_idx] = dev_phy_addr;
350 }
351
352 return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
353 IWL_ALWAYS_LONG_GROUP, 0),
354 0, sizeof(fw_paging_cmd), &fw_paging_cmd);
355 }
356
357 /*
358 * Send paging item cmd to FW in case CPU2 has paging image
359 */
iwl_trans_get_paging_item(struct iwl_mvm * mvm)360 static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
361 {
362 int ret;
363 struct iwl_fw_get_item_cmd fw_get_item_cmd = {
364 .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
365 };
366
367 struct iwl_fw_get_item_resp *item_resp;
368 struct iwl_host_cmd cmd = {
369 .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
370 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
371 .data = { &fw_get_item_cmd, },
372 };
373
374 cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
375
376 ret = iwl_mvm_send_cmd(mvm, &cmd);
377 if (ret) {
378 IWL_ERR(mvm,
379 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
380 ret);
381 return ret;
382 }
383
384 item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
385 if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
386 IWL_ERR(mvm,
387 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
388 le32_to_cpu(item_resp->item_id));
389 ret = -EIO;
390 goto exit;
391 }
392
393 mvm->trans->paging_download_buf = kzalloc(MAX_PAGING_IMAGE_SIZE,
394 GFP_KERNEL);
395 if (!mvm->trans->paging_download_buf) {
396 ret = -ENOMEM;
397 goto exit;
398 }
399 mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
400 mvm->trans->paging_db = mvm->fw_paging_db;
401 IWL_DEBUG_FW(mvm,
402 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
403 mvm->trans->paging_req_addr);
404
405 exit:
406 iwl_free_resp(&cmd);
407
408 return ret;
409 }
410
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)411 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
412 struct iwl_rx_packet *pkt, void *data)
413 {
414 struct iwl_mvm *mvm =
415 container_of(notif_wait, struct iwl_mvm, notif_wait);
416 struct iwl_mvm_alive_data *alive_data = data;
417 struct mvm_alive_resp_ver1 *palive1;
418 struct mvm_alive_resp_ver2 *palive2;
419 struct mvm_alive_resp *palive;
420
421 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
422 palive1 = (void *)pkt->data;
423
424 mvm->support_umac_log = false;
425 mvm->error_event_table =
426 le32_to_cpu(palive1->error_event_table_ptr);
427 mvm->log_event_table =
428 le32_to_cpu(palive1->log_event_table_ptr);
429 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
430
431 alive_data->valid = le16_to_cpu(palive1->status) ==
432 IWL_ALIVE_STATUS_OK;
433 IWL_DEBUG_FW(mvm,
434 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
435 le16_to_cpu(palive1->status), palive1->ver_type,
436 palive1->ver_subtype, palive1->flags);
437 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
438 palive2 = (void *)pkt->data;
439
440 mvm->error_event_table =
441 le32_to_cpu(palive2->error_event_table_ptr);
442 mvm->log_event_table =
443 le32_to_cpu(palive2->log_event_table_ptr);
444 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
445 mvm->umac_error_event_table =
446 le32_to_cpu(palive2->error_info_addr);
447 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
448 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
449
450 alive_data->valid = le16_to_cpu(palive2->status) ==
451 IWL_ALIVE_STATUS_OK;
452 if (mvm->umac_error_event_table)
453 mvm->support_umac_log = true;
454
455 IWL_DEBUG_FW(mvm,
456 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
457 le16_to_cpu(palive2->status), palive2->ver_type,
458 palive2->ver_subtype, palive2->flags);
459
460 IWL_DEBUG_FW(mvm,
461 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
462 palive2->umac_major, palive2->umac_minor);
463 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
464 palive = (void *)pkt->data;
465
466 mvm->error_event_table =
467 le32_to_cpu(palive->error_event_table_ptr);
468 mvm->log_event_table =
469 le32_to_cpu(palive->log_event_table_ptr);
470 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
471 mvm->umac_error_event_table =
472 le32_to_cpu(palive->error_info_addr);
473 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
474 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
475
476 alive_data->valid = le16_to_cpu(palive->status) ==
477 IWL_ALIVE_STATUS_OK;
478 if (mvm->umac_error_event_table)
479 mvm->support_umac_log = true;
480
481 IWL_DEBUG_FW(mvm,
482 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
483 le16_to_cpu(palive->status), palive->ver_type,
484 palive->ver_subtype, palive->flags);
485
486 IWL_DEBUG_FW(mvm,
487 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
488 le32_to_cpu(palive->umac_major),
489 le32_to_cpu(palive->umac_minor));
490 }
491
492 return true;
493 }
494
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)495 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
496 struct iwl_rx_packet *pkt, void *data)
497 {
498 struct iwl_phy_db *phy_db = data;
499
500 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
501 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
502 return true;
503 }
504
505 WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
506
507 return false;
508 }
509
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)510 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
511 enum iwl_ucode_type ucode_type)
512 {
513 struct iwl_notification_wait alive_wait;
514 struct iwl_mvm_alive_data alive_data;
515 const struct fw_img *fw;
516 int ret, i;
517 enum iwl_ucode_type old_type = mvm->cur_ucode;
518 static const u16 alive_cmd[] = { MVM_ALIVE };
519 struct iwl_sf_region st_fwrd_space;
520
521 if (ucode_type == IWL_UCODE_REGULAR &&
522 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE))
523 fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
524 else
525 fw = iwl_get_ucode_image(mvm, ucode_type);
526 if (WARN_ON(!fw))
527 return -EINVAL;
528 mvm->cur_ucode = ucode_type;
529 mvm->ucode_loaded = false;
530
531 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
532 alive_cmd, ARRAY_SIZE(alive_cmd),
533 iwl_alive_fn, &alive_data);
534
535 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
536 if (ret) {
537 mvm->cur_ucode = old_type;
538 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
539 return ret;
540 }
541
542 /*
543 * Some things may run in the background now, but we
544 * just wait for the ALIVE notification here.
545 */
546 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
547 MVM_UCODE_ALIVE_TIMEOUT);
548 if (ret) {
549 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
550 IWL_ERR(mvm,
551 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
552 iwl_read_prph(mvm->trans, SB_CPU_1_STATUS),
553 iwl_read_prph(mvm->trans, SB_CPU_2_STATUS));
554 mvm->cur_ucode = old_type;
555 return ret;
556 }
557
558 if (!alive_data.valid) {
559 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
560 mvm->cur_ucode = old_type;
561 return -EIO;
562 }
563
564 /*
565 * update the sdio allocation according to the pointer we get in the
566 * alive notification.
567 */
568 st_fwrd_space.addr = mvm->sf_space.addr;
569 st_fwrd_space.size = mvm->sf_space.size;
570 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
571 if (ret) {
572 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
573 return ret;
574 }
575
576 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
577
578 /*
579 * configure and operate fw paging mechanism.
580 * driver configures the paging flow only once, CPU2 paging image
581 * included in the IWL_UCODE_INIT image.
582 */
583 if (fw->paging_mem_size) {
584 /*
585 * When dma is not enabled, the driver needs to copy / write
586 * the downloaded / uploaded page to / from the smem.
587 * This gets the location of the place were the pages are
588 * stored.
589 */
590 if (!is_device_dma_capable(mvm->trans->dev)) {
591 ret = iwl_trans_get_paging_item(mvm);
592 if (ret) {
593 IWL_ERR(mvm, "failed to get FW paging item\n");
594 return ret;
595 }
596 }
597
598 ret = iwl_save_fw_paging(mvm, fw);
599 if (ret) {
600 IWL_ERR(mvm, "failed to save the FW paging image\n");
601 return ret;
602 }
603
604 ret = iwl_send_paging_cmd(mvm, fw);
605 if (ret) {
606 IWL_ERR(mvm, "failed to send the paging cmd\n");
607 iwl_free_fw_paging(mvm);
608 return ret;
609 }
610 }
611
612 /*
613 * Note: all the queues are enabled as part of the interface
614 * initialization, but in firmware restart scenarios they
615 * could be stopped, so wake them up. In firmware restart,
616 * mac80211 will have the queues stopped as well until the
617 * reconfiguration completes. During normal startup, they
618 * will be empty.
619 */
620
621 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
622 mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
623
624 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
625 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
626
627 mvm->ucode_loaded = true;
628
629 return 0;
630 }
631
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)632 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
633 {
634 struct iwl_phy_cfg_cmd phy_cfg_cmd;
635 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
636
637 /* Set parameters */
638 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
639 phy_cfg_cmd.calib_control.event_trigger =
640 mvm->fw->default_calib[ucode_type].event_trigger;
641 phy_cfg_cmd.calib_control.flow_trigger =
642 mvm->fw->default_calib[ucode_type].flow_trigger;
643
644 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
645 phy_cfg_cmd.phy_cfg);
646
647 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
648 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
649 }
650
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm,bool read_nvm)651 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
652 {
653 struct iwl_notification_wait calib_wait;
654 static const u16 init_complete[] = {
655 INIT_COMPLETE_NOTIF,
656 CALIB_RES_NOTIF_PHY_DB
657 };
658 int ret;
659
660 lockdep_assert_held(&mvm->mutex);
661
662 if (WARN_ON_ONCE(mvm->calibrating))
663 return 0;
664
665 iwl_init_notification_wait(&mvm->notif_wait,
666 &calib_wait,
667 init_complete,
668 ARRAY_SIZE(init_complete),
669 iwl_wait_phy_db_entry,
670 mvm->phy_db);
671
672 /* Will also start the device */
673 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
674 if (ret) {
675 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
676 goto error;
677 }
678
679 ret = iwl_send_bt_init_conf(mvm);
680 if (ret)
681 goto error;
682
683 /* Read the NVM only at driver load time, no need to do this twice */
684 if (read_nvm) {
685 /* Read nvm */
686 ret = iwl_nvm_init(mvm, true);
687 if (ret) {
688 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
689 goto error;
690 }
691 }
692
693 /* In case we read the NVM from external file, load it to the NIC */
694 if (mvm->nvm_file_name)
695 iwl_mvm_load_nvm_to_nic(mvm);
696
697 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
698 WARN_ON(ret);
699
700 /*
701 * abort after reading the nvm in case RF Kill is on, we will complete
702 * the init seq later when RF kill will switch to off
703 */
704 if (iwl_mvm_is_radio_hw_killed(mvm)) {
705 IWL_DEBUG_RF_KILL(mvm,
706 "jump over all phy activities due to RF kill\n");
707 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
708 ret = 1;
709 goto out;
710 }
711
712 mvm->calibrating = true;
713
714 /* Send TX valid antennas before triggering calibrations */
715 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
716 if (ret)
717 goto error;
718
719 /*
720 * Send phy configurations command to init uCode
721 * to start the 16.0 uCode init image internal calibrations.
722 */
723 ret = iwl_send_phy_cfg_cmd(mvm);
724 if (ret) {
725 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
726 ret);
727 goto error;
728 }
729
730 /*
731 * Some things may run in the background now, but we
732 * just wait for the calibration complete notification.
733 */
734 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
735 MVM_UCODE_CALIB_TIMEOUT);
736
737 if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
738 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
739 ret = 1;
740 }
741 goto out;
742
743 error:
744 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
745 out:
746 mvm->calibrating = false;
747 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
748 /* we want to debug INIT and we have no NVM - fake */
749 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
750 sizeof(struct ieee80211_channel) +
751 sizeof(struct ieee80211_rate),
752 GFP_KERNEL);
753 if (!mvm->nvm_data)
754 return -ENOMEM;
755 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
756 mvm->nvm_data->bands[0].n_channels = 1;
757 mvm->nvm_data->bands[0].n_bitrates = 1;
758 mvm->nvm_data->bands[0].bitrates =
759 (void *)mvm->nvm_data->channels + 1;
760 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
761 }
762
763 return ret;
764 }
765
iwl_mvm_get_shared_mem_conf(struct iwl_mvm * mvm)766 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
767 {
768 struct iwl_host_cmd cmd = {
769 .id = SHARED_MEM_CFG,
770 .flags = CMD_WANT_SKB,
771 .data = { NULL, },
772 .len = { 0, },
773 };
774 struct iwl_rx_packet *pkt;
775 struct iwl_shared_mem_cfg *mem_cfg;
776 u32 i;
777
778 lockdep_assert_held(&mvm->mutex);
779
780 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
781 return;
782
783 pkt = cmd.resp_pkt;
784 mem_cfg = (void *)pkt->data;
785
786 mvm->shared_mem_cfg.shared_mem_addr =
787 le32_to_cpu(mem_cfg->shared_mem_addr);
788 mvm->shared_mem_cfg.shared_mem_size =
789 le32_to_cpu(mem_cfg->shared_mem_size);
790 mvm->shared_mem_cfg.sample_buff_addr =
791 le32_to_cpu(mem_cfg->sample_buff_addr);
792 mvm->shared_mem_cfg.sample_buff_size =
793 le32_to_cpu(mem_cfg->sample_buff_size);
794 mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
795 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
796 mvm->shared_mem_cfg.txfifo_size[i] =
797 le32_to_cpu(mem_cfg->txfifo_size[i]);
798 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
799 mvm->shared_mem_cfg.rxfifo_size[i] =
800 le32_to_cpu(mem_cfg->rxfifo_size[i]);
801 mvm->shared_mem_cfg.page_buff_addr =
802 le32_to_cpu(mem_cfg->page_buff_addr);
803 mvm->shared_mem_cfg.page_buff_size =
804 le32_to_cpu(mem_cfg->page_buff_size);
805 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
806
807 iwl_free_resp(&cmd);
808 }
809
iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm * mvm,struct iwl_mvm_dump_desc * desc,struct iwl_fw_dbg_trigger_tlv * trigger)810 int iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm *mvm,
811 struct iwl_mvm_dump_desc *desc,
812 struct iwl_fw_dbg_trigger_tlv *trigger)
813 {
814 unsigned int delay = 0;
815
816 if (trigger)
817 delay = msecs_to_jiffies(le32_to_cpu(trigger->stop_delay));
818
819 if (test_and_set_bit(IWL_MVM_STATUS_DUMPING_FW_LOG, &mvm->status))
820 return -EBUSY;
821
822 if (WARN_ON(mvm->fw_dump_desc))
823 iwl_mvm_free_fw_dump_desc(mvm);
824
825 IWL_WARN(mvm, "Collecting data: trigger %d fired.\n",
826 le32_to_cpu(desc->trig_desc.type));
827
828 mvm->fw_dump_desc = desc;
829 mvm->fw_dump_trig = trigger;
830
831 queue_delayed_work(system_wq, &mvm->fw_dump_wk, delay);
832
833 return 0;
834 }
835
iwl_mvm_fw_dbg_collect(struct iwl_mvm * mvm,enum iwl_fw_dbg_trigger trig,const char * str,size_t len,struct iwl_fw_dbg_trigger_tlv * trigger)836 int iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm, enum iwl_fw_dbg_trigger trig,
837 const char *str, size_t len,
838 struct iwl_fw_dbg_trigger_tlv *trigger)
839 {
840 struct iwl_mvm_dump_desc *desc;
841
842 desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
843 if (!desc)
844 return -ENOMEM;
845
846 desc->len = len;
847 desc->trig_desc.type = cpu_to_le32(trig);
848 memcpy(desc->trig_desc.data, str, len);
849
850 return iwl_mvm_fw_dbg_collect_desc(mvm, desc, trigger);
851 }
852
iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm * mvm,struct iwl_fw_dbg_trigger_tlv * trigger,const char * fmt,...)853 int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm *mvm,
854 struct iwl_fw_dbg_trigger_tlv *trigger,
855 const char *fmt, ...)
856 {
857 u16 occurrences = le16_to_cpu(trigger->occurrences);
858 int ret, len = 0;
859 char buf[64];
860
861 if (!occurrences)
862 return 0;
863
864 if (fmt) {
865 va_list ap;
866
867 buf[sizeof(buf) - 1] = '\0';
868
869 va_start(ap, fmt);
870 vsnprintf(buf, sizeof(buf), fmt, ap);
871 va_end(ap);
872
873 /* check for truncation */
874 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
875 buf[sizeof(buf) - 1] = '\0';
876
877 len = strlen(buf) + 1;
878 }
879
880 ret = iwl_mvm_fw_dbg_collect(mvm, le32_to_cpu(trigger->id), buf, len,
881 trigger);
882
883 if (ret)
884 return ret;
885
886 trigger->occurrences = cpu_to_le16(occurrences - 1);
887 return 0;
888 }
889
iwl_mvm_restart_early_start(struct iwl_mvm * mvm)890 static inline void iwl_mvm_restart_early_start(struct iwl_mvm *mvm)
891 {
892 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000)
893 iwl_clear_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
894 else
895 iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 1);
896 }
897
iwl_mvm_start_fw_dbg_conf(struct iwl_mvm * mvm,u8 conf_id)898 int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id)
899 {
900 u8 *ptr;
901 int ret;
902 int i;
903
904 if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv),
905 "Invalid configuration %d\n", conf_id))
906 return -EINVAL;
907
908 /* EARLY START - firmware's configuration is hard coded */
909 if ((!mvm->fw->dbg_conf_tlv[conf_id] ||
910 !mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) &&
911 conf_id == FW_DBG_START_FROM_ALIVE) {
912 iwl_mvm_restart_early_start(mvm);
913 return 0;
914 }
915
916 if (!mvm->fw->dbg_conf_tlv[conf_id])
917 return -EINVAL;
918
919 if (mvm->fw_dbg_conf != FW_DBG_INVALID)
920 IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n",
921 mvm->fw_dbg_conf);
922
923 /* Send all HCMDs for configuring the FW debug */
924 ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd;
925 for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
926 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
927
928 ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0,
929 le16_to_cpu(cmd->len), cmd->data);
930 if (ret)
931 return ret;
932
933 ptr += sizeof(*cmd);
934 ptr += le16_to_cpu(cmd->len);
935 }
936
937 mvm->fw_dbg_conf = conf_id;
938
939 return 0;
940 }
941
iwl_mvm_config_ltr(struct iwl_mvm * mvm)942 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
943 {
944 struct iwl_ltr_config_cmd cmd = {
945 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
946 };
947
948 if (!mvm->trans->ltr_enabled)
949 return 0;
950
951 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
952 sizeof(cmd), &cmd);
953 }
954
iwl_mvm_up(struct iwl_mvm * mvm)955 int iwl_mvm_up(struct iwl_mvm *mvm)
956 {
957 int ret, i;
958 struct ieee80211_channel *chan;
959 struct cfg80211_chan_def chandef;
960
961 lockdep_assert_held(&mvm->mutex);
962
963 ret = iwl_trans_start_hw(mvm->trans);
964 if (ret)
965 return ret;
966
967 /*
968 * If we haven't completed the run of the init ucode during
969 * module loading, load init ucode now
970 * (for example, if we were in RFKILL)
971 */
972 ret = iwl_run_init_mvm_ucode(mvm, false);
973 if (ret && !iwlmvm_mod_params.init_dbg) {
974 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
975 /* this can't happen */
976 if (WARN_ON(ret > 0))
977 ret = -ERFKILL;
978 goto error;
979 }
980 if (!iwlmvm_mod_params.init_dbg) {
981 /*
982 * Stop and start the transport without entering low power
983 * mode. This will save the state of other components on the
984 * device that are triggered by the INIT firwmare (MFUART).
985 */
986 _iwl_trans_stop_device(mvm->trans, false);
987 ret = _iwl_trans_start_hw(mvm->trans, false);
988 if (ret)
989 goto error;
990 }
991
992 if (iwlmvm_mod_params.init_dbg)
993 return 0;
994
995 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
996 if (ret) {
997 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
998 goto error;
999 }
1000
1001 iwl_mvm_get_shared_mem_conf(mvm);
1002
1003 ret = iwl_mvm_sf_update(mvm, NULL, false);
1004 if (ret)
1005 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1006
1007 mvm->fw_dbg_conf = FW_DBG_INVALID;
1008 /* if we have a destination, assume EARLY START */
1009 if (mvm->fw->dbg_dest_tlv)
1010 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
1011 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
1012
1013 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1014 if (ret)
1015 goto error;
1016
1017 ret = iwl_send_bt_init_conf(mvm);
1018 if (ret)
1019 goto error;
1020
1021 /* Send phy db control command and then phy db calibration*/
1022 ret = iwl_send_phy_db_data(mvm->phy_db);
1023 if (ret)
1024 goto error;
1025
1026 ret = iwl_send_phy_cfg_cmd(mvm);
1027 if (ret)
1028 goto error;
1029
1030 /* init the fw <-> mac80211 STA mapping */
1031 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1032 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1033
1034 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
1035
1036 /* reset quota debouncing buffer - 0xff will yield invalid data */
1037 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1038
1039 /* Add auxiliary station for scanning */
1040 ret = iwl_mvm_add_aux_sta(mvm);
1041 if (ret)
1042 goto error;
1043
1044 /* Add all the PHY contexts */
1045 chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0];
1046 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1047 for (i = 0; i < NUM_PHY_CTX; i++) {
1048 /*
1049 * The channel used here isn't relevant as it's
1050 * going to be overwritten in the other flows.
1051 * For now use the first channel we have.
1052 */
1053 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1054 &chandef, 1, 1);
1055 if (ret)
1056 goto error;
1057 }
1058
1059 /* Initialize tx backoffs to the minimal possible */
1060 iwl_mvm_tt_tx_backoff(mvm, 0);
1061
1062 WARN_ON(iwl_mvm_config_ltr(mvm));
1063
1064 ret = iwl_mvm_power_update_device(mvm);
1065 if (ret)
1066 goto error;
1067
1068 /*
1069 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1070 * anyway, so don't init MCC.
1071 */
1072 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1073 ret = iwl_mvm_init_mcc(mvm);
1074 if (ret)
1075 goto error;
1076 }
1077
1078 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1079 ret = iwl_mvm_config_scan(mvm);
1080 if (ret)
1081 goto error;
1082 }
1083
1084 if (iwl_mvm_is_csum_supported(mvm) &&
1085 mvm->cfg->features & NETIF_F_RXCSUM)
1086 iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3);
1087
1088 /* allow FW/transport low power modes if not during restart */
1089 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1090 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1091
1092 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1093 return 0;
1094 error:
1095 iwl_trans_stop_device(mvm->trans);
1096 return ret;
1097 }
1098
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1099 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1100 {
1101 int ret, i;
1102
1103 lockdep_assert_held(&mvm->mutex);
1104
1105 ret = iwl_trans_start_hw(mvm->trans);
1106 if (ret)
1107 return ret;
1108
1109 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1110 if (ret) {
1111 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1112 goto error;
1113 }
1114
1115 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1116 if (ret)
1117 goto error;
1118
1119 /* Send phy db control command and then phy db calibration*/
1120 ret = iwl_send_phy_db_data(mvm->phy_db);
1121 if (ret)
1122 goto error;
1123
1124 ret = iwl_send_phy_cfg_cmd(mvm);
1125 if (ret)
1126 goto error;
1127
1128 /* init the fw <-> mac80211 STA mapping */
1129 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1130 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1131
1132 /* Add auxiliary station for scanning */
1133 ret = iwl_mvm_add_aux_sta(mvm);
1134 if (ret)
1135 goto error;
1136
1137 return 0;
1138 error:
1139 iwl_trans_stop_device(mvm->trans);
1140 return ret;
1141 }
1142
iwl_mvm_rx_card_state_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1143 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1144 struct iwl_rx_cmd_buffer *rxb)
1145 {
1146 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1147 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1148 u32 flags = le32_to_cpu(card_state_notif->flags);
1149
1150 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1151 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1152 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1153 (flags & CT_KILL_CARD_DISABLED) ?
1154 "Reached" : "Not reached");
1155 }
1156
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1157 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1158 struct iwl_rx_cmd_buffer *rxb)
1159 {
1160 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1161 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1162
1163 IWL_DEBUG_INFO(mvm,
1164 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1165 le32_to_cpu(mfuart_notif->installed_ver),
1166 le32_to_cpu(mfuart_notif->external_ver),
1167 le32_to_cpu(mfuart_notif->status),
1168 le32_to_cpu(mfuart_notif->duration));
1169 }
1170